CN212304771U

CN212304771U - Battery protection circuit

Info

Publication number: CN212304771U
Application number: CN201890001037.8U
Authority: CN
Inventors: 许哲
Original assignee: LG Chem Ltd
Current assignee: LG Energy Solution Ltd
Priority date: 2017-09-19
Filing date: 2018-09-18
Publication date: 2021-01-05
Anticipated expiration: 2028-09-18
Also published as: KR102375844B1; KR20190032092A; WO2019059616A1

Abstract

A battery protection circuit. According to the utility model discloses a protection circuit of embodiment's protection battery is protected from overcharge, overdischarge and overcurrent influence. The protection circuit includes two or more control units that are disposed between an external input/output terminal and a battery cell constituting a battery and control charging and discharging of the battery, wherein the two or more control units are connected in parallel.

Description

Battery protection circuit

Technical Field

The utility model relates to a battery protection circuit with configuration is handled to ESD.

Furthermore, the utility model relates to a design has battery protection circuit of low resistance.

Background

In recent years, with the rapid increase in demand for portable electronic products such as notebook computers, video cameras, and portable telephones, and the acceleration of development of batteries for storage, robots, and satellites for energy storage, research into high-performance secondary batteries capable of repeated charging and discharging is being actively conducted.

Secondary batteries currently commercialized include nickel cadmium batteries, nickel hydrogen batteries, nickel zinc batteries, and lithium secondary batteries. Among these secondary batteries, lithium secondary batteries have received much attention due to their advantages of free charge and discharge, very low self-discharge rate, and high energy density (because a memory effect hardly occurs) as compared to nickel-based secondary batteries.

On the other hand, the safety problem of batteries is one of the greatest social problems associated with recent batteries. The number of electronic products, such as notebook computers and mobile phones, is rapidly increasing, and explosion of batteries may cause not only damage to portable electronic products but also fire. Therefore, it is urgently required to ensure the safety of the battery.

In order to ensure the stability of these batteries, the batteries use a protection circuit that cuts off a charge/discharge current to ensure the safety of the batteries when an abnormal state of the batteries is detected.

Fig. 1 is a view of a conventional protection circuit.

Referring to fig. 1, a conventional protection circuit will be described. In the conventional protection circuit, the protection circuit is configured using general FETs 11 to 14 having a resistance of 3 ohms. However, when the battery protection circuit is designed using the conventional FETs 11 to 14, it is difficult to handle electrostatic discharge (ESD).

Therefore, the utility model provides a solve protection circuit of this kind of problem.

Furthermore, the present invention provides a battery protection circuit having an ESD processing configuration and designed with a low resistance.

SUMMERY OF THE UTILITY MODEL

Technical problem

The utility model provides a battery protection circuit with low resistance and can handle ESD.

Technical scheme

According to an exemplary embodiment, there is provided a protection circuit for protecting a battery from overcharge, overdischarge, and overcurrent, wherein the protection circuit is disposed between a battery cell constituting the battery and an external input/output terminal and includes two or more control units for controlling charge and discharge of the battery, wherein the two or more control units are connected in parallel.

Each of the two or more control units may include: a charge FET for controlling charging of the battery; and a discharge FET for controlling discharge of the battery.

The charge FET and the discharge FET may be connected in series.

At least one of the two or more control units may be configured by connecting a zener diode in parallel with each of the charge FET and the discharge FET.

At least one of the two or more control units may configure the charge FET and the discharge FET by a device in which a zener diode and a FET are integrated in one chip.

Some, but not all, of the two or more control units may be configured by connecting a zener diode in parallel with each of the charge FET and the discharge FET.

A part but not all of the two or more control units may configure the charge FET and the discharge FET by a device in which a zener diode and a FET are integrated in one chip.

Advantageous effects

The utility model discloses can dispose the low resistance battery protection circuit who is used for handling ESD

Drawings

Fig. 1 is a view of a conventional protection circuit.

Fig. 2 is a schematic diagram of a battery protection circuit according to an embodiment of the present invention.

Fig. 3 is a detailed view of a battery protection circuit according to an embodiment of the present invention.

Fig. 4 is a detailed view of a battery protection circuit according to another embodiment of the present invention.

Fig. 5 is a view illustrating that the charge FET and the discharge FET of the first control unit are configured by a device in which a zener diode and a FET are integrated in a single chip and the charge FET and the discharge FET of the second control unit are configured with a low-resistance FET.

Detailed Description

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. The present invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Parts irrelevant to the description are omitted in the drawings to clearly describe the present invention, and like reference numerals denote like elements throughout.

Although the terms "initial", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. The above terms are only used to distinguish one component from another component. For example, an initial component may be referred to as a second component, and vice versa, without departing from the scope of the present invention. The terminology used in the description is for the purpose of describing particular embodiments and is not intended to limit the scope of the present invention. Unless the context clearly dictates otherwise, singular expressions include plural expressions.

Throughout the specification, when a component is referred to as being "connected" to another component, it includes not only "directly connected" but also "electrically connected" with another element between the two parts. Further, when a component is described as including (or containing or having) some elements, it is to be understood that the component may include (or contain or have) only those elements, or may include (or contain or have) other elements and those elements if there is no particular limitation. The term "… operation" or "operation of …" used throughout the specification does not mean "operation for …".

The terms used in the present specification may be general terms used widely at present in consideration of functions in the present invention, but may be changed according to intentions of those skilled in the art, precedent cases, or the emergence of new technology. In addition, in some cases, there may be terms arbitrarily selected by the applicant, and in such cases, their meanings are described in the corresponding description parts of the present invention. Accordingly, terms used in the present invention should be defined based on the meanings of the terms and the overall contents of the present invention, not simple term names.

1. According to the utility model discloses an embodiment's battery protection circuit

Fig. 2 is a view of a battery protection circuit according to an embodiment of the present invention.

Hereinafter, a battery protection circuit according to an embodiment of the present invention will be described with reference to fig. 2.

The battery protection circuit according to an embodiment of the present invention may be disposed between the external input/output terminal and the battery cells constituting the battery and may include two or more control units 100/200 for controlling the charging and discharging of the battery, and each control unit 100 of the two or more control units 100/200 may be connected in parallel.

The reason why the two or more control units 100/200 are connected in parallel to obtain the battery protection circuit is that the number of FETs used in the battery protection circuit varies according to the capacity of the battery and the charge/discharge current of the battery.

In addition, if two or more control units 100/200 are connected in parallel to configure a battery protection circuit, in the case where some control units 100 have an error, charge/discharge control of the battery is performed by the remaining control units 100, so that the stability of the battery can be improved.

Meanwhile, the two or more control units 100/200 may include a charge FET for controlling charging of the battery and a discharge FET for controlling discharging of the battery.

On the other hand, the charge FET and the discharge FET may be connected in series.

Meanwhile, the two or more control units 100/200 may further include the ESD protection arrangement 110 and the ESD protection arrangement 210 as an ESD processing arrangement of the battery protection circuit, and in this arrangement, a zener diode may be used.

Specifically, at least one of the two or more control units 100/200 may be configured by connecting a zener diode in parallel with the charge FET and the discharge FET, and some but not all of the two or more control units may be configured by connecting a zener diode in parallel with the charge FET and the discharge FET.

On the other hand, instead of the configuration in which the zener diode is connected in parallel with each of the above-described charge FET and discharge FET, the charge FET and discharge FET may be configured with a device in which the zener diode and FET are integrated in one chip.

Meanwhile, hereinafter, referring to fig. 3 and 4, a case where two or more control units are configured with two (control units) will be described with reference to the detailed embodiment.

Fig. 3 is a schematic diagram of a battery protection circuit according to an embodiment of the present invention, and fig. 4 is a detailed view of the battery protection circuit according to an embodiment of the present invention.

Hereinafter, a protection circuit according to an embodiment of the present invention will be described with reference to fig. 3 and 4.

Referring to fig. 3 and 4, each of the first controller 120 and the second controller 120 may be configured to include an ESD protection configuration 110 and an ESD protection configuration 210 for handling ESD of the battery protection circuit.

More specifically, the ESD protection configuration may be formed by configuring the

charge FETs

101 and 201 and the

discharge FETs

102 and 202 using devices in which zener diodes and FETs are integrated in a single chip.

At this time, the resistance value of the device in which the zener diode and the FET are integrated in one chip is generally larger than that of the above-described conventional FET. For example, the resistance of a device in which a zener diode and a FET are integrated in one chip may be 4 Ω.

In this way, when the charging

FETs

101 and 201 and the discharging

FETs

102 and 202 configuring the first and second control units 120 and 220 are configured by the zener diode and the device in which the FETs are integrated in one chip, the total resistance of the battery protection circuit may increase because the FET including the zener diode has a higher resistance than a general FET.

However, for the battery protection circuit, it may be necessary to design the protection circuit with low resistance according to the design requirements of the entire battery pack, and thus it may be difficult to meet the requirements.

That is, the total resistance of the battery protection circuit thus configured is calculated to be 4 Ω and is greater than that of the conventional protection circuit configured using only a general FET of 3 Ω, and thus the design requirements of the battery pack (3 Ω or less) may not be satisfied.

Therefore, as another embodiment for realizing a low resistance design that satisfies the design requirements of the battery pack, a battery protection circuit may be designed as shown in fig. 5.

More specifically, only the control unit of the first control unit 120 or the second control unit 220 uses a device in which a zener diode and a FET are integrated in one chip as the charging FET 101 and the discharging FET 101, so that the battery protection circuit can be configured.

Fig. 5 is a view illustrating that the charge FET 101 and the discharge FET 102 of the first control unit 120 are configured by a device in which a zener diode and a FET are integrated in a single chip and the charge FET 203 and the discharge FET 204 of the second control unit 200 are configured with low-resistance FETs.

On the other hand, the low-resistance FET may be an FET having a resistance value smaller than that of a conventional ordinary FET. For example, the resistance of the low resistance FET may be 2 Ω.

As shown in fig. 5, when the charge FET 101 and the discharge FET 102 of the first control unit 120 are configured by a device in which a zener diode and a FET are integrated in a single chip, and the charge FET 203 and the discharge FET 204 of the second control unit 220 are configured with low-resistance FETs, the resistance of the battery protection circuit may be calculated using the following formula.

(formula)

((first charge FET resistance + first discharge FET resistance) x (second charge FET resistance + second discharge FET resistance))/(first charge FET resistance + first discharge FET resistance + second charge FET resistance + second discharge FET resistance)

The total resistance of the battery protection circuit of fig. 5 calculated by the above formula is 2.7 Ω.

That is, the battery protection circuit configured as shown in fig. 5 can satisfy the design requirements of the battery pack (less than 3 Ω) while having the ESD processing configuration.

Meanwhile, in the above-described embodiments and other embodiments of the present invention, a device in which a zener diode and a FET are integrated in a single chip may be realized by connecting the FET and the zener diode in parallel.

On the other hand, although the technical concept of the present invention has been described in detail with reference to the above embodiments, it should be noted that the above embodiments are for explanation purposes and not for limitation purposes. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention.

Claims

1. A kind of battery protection circuit is disclosed,

the protection circuit is disposed between an external input/output terminal and a battery cell constituting a battery, and includes two or more control units for controlling charging and discharging of the battery,

wherein the two or more control units are connected in parallel,

wherein each of the two or more control units comprises:

a charge FET for controlling charging of the battery; and

a discharge FET for controlling discharge of the battery,

the method is characterized in that: configuring at least one of the two or more control units by connecting a zener diode in parallel with each of the charge FET and the discharge FET.

2. The battery protection circuit of claim 1, wherein: the charge FET and the discharge FET are connected in series.

3. The battery protection circuit of claim 1, wherein: at least one of the two or more control units configures the charge FET and the discharge FET through a device in which a zener diode and a FET are integrated in one chip.

4. The battery protection circuit of claim 1, wherein: configuring a portion, but not all, of the two or more control units by connecting a zener diode in parallel with each of the charge FET and the discharge FET.

5. The battery protection circuit of claim 1, wherein: the charge FET and the discharge FET are configured by a device in which a part, but not all, of the two or more control units are integrated in one chip through a zener diode and a FET.