CN212258903U

CN212258903U - Voltage controlled oscillator

Info

Publication number: CN212258903U
Application number: CN202020805238.2U
Authority: CN
Inventors: 邬成; 汤小虎; 陈晓哲
Original assignee: Wuxi Yourong Microelectronics Co ltd
Current assignee: Wuxi Yourong Microelectronics Co ltd
Priority date: 2020-05-15
Filing date: 2020-05-15
Publication date: 2020-12-29
Anticipated expiration: 2030-05-15

Abstract

The utility model provides a technical scheme is a voltage controlled oscillator, include: the circuit comprises a first core circuit, a second core circuit and a coupling inductance structure; when the switch S1 and the switch S2 in the core circuit are both closed, the voltage-controlled oscillator is in a high performance state, the currents of the first current source and the second current source are equal, and the overall current of the voltage-controlled oscillator is twice that of the first current source or the second current source; when only one of the switch S1 or the switch S2 is closed, the voltage controlled oscillator is in a low power consumption state, only one of the first current source or the second current source is in a normal operation state, and the overall current of the voltage controlled oscillator is equal to the current of the first current source or the second current source. Therefore, the voltage-controlled oscillator can be flexibly configured into two working modes of high performance and low power consumption, and is suitable for multi-standard and multi-mode chips.

Description

Voltage controlled oscillator

Technical Field

The utility model relates to an integrated circuit design field especially relates to a voltage controlled oscillator.

Background

A voltage-controlled oscillator (VCO) refers to an oscillating circuit in which an output frequency corresponds to an input control voltage.

The voltage-controlled oscillator is one of the very important basic circuits in the integrated circuit, and the implementation modes of the circuit mainly include two types, namely a Ring voltage-controlled oscillator (Ring VCO) and an inductance-capacitance voltage-controlled oscillator (LC VCO), which are widely applied to a clock synchronization circuit in a microprocessor; a frequency synthesizer in a wireless communication transceiver; clock recovery circuit in optical front communication and multi-phase sampling circuit.

At present, in the design with high requirements on noise, an inductance-capacitance voltage-controlled oscillator becomes the first choice; lc oscillators are widely used to provide local oscillator signals for rf communication systems due to their good phase noise performance. In recent years, with the development of CMOS technology, the implementation of on-chip inductors becomes possible, which makes the implementation of fully integrated on-chip inductor-capacitor oscillators easier.

Phase noise is one of the main parameters that balance the performance of a voltage controlled oscillator. With the development of CMOS process technology, the demand for VCO miniaturization and low voltage operation is increasing, however, the output voltage swing of the VCO is severely limited by the lower supply voltage, thereby deteriorating the phase noise.

Fig. 1 shows a schematic diagram of a typical conventional voltage-controlled oscillator, where M1 and M2 are NMOS coupled pairs, which form a negative resistance to cancel the resistive loss in the resonance and maintain the stable oscillation of the circuit; m3 is a current source for generating the current for the voltage controlled oscillator to work; the inductance L and the variable capacitance C form a resonant cavity. By changing the effective value of the variable capacitance C, the oscillation frequency is changed. The two ends of the capacitor form the differential output end of the oscillator. The traditional structure can not realize flexible conversion between high-performance and low-power consumption modes at the same time, and phase noise is always worsened in the process of pursuing high performance.

SUMMERY OF THE UTILITY MODEL

The utility model provides a voltage-controlled oscillator can realize high performance and two kinds of modes of low-power consumption in a flexible way to effectively reduce phase noise under high performance mode, improve the electrical property.

In order to achieve the above object, the present invention provides a voltage controlled oscillator, which includes: the circuit comprises a first core circuit, a second core circuit and a coupling inductance structure; the coupling inductor structure comprises a coupling inductor consisting of a differential inductor L1 and a differential inductor L2 which are symmetrical to each other, wherein the differential inductor L1 is provided with a middle tap P10, a connection point P11 and a connection point P12 at a first end, the differential inductor L2 is provided with a middle tap P20, a connection point P21 and a connection point P22 at a second end, the first end is opposite to the second end, and the middle tap P10 is connected with the middle tap P20 and is connected to a voltage source; the first core circuit comprises an NMOS transistor M11, an NMOS transistor M12, a first capacitor, a first current source and a switch S1; the first capacitor is provided with a connector A11 and a connector A12; the second core circuit comprises an NMOS transistor M21, an NMOS transistor M22, a second capacitor, a second current source and a switch S2; the second capacitor is provided with a connector A21 and a connector A22; the drain of the NMOS transistor M11, the gate of the NMOS transistor M12, the connector a11 of the first capacitor, and the connection point P11 of the differential inductor L1 are connected; the drain of the NMOS transistor M12, the gate of the NMOS transistor M11, the connector a12 of the first capacitor, and the connection point P21 of the differential inductor L2 are connected; the NMOS transistor M11 is connected with the source electrode of the NMOS transistor M12 and is sequentially connected with the first current source and the switch S1; the drain of the NMOS transistor M21, the gate of the NMOS transistor M22, the connector a21 of the second capacitor, and the connection point P12 of the differential inductor L1 are connected; the drain of the NMOS transistor M22, the gate of the NMOS transistor M21, the connector a22 of the second capacitor, and the connection point P22 of the differential inductor L2 are connected; the NMOS transistor M21 is connected to the source of the NMOS transistor M22 and is connected to the second current source and the switch S2 in sequence.

Optionally, the first current source and the second current source both include NMOS transistors.

Optionally, the differential inductor L1 and the differential inductor L2 are both on-chip spiral inductors supported by a standard CMOS process.

Optionally, the first capacitor and the second capacitor are both adjustable capacitors.

Optionally, the first capacitor and the second capacitor are both capacitors supported by a standard CMOS process.

In the technical solution provided by the present invention, when the switch S1 and the switch S2 are both closed, the voltage-controlled oscillator is in a high performance state, at this time, the currents of the first current source and the second current source are equal, and the overall current of the voltage-controlled oscillator is twice the first current source or the second current source; when only one of the switch S1 or the switch S2 is closed, the voltage controlled oscillator is in a low power consumption state, only one of the first current source or the second current source is in a normal operation state, and the overall current of the voltage controlled oscillator is equal to the current of the first current source or the second current source. Therefore, the voltage-controlled oscillator can be flexibly configured into two working modes of high performance and low power consumption, and is suitable for multi-standard and multi-mode chips. In addition, because the voltage-controlled oscillator is provided with the coupling inductance structure, each single inductance coil in the coupling inductance structure adopts a middle tap design, and the position of the middle tap and the joint positions at the two ends of the inductance are at the same end in a circuit layout, the wiring length of a power line is reduced, and the phase noise performance is improved. The coupling inductance structure can inhibit the magnetic field coupling from other inductors or transformers on the chip through the circuit connection of the inductance coil, thereby solving the traction problem of the common integrated power amplifier in the communication chip to the voltage-controlled oscillator.

Drawings

Fig. 1 is a schematic diagram of a conventional voltage controlled oscillator;

fig. 2 is a schematic diagram of an embodiment of a voltage controlled oscillator of the present invention;

fig. 3 is a schematic diagram of a layout of a coupling inductor structure according to an embodiment of the present invention;

fig. 4 is a phase noise simulation comparison diagram of the embodiment of the present invention and a conventional voltage-controlled oscillator;

fig. 5 is an equivalent circuit diagram of the embodiment of the present invention in the low power consumption operation mode.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

Fig. 2 is a schematic diagram of an embodiment of a voltage-controlled oscillator provided by the present invention. The voltage-controlled oscillator provided by the embodiment comprises a first core circuit 10, a second core circuit 20 and a coupling inductance structure 30; the coupling inductor structure 30 includes a coupling inductor formed by a differential inductor L1 and a differential inductor L2 that are symmetrical to each other.

The differential inductor L1 has a middle tap P10, a connection point P11 and a connection point P12 at a first end, the differential inductor L2 has a middle tap P20, a connection point P21 and a connection point P22 at a second end, the first end is opposite to the second end, and the middle tap P10 is connected with the middle tap P20 and is connected to a voltage source VDD.

The first core circuit 10 includes an NMOS transistor M11, an NMOS transistor M12, a first capacitor C1, a first current source CS1, and a switch S1.

The first capacitor C1 has a connector a11 and a connector a 12.

The second core circuit 20 includes an NMOS transistor M21, an NMOS transistor M22, a second capacitor C2, a second current source CS2, and a switch S2.

The second capacitor C2 has a connector a21 and a connector a 22.

The drain of the NMOS transistor M11, the gate of the NMOS transistor M12, the connection head a11 of the first capacitor C1, and the connection point P11 of the differential inductor L1 are connected; the drain of the NMOS transistor M12, the gate of the NMOS transistor M11, the connection head a12 of the first capacitor C1, and the connection point P21 of the differential inductor L2 are connected; the NMOS transistor M11 is connected with the source electrode of the NMOS transistor M12 and is sequentially connected with the first current source CS1 and the switch S1; the drain of the NMOS transistor M21, the gate of the NMOS transistor M22, the connector a21 of the second capacitor C2, and the connection point P12 of the differential inductor L1 are connected; the drain of the NMOS transistor M22, the gate of the NMOS transistor M21, the connector a22 of the second capacitor C2, and the connection point P22 of the differential inductor L2 are connected; the NMOS transistor M21 is connected to the source of the NMOS transistor M22 and is connected to the second current source CS2 and the switch S2 in sequence.

As shown in fig. 2, when the switch S1 and the switch S2 are both closed, the first current source CS1 and the second current source CS2 are both in a normal operating state, the currents I of the first current source CS1 and the second current source CS2 are equal, and the total current of the voltage controlled oscillator is 2I. At this time, the voltage controlled oscillator in the present embodiment is in the high performance mode.

In the embodiment of the present invention, the first capacitor C1 and the second capacitor C2 are adjustable capacitors. Specifically, the first capacitor C1 and the second capacitor C2 are both capacitors supported by a standard CMOS process.

In the embodiment of the present invention, the first current source CS1 and the second current source CS2 are NMOS transistor current sources. The differential inductor L1 and the differential inductor L2 are both on-chip spiral inductors supported by a standard CMOS process.

Fig. 3 is a schematic diagram of the layout design of the coupling inductor structure according to an embodiment of the present invention. Specifically, the embodiment of the present invention provides a coupling inductor structure using a single inductor coil with a center tap. As shown, the center tap of the inductor L1 is P10, the center tap of the inductor L2 is P20, and the center taps P10 and P20 are connected to the voltage source VDD; connectors P11 and P12 are two connectors of inductor L1, and connectors P21 and P22 are two links of inductor L2. In this embodiment, the connection between the core circuit and the inductor in the voltage-controlled oscillator is as follows: the core circuit 10 is connected to the connector P11 of the inductor L1 and the connector P21 of the inductor L2, and the core circuit 20 is connected to the connector P12 of the inductor L1 and the connector P22 of the inductor L2. In other embodiments of the present invention, the connection mode between the core circuit and the inductor in the voltage-controlled oscillator may be further connected as follows: the core circuit 10 is connected to the connector P11 of the inductor L1 and the connector P22 of the inductor L2, and the core circuit 20 is connected to the connector P12 of the inductor L1 and the connector P21 of the inductor L2.

In the high performance mode, the overall current of the voltage controlled oscillator in the present embodiment is 2I. Compared with the traditional voltage-controlled oscillator structure with the same performance, the structure of the coupling inductor is used, and each single inductor coil in each coupling inductor uses the middle tap, so that the distance from the inductor tap to the wiring of a voltage source is greatly shortened, and the phase noise caused by overlong wiring is effectively reduced.

High power transmitter modules are typically included in highly integrated communication chips. The inductors or transformers used in the high power transmitter module generate a strong on-chip magnetic field. This magnetic field may interfere with the proper operation of the voltage controlled oscillator through the leaked magnetic field, degrading the phase noise performance of the oscillator, or becoming a pull.

The utility model discloses the selection that can make two coils pass through the inductance wire winding and be connected with the electricity of well inductance makes the interference that receives through the magnetic coupling offset each other, and the interference suppression is disturbed, solves and pulls the problem.

As shown in fig. 4, it is a simulation comparison diagram of the embodiment of the present invention and the conventional voltage-controlled oscillator. The solid line shown in the figure is the phase noise characteristic curve corresponding to the voltage-controlled oscillator in the embodiment of the present invention, and the graph is the phase noise characteristic curve corresponding to the conventional voltage-controlled oscillator shown in fig. 1. It can be seen that the phase noise corresponding to the voltage-controlled oscillator circuit shown in the embodiment of the present invention is much lower than that of the conventional voltage-controlled oscillator structure.

When only one of the switch S1 or the switch S2 is closed, the voltage-controlled oscillator is in a low power consumption state, only one of the first current source CS1 or the second current source CS2 is in a normal operation state, and the overall current of the voltage-controlled oscillator is equal to the current I of the first current source or the second current source.

As shown in fig. 5, it is an equivalent circuit diagram of the embodiment of the present invention in the low power consumption operation mode. At this time, the phase noise is the same as the same kind of design.

To sum up, in the present invention, when the switch S1 and the switch S2 are both closed, the voltage-controlled oscillator is in a high performance state, and at this time, the currents of the first current source and the second current source are equal, and the overall current of the voltage-controlled oscillator is twice the current of the first current source or the second current source; when only one of the switch S1 or the switch S2 is closed, the voltage controlled oscillator is in a low power consumption state, only one of the first current source or the second current source is in a normal operation state, and the overall current of the voltage controlled oscillator is equal to the current of the first current source or the second current source. Therefore, the voltage-controlled oscillator can be flexibly configured into two working modes of high performance and low power consumption, and is suitable for multi-standard and multi-mode chips. In addition, because the voltage-controlled oscillator is provided with the coupling inductance structure, each single inductance coil in the coupling inductance structure adopts a middle tap design, and the position of the middle tap and the joint positions at the two ends of the inductance are at the same end in a circuit layout, the wiring length of a power line is reduced, and the phase noise performance is improved. The coupling inductance structure can inhibit the magnetic field coupling from other inductors or transformers on the chip through the circuit connection of the inductance coil, thereby solving the traction problem of the common integrated power amplifier in the communication chip to the voltage-controlled oscillator.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present invention, and the scope of the present invention is defined by the appended claims.

Claims

1. A voltage controlled oscillator, comprising: the circuit comprises a first core circuit, a second core circuit and a coupling inductance structure; wherein,

the coupling inductor structure comprises a coupling inductor consisting of a differential inductor L1 and a differential inductor L2 which are symmetrical to each other, wherein the differential inductor L1 is provided with a middle tap P10, a connection point P11 and a connection point P12 at a first end, the differential inductor L2 is provided with a middle tap P20, a connection point P21 and a connection point P22 at a second end, the first end is opposite to the second end, and the middle tap P10 is connected with the middle tap P20 and is connected to a voltage source;

the first core circuit comprises an NMOS transistor M11, an NMOS transistor M12, a first capacitor, a first current source and a switch S1; the first capacitor is provided with a connector A11 and a connector A12; the second core circuit comprises an NMOS transistor M21, an NMOS transistor M22, a second capacitor, a second current source and a switch S2; the second capacitor is provided with a connector A21 and a connector A22; wherein,

the drain of the NMOS transistor M11, the gate of the NMOS transistor M12, the connector a11 of the first capacitor, and the connection point P11 of the differential inductor L1 are connected; the drain of the NMOS transistor M12, the gate of the NMOS transistor M11, the connector a12 of the first capacitor, and the connection point P21 of the differential inductor L2 are connected; the NMOS transistor M11 is connected with the source electrode of the NMOS transistor M12 and is sequentially connected with the first current source and the switch S1; the drain of the NMOS transistor M21, the gate of the NMOS transistor M22, the connector a21 of the second capacitor, and the connection point P12 of the differential inductor L1 are connected; the drain of the NMOS transistor M22, the gate of the NMOS transistor M21, the connector a22 of the second capacitor, and the connection point P22 of the differential inductor L2 are connected; the NMOS transistor M21 is connected to the source of the NMOS transistor M22 and is connected to the second current source and the switch S2 in sequence.

2. The voltage controlled oscillator of claim 1, wherein the first current source and the second current source each comprise NMOS transistors.

3. The voltage controlled oscillator of claim 1, wherein the differential inductor L1 and the differential inductor L2 are both on-chip spiral inductors supported by standard CMOS processes.

4. The voltage controlled oscillator of claim 1, wherein the first capacitor and the second capacitor are both tunable capacitors.

5. The voltage controlled oscillator of claim 1, wherein the first capacitor and the second capacitor are both standard CMOS process supported capacitors.