CN211785753U

CN211785753U - Wireless transmission harmonic current acquisition instrument based on nRF2401

Info

Publication number: CN211785753U
Application number: CN202020159336.3U
Authority: CN
Inventors: 杨剑锋; 丁宇; 齐仁德
Original assignee: Lanzhou Jiaotong University
Current assignee: Lanzhou Jiaotong University
Priority date: 2020-02-07
Filing date: 2020-02-07
Publication date: 2020-10-27
Anticipated expiration: 2030-02-07

Abstract

The utility model provides a wireless transmission harmonic current gathers appearance based on nrF2401, includes data acquisition sending module and wireless receiving module, data acquisition sending module includes current signal acquisition circuit, voltage signal acquisition circuit, first singlechip and first wireless transceiver chip, wireless receiving module includes second wireless transceiver chip, second singlechip and USB interface converting circuit. Compared with the prior art, the utility model has the advantages that: 1. the acquisition and wireless transmission of multi-path harmonic current signals can be realized, the measurement wiring is simple and convenient, the transmission distance is long, and the method has strong adaptability to the environment; 2. the acquisition module and the wireless transceiver module which take the singlechip STC15F2K60S2 and the wireless transceiver chip nRF24L01 as cores have the advantages of ultralow power consumption, reliable data transceiving and simple peripheral configuration, and can enhance the adaptability and the accuracy of the device.

Description

Wireless transmission harmonic current acquisition instrument based on nRF2401

Technical Field

The utility model relates to an electric power system control field, concretely relates to wireless transmission harmonic current gathers appearance based on nRF 2401.

Background

As nonlinear loads (such as rectifiers, frequency converters, and the like) are used in large quantities, the problem of power quality is becoming more serious, and harmonic pollution is the main problem. With the advance of smart grid construction, various distributed power sources and energy storage devices begin to appear, and when the devices are operated in a grid-connected mode, certain harmonic wave influence is brought to a power grid. In order to improve the power quality, suppress the harmonic current, and implement accurate power quality control, the acquisition of the harmonic current data is very important. At present, most current collection devices still adopt a wired connection mode. When equipment and circuit quantity are less, wired connection mode can also effectively operate, but when equipment and circuit quantity are more, its problem will be obvious, if the cable is laid the investment too big, the cable is arranged the difficulty, sometimes even because of reasons such as contact failure produce the spark, cause the accident.

At present, most wireless communication technologies applied in the aspect of current wireless monitoring mainly include bluetooth, but the use of these communication technologies in the wireless current collection process still has many defects, such as the bluetooth needs a complex communication protocol, and has high cost, large power loss, short transmission distance, and the like.

SUMMERY OF THE UTILITY MODEL

In order to solve prior art's harmonic acquisition circuit wiring complicated, the near problem of transmission distance, the utility model discloses a harmonic signal is gathered to the singlechip to data that will gather send PC end to through wireless communication chip nRF24L0 in real time, the cost and the complexity of device are low, improve the reliability and the practicality of device.

A wireless transmission harmonic current acquisition instrument based on nRF2401 comprises a data acquisition and transmission module and a wireless receiving module, wherein the data acquisition and transmission module comprises a current signal acquisition circuit, a voltage signal acquisition circuit, a first single chip microcomputer and a first wireless transceiving chip, an ADC (analog-to-digital converter) module is arranged in the first single chip microcomputer, the current signal acquisition circuit and the voltage signal acquisition circuit are respectively connected with the ADC module of the first single chip microcomputer, and the first wireless transceiving chip is connected with the first single chip microcomputer;

the wireless receiving module comprises a second wireless receiving and transmitting chip, a second single chip microcomputer and a USB interface conversion circuit, the second wireless receiving and transmitting chip is in wireless connection with the first wireless receiving and transmitting chip, the second single chip microcomputer is respectively connected with the second wireless receiving and transmitting chip and the USB interface conversion circuit, and the USB interface conversion circuit is connected with the upper computer through a USB interface.

Preferably, the current signal acquisition circuit comprises a hall current sensor U4, a first operational amplifier U5A, a sixteenth resistor R16, a seventeenth resistor R17, a fifteenth resistor R15 and a tenth capacitor C10, wherein four pins and five pins of the hall current sensor U4 are connected to a line to be detected, three pins of the hall current sensor U4 are connected to three pins of the first operational amplifier U5A through the sixteenth resistor R16, one end of the seventeenth resistor R17 is connected to three pins of the first operational amplifier U5A, the other end of the seventeenth resistor R17 is grounded, one pin of the first operational amplifier U5A is connected to one end of the fifteenth resistor R15, the other end of the fifteenth resistor R15 is connected to the tenth capacitor C10 and the ADC module of the first single chip microcomputer, and the other end of the tenth capacitor C10 is grounded.

Preferably, the voltage signal acquisition circuit includes a fifth resistor R5, a sixth resistor R6, an eleventh resistor R11, a twelfth resistor R12, a hall voltage sensor U2, a ninth resistor R9, a tenth resistor R10, a seventh resistor R7, a thirteenth resistor R13, a second operational amplifier U1B, a first resistor R1, an eighth resistor R8, and a fourth capacitor C4, one end of the fifth resistor R5 is connected to the line to be detected, the other end of the fifth resistor R6 is connected to the two legs of the hall voltage sensor U2, one end of the eleventh resistor R2 is connected to the line to be detected, the other end of the eleventh resistor R2 is connected to one leg of the hall voltage sensor U2 through the twelfth resistor R2, the three legs of the hall voltage sensor U2 are connected to the five legs of the second operational amplifier U1 2 through the seventh resistor R2, the four legs of the hall voltage sensor U2 are connected to the sixth resistor U1 of the ninth operational amplifier U2 and the ninth resistor R2, and the two legs of the ninth operational amplifier U2 are connected to the fourth operational amplifier U2 and the ninth resistor R2 through the thirteenth resistor R2, respectively The fifth pin of the second operational amplifier U1B is connected to a 1.5V voltage source through a first resistor R1, the seventh pin of the second operational amplifier U1B is connected to one end of an eighth resistor R8, the other end of the eighth resistor R8 is connected to the fourth capacitor C4 and the ADC module of the first chip 3, and the other end of the fourth capacitor C4 is grounded.

Preferably, the voltage boost circuit further comprises a second resistor R2, a voltage stabilization chip U3, a fourth resistor R4, an eighteenth resistor R18, a third operational amplifier U1A, a nineteenth resistor R19 and a third capacitor C3, one end of the second resistor R2 is connected with an input power supply, the other end of the second resistor R2 is connected with the anode of the voltage stabilization chip U3 and one end of a fourth resistor R4, the other end of the fourth resistor R4 is connected with the three pins of the third operational amplifier U1A and one end of the eighteenth resistor R18, the other end of the eighteenth resistor R18 is connected with the cathode of the voltage stabilization chip U3 and grounded, one pin of the third operational amplifier U1A is connected with one end of a nineteenth resistor R19, the other end of the nineteenth resistor R19 is connected with the third capacitor C3 and the first resistor R1, and the other end of the third capacitor C67 3 is grounded.

Preferably, the first single chip microcomputer and the first wireless transceiver chip are connected through an SPI interface, and the second wireless transceiver chip and the second single chip microcomputer are connected through an SPI interface.

Preferably, the USB interface conversion circuit includes a USB conversion chip U7, a data bus of the USB conversion chip U7 is connected to a data bus P0 port of the second single chip microcomputer, a four-pin, a three-pin, a two-pin, a nineteen-pin, and a one-pin of the USB conversion chip U7 are respectively connected to a forty-five pin, a forty-six pin, a forty-seven pin, a forty-eight pin, and a forty-nine pin of the second single chip microcomputer, and a six-pin and a seven-pin of the USB conversion chip U7 are connected to the upper computer through USB interfaces.

Preferably, the current signal acquisition circuit and the voltage signal acquisition circuit are respectively provided with three paths, and the three paths of current signal acquisition circuit and the three paths of voltage signal acquisition circuit are respectively connected with the ADC module of the first single chip microcomputer.

Compared with the prior art, the utility model has the advantages that: 1. the acquisition and wireless transmission of multi-path harmonic current signals can be realized, the measurement wiring is simple and convenient, the transmission distance is long, and the method has strong adaptability to the environment; 2. the acquisition module and the wireless transceiver module which take the single-chip STC15F2K60S2 and the wireless transceiver chip nRF24L01 as cores have the advantages of ultra-low power consumption, reliable data transceiving and simple peripheral configuration, and can enhance the adaptability and the accuracy of the device; 3. the collected data is transmitted to the PC end in real time through the wireless communication chip nRF24L0 and is stored at the PC end, so that the data is convenient to further process, the cost and the complexity of the device can be reduced, and the reliability and the practicability of the device are improved.

Drawings

FIG. 1 is a block diagram of the present invention;

FIG. 2 is a circuit diagram of the current signal acquisition circuit of the present invention;

FIG. 3 is a circuit diagram of the voltage signal acquisition circuit of the present invention;

FIG. 4 is a circuit diagram of the voltage boost circuit of the present invention;

fig. 5 is a circuit diagram of the first single chip microcomputer and the first wireless transceiver chip of the present invention;

fig. 6 is a circuit diagram of the second single chip microcomputer and the USB interface conversion circuit of the present invention.

Detailed Description

The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are presented herein only to illustrate and explain the present invention, and not to limit the present invention.

As shown in fig. 1, a wireless transmission harmonic current collector based on nRF2401 comprises a data collecting and transmitting module and a wireless receiving module, wherein the data collecting and transmitting module comprises a current signal collecting circuit 1, a voltage signal collecting circuit 2, a first single chip microcomputer 3 and a first wireless transceiving chip 4, an ADC module is arranged in the first single chip microcomputer 3, the current signal collecting circuit 1 and the voltage signal collecting circuit 2 are respectively connected with the ADC module of the first single chip microcomputer 3, and the first wireless transceiving chip 4 is connected with the first single chip microcomputer 3;

the wireless receiving module comprises a second wireless transceiving chip 5, a second single chip microcomputer 6 and a USB interface conversion circuit 7, the second wireless transceiving chip 5 is in wireless connection with the first wireless transceiving chip 4, the second single chip microcomputer 6 is respectively connected with the second wireless transceiving chip 5 and the USB interface conversion circuit 7, and the USB interface conversion circuit 7 is connected with an upper computer through a USB interface.

As shown in fig. 2, the current signal collecting circuit 1 includes a hall current sensor U4, a first operational amplifier U5A, a sixteenth resistor R16, a seventeenth resistor R17, a fifteenth resistor R15 and a tenth capacitor C10; because electric power once side equipment actual current is very big, can not directly be used for the conditioning circuit to handle, need convert the actual current of high amplitude into the direct current voltage signal of the low amplitude that the conditioning circuit can handle, hall current sensor U4 can adopt ACS758 hall current sensor, ACS758 hall current sensor possess very high reliability and extremely low consumption, simple to operate, its measuring range: the primary side sampling current extreme value is 200A, the sensitivity is 10mV/A at 25 ℃, and the nonlinearity is 1%; the output voltage of a signal acquired by the hall current sensor U4 is divided by the resistors R16 and R17 and then output to the first operational amplifier U5A, the voltage is limited between 0V and 3.3V, the operational amplifier circuit U5A realizes the functions of input voltage amplitude limiting, voltage following and impedance isolation, the error of data transmission of a wireless transceiver chip caused by overlarge amplitude is reduced, and the output signal of the first operational amplifier circuit U5A is filtered by an RC filter circuit consisting of the fifteenth resistor R15 and the tenth capacitor C10 and then input to an ADC module of the first single chip microcomputer 3.

As shown in fig. 3, the voltage signal acquisition circuit 2 includes a fifth resistor R5, a sixth resistor R6, an eleventh resistor R11, a twelfth resistor R12, a hall voltage sensor U2, a ninth resistor R9, a tenth resistor R10, a seventh resistor R7, a thirteenth resistor R13, a second operational amplifier U1B, a first resistor R1, an eighth resistor R8, and a fourth capacitor C4; because the actual voltage of the primary side equipment of the power is very large and cannot be directly used for processing the conditioning circuit, the actual voltage with high amplitude needs to be converted into a direct current voltage signal with low amplitude which can be processed by the conditioning circuit, the Hall voltage sensor U2 can adopt a TV19E Hall voltage sensor, the effective value of the primary side rated current measured by the TV19E Hall voltage sensor is 5mA, the transformation ratio is 2000:2000, the effective value of the secondary side rated output current is 5mA, and the nonlinearity effective value is less than 0.2%; firstly, a voltage signal to be measured is input to a hall voltage sensor U2 through a fifth resistor R5, a sixth resistor R6, an eleventh resistor R11 and a twelfth resistor R12 of four metal film resistors, because the TV19E is a current type voltage transformer, a signal output by the hall voltage sensor U2 is converted into a voltage signal through a 500 ohm resistor obtained by connecting a ninth resistor R9 and a tenth resistor R10 in parallel, and then the voltage signal is input to a second operational amplifier U1B, the second operational amplifier U1B is filtered by an RC filter circuit consisting of an eighth resistor R8 and a fourth capacitor C4 and then input to an ADC module of the first single chip microcomputer 3, because the single chip microcomputer can only measure direct current, the alternating current is raised to direct current by using an input voltage of 1.5V, and the value detected by the single chip microcomputer can be restored by subtracting 1.5 during subsequent data processing.

As shown in fig. 4, the voltage signal acquiring circuit 2 further includes a voltage boost circuit 21, the voltage boost circuit 21 includes a second resistor R2, a voltage stabilizing chip U3, a fourth resistor R4, an eighteenth resistor R18, a third operational amplifier U1A, a nineteenth resistor R19, and a third capacitor C3, the voltage stabilizing chip U3 adopts an LM4040a30 precision voltage source chip, when a 3.3V power supply is used for supplying power, the second resistor R2 takes the value of 51 Ω, and when a 5V power supply is used for supplying power, the second resistor R2 takes the value of 330 Ω, and the voltage output by the voltage stabilizing chip U3 is conditioned by a voltage follower formed by the third operational amplifier U1A, an RC filter circuit formed by the nineteenth resistor R19, and the third capacitor C3, and then outputs a constant 1.5V dc voltage, which is supplied to the voltage signal acquiring circuit 2.

The current signal acquisition circuit 1 and the voltage signal acquisition circuit 2 are respectively provided with three paths, the first single chip microcomputer 3 adopts an STC15F2K60S2 single chip microcomputer, an 8-channel 10-bit ADC is arranged in the STC15F2K60S2 single chip microcomputer, and signals output by the current signal acquisition circuit 1 and the voltage signal acquisition circuit 2 can be respectively converted into digital signals.

As shown in fig. 5, the first single chip microcomputer 3 and the first wireless transceiver chip 4 are connected through an SPI interface, the first wireless transceiver chip 4 employs an nRF24L01 wireless communication chip, and nRF24L01 is a single chip wireless transceiver chip manufactured by norwegian NORDIC corporation and operating in a frequency band of 2.4GHz to 2.5 GHz. Because it has ultra-low consumption, receiving and dispatching data reliable, peripheral configuration is simple, and first singlechip 3 receives the digital signal and sends second wireless transceiver chip 5 through first wireless transceiver chip 4, and second wireless transceiver chip 5 adopts SPI interface connection with second singlechip 6 equally, and second wireless transceiver chip 5 transmits digital signal to second singlechip 6.

As shown in fig. 6, the USB interface conversion circuit 7 includes a USB conversion chip U7, the USB conversion chip U7 employs a USB bus interface chip CH372, the CH372 is a pure USB interface chip without an integrated CPU inside, and has an 8-bit data bus, a read, write, chip select control line and an interrupt output, which can be conveniently hooked to the single chip microcomputer, and the data bus and the control signal line of the USB conversion chip U7 are respectively connected to the second single chip microcomputer 6, so that the second single chip microcomputer 6 can conveniently communicate with the PC side of the upper computer.

The utility model discloses at concrete during operation: the current signal acquisition circuit 1 and the voltage signal acquisition circuit 2 respectively use a Hall sensor to acquire harmonic current signals and voltage signals, can convert high-amplitude actual voltage and current signals of primary side equipment of electric power into low-amplitude signals, and input the signals into an ADC (analog to digital converter) module of the first single chip microcomputer 3 after conditioning and filtering, the ADC module of the first single chip microcomputer 3 converts the harmonic signals into digital signals and transmits the digital signals to the second wireless transceiver chip 5 through the first wireless transceiver chip 4 by using a wireless communication technology, and the second single chip microcomputer 6 receives the digital signals and then is in wired connection with external upper computer PC (personal computer) equipment through a USB (universal serial bus) interface conversion circuit 7 and stores the digital signals in the PC equipment; in the whole signal transmission process, the first single chip microcomputer and the second single chip microcomputer do not need to store signals, and the signals are finally stored on the PC side.

It should be noted that there are infinite specific structures due to the limited character expressions, and it will be apparent to those skilled in the art that various improvements, decorations or changes can be made without departing from the principles of the present invention, and the technical features can be combined in a suitable manner; the application of these modifications, variations or combinations, or the application of the concepts and solutions of the present invention in other contexts without modification, is not intended to be considered as a limitation of the present invention.

Claims

1. The wireless transmission harmonic current collector based on the nRF2401 is characterized by comprising a data collecting and sending module and a wireless receiving module, wherein the data collecting and sending module comprises a current signal collecting circuit (1), a voltage signal collecting circuit (2), a first single chip microcomputer (3) and a first wireless transceiving chip (4), an ADC (analog to digital converter) module is arranged in the first single chip microcomputer (3), the current signal collecting circuit (1) and the voltage signal collecting circuit (2) are respectively connected with the ADC module of the first single chip microcomputer (3), and the first wireless transceiving chip (4) is connected with the first single chip microcomputer (3);

the wireless receiving module comprises a second wireless transceiving chip (5), a second single chip microcomputer (6) and a USB interface conversion circuit (7), the second wireless transceiving chip (5) is in wireless connection with the first wireless transceiving chip (4), the second single chip microcomputer (6) is respectively connected with the second wireless transceiving chip (5) and the USB interface conversion circuit (7), and the USB interface conversion circuit (7) is connected with an upper computer through a USB interface.

2. The nRF 2401-based wireless transmission harmonic current collector as claimed in claim 1, wherein the current signal collecting circuit (1) includes a hall current sensor U4, a first operational amplifier U5A, a sixteenth resistor R16, a seventeenth resistor R17, a fifteenth resistor R15 and a tenth capacitor C10, four and five pins of the hall current sensor U4 are connected to the line to be detected, three pins of the hall current sensor U4 are connected to three pins of a first operational amplifier U5A through the sixteenth resistor R16, one end of the seventeenth resistor R17 is connected to three pins of the first operational amplifier U5A, the other end is grounded, one pin of the first operational amplifier U5A is connected to one end of a fifteenth resistor R15, the other end of the fifteenth resistor R15 is connected to ADC modules of the tenth capacitor C10 and the first capacitor (3), and the other end of the tenth capacitor C10 is grounded.

3. The nRF 2401-based wireless transmission harmonic current collector as claimed in claim 1, wherein the voltage signal collection circuit (2) comprises a fifth resistor R5, a sixth resistor R6, an eleventh resistor R11, a twelfth resistor R12, a hall voltage sensor U2, a ninth resistor R9, a tenth resistor R10, a seventh resistor R7, a thirteenth resistor R13, a second operational amplifier U1B, a first resistor R1, an eighth resistor R8, and a fourth capacitor C4, wherein one end of the fifth resistor R5 is connected to the line to be detected, the other end of the fifth resistor R6 is connected to the second leg of the hall voltage sensor U2, one end of the eleventh resistor R11 is connected to the line to be detected, the other end of the eleventh resistor R11 is connected to the first leg of the hall voltage sensor U2 through the twelfth resistor R12, the third leg of the hall voltage sensor U2 is connected to the second leg of the second operational amplifier U1 through the seventh resistor R7, and the fourth leg of the hall voltage sensor U368658 is connected to the fourth leg of the hall voltage sensor U867 through the operational amplifier R8658 The two ends of the ninth resistor R9 and the tenth resistor R10 are respectively connected with the three pins and the four pins of the Hall voltage sensor U2, the five pin of the second operational amplifier U1B is connected with a 1.5V voltage source through the first resistor R1, the seven pin of the second operational amplifier U1B is connected with one end of the eighth resistor R8, the other end of the eighth resistor R8 is respectively connected with the fourth capacitor C4 and an ADC module of the first single chip microcomputer (3), and the other end of the fourth capacitor C4 is grounded.

4. The nRF 2401-based wireless transmission harmonic current collector as claimed in claim 3, the voltage-boosting circuit is characterized by further comprising a voltage-boosting circuit (21), wherein the voltage-boosting circuit (21) comprises a second resistor R2, a voltage-stabilizing chip U3, a fourth resistor R4, an eighteenth resistor R18, a third operational amplifier U1A, a nineteenth resistor R19 and a third capacitor C3, one end of the second resistor R2 is connected with an input power supply, the other end is connected with the anode of the voltage-stabilizing chip U3 and one end of a fourth resistor R4, the other end of the fourth resistor R4 is connected with the tripod of the third operational amplifier U1A and one end of an eighteenth resistor R18, the other end of the eighteenth resistor R18 is connected with the cathode of the voltage-stabilizing chip U3 and is grounded, one pin of the third operational amplifier U1A is connected to one end of a nineteenth resistor R19, the other end of the nineteenth resistor R19 is connected to the third capacitor C3 and the first resistor R1, and the other end of the third capacitor C3 is grounded.

5. The nRF 2401-based wireless transmission harmonic current collector as claimed in claim 1, wherein said first single chip (3) and first wireless transceiver chip (4) are connected through SPI interface, and said second wireless transceiver chip (5) and second single chip (6) are connected through SPI interface.

6. The nRF 2401-based wireless transmission harmonic current collector as claimed in claim 1, wherein the USB interface conversion circuit (7) includes a USB conversion chip U7, a data bus of the USB conversion chip U7 is connected to a data bus P0 port of the second single chip microcomputer (6), four pins, three pins, two pins, nineteen pins and one pin of the USB conversion chip U7 are respectively connected to forty-five pins, forty-six pins, forty-seven pins, forty-eight pins and forty-nine pins of the second single chip microcomputer (6), and six pins and seven pins of the USB conversion chip U7 are connected to the upper computer through USB interfaces.

7. The nRF 2401-based wireless transmission harmonic current collector as claimed in claim 1, wherein the current signal collecting circuit (1) and the voltage signal collecting circuit (2) are respectively provided with three circuits, and the three circuits of current signal collecting circuit (1) and voltage signal collecting circuit (2) are respectively connected with the ADC module of the first single chip microcomputer (3).