CN211579936U

CN211579936U - Fast power supply modulation circuit of amplifier

Info

Publication number: CN211579936U
Application number: CN202020243868.5U
Authority: CN
Inventors: 王曾祺; 李南; 陆建华
Original assignee: Shanghai Archiwave Electronic Technology Co ltd
Current assignee: Shanghai Archiwave Electronic Technology Co ltd
Priority date: 2020-03-03
Filing date: 2020-03-03
Publication date: 2020-09-25
Anticipated expiration: 2030-03-03

Abstract

The utility model relates to a quick power supply modulation circuit of amplifier, including the common source transistor, the source ground connection of common source transistor, the grid of common source transistor passes through bias resistance and connects offset voltage, and the power end is connected to the drain electrode of common source transistor to the grid of common source transistor is coupled to the radio frequency signal input end, according to the utility model discloses an amplifier circuit still includes the power modulation switch, and the modulation circuit is connected to the control port of power modulation switch, and port connection offset voltage under the output of power modulation switch, port is coupled to the radio frequency signal input end on the output of power modulation switch.

Description

Fast power supply modulation circuit of amplifier

Technical Field

The utility model relates to a radio frequency microwave communication field especially relates to an amplifier fast power supply modulation circuit.

Background

In radio frequency microwave systems such as wireless communication and radar, amplifiers are widely applied to various receiving and transmitting links and used for amplifying weak signals. In a time division communication system, the receiving and transmitting modes need to be switched continuously, so that the system requires that a transceiving link has a fast switching time, an amplifier is used as a vital active device in the transceiving link, and the switching time of the amplifier directly determines the switching time of the transceiving link. Therefore, it is desirable to invent an amplifier circuit with fast power supply modulation.

Drain power modulation, a common fast power modulation implementation, is widely used in iii-v amplifiers, and its schematic block diagram is shown in fig. 1, where a power modulator P1 is placed under the power supply, and the main problem of this structure is that it is not suitable for use in high-voltage power systems. Because, in a high-voltage system, when the switching tube P1 is turned on, the gate-source voltage of the P1 tube is too large, which will affect the lifetime of the P1 tube and even directly cause the gate-source of the P1 tube to break down.

As another common implementation manner of power supply modulation, a schematic block diagram of conventional gate power supply modulation is shown in fig. 2, and the switching time of the amplifier is determined by Rg Cpar by controlling the gate bias voltage VBIAS _ N1 of the amplifying transistor N1, where Cpar is the parasitic capacitance on the gate node of the common source MOS transistor. However, the system usually requires the amplifier to have low noise, so that the value of Rg is large, and therefore, the switching time of the conventional gate power supply modulation amplifier is long, and the switching time is as shown in fig. 3.

SUMMERY OF THE UTILITY MODEL

In order to meet the requirement of various time division communication systems on the switching time of a transmitting-receiving link, and meanwhile, the performance of the existing amplifier cannot be influenced, and the high power supply voltage requirement can be met, therefore, a novel fast power supply modulation circuit structure applied to the amplifier needs to be provided.

According to an aspect of the utility model, a fast power supply modulation circuit of amplifier is provided, including the common source transistor, the source ground connection of common source transistor, the grid of common source transistor passes through bias resistance and connects bias voltage, the drain electrode connection power end of common source transistor, and the grid of common source transistor is coupled to the radio frequency signal input end, still includes the power modulation switch, the modulation circuit is connected to the control port of power modulation switch, the port is coupled to on the output of power modulation switch the radio frequency signal input end, port connection bias voltage under the output of power modulation switch, make two output ports of power modulation switch with bias resistance is parallelly connected.

According to the utility model discloses a fast power modulation circuit of another aspect, wherein the power modulation switch is NMOS pipe or PMOS pipe.

According to the utility model discloses a fast power supply modulation circuit of another aspect still includes load circuit, and wherein the drain-source resistance of common source transistor is connected to the power end through load circuit.

According to the utility model discloses a quick power supply modulation circuit of another aspect still includes feedback circuit, and the source electrode of common source transistor passes through feedback circuit ground connection.

According to the utility model discloses a quick power supply modulation circuit of another aspect still includes biasing electric capacity, and biasing resistance and biasing electric capacity ground connection after establishing ties.

According to another aspect of the present invention, a fast power modulation circuit, wherein the modulation circuit comprises a series connection of a first inverter, an RC delay circuit, an nor gate circuit and an odd number of second inverters.

According to the utility model discloses a fast power supply modulation circuit of another aspect, wherein modulation circuit still includes the odd number third phase inverter of series connection for produce the enable signal of first bias voltage.

Compare with traditional grid power supply modulation amplifier grid voltage and establish and release time, according to the utility model discloses a fast power supply modulation circuit has more quick grid voltage and establishes and release time, does not receive amplifier supply voltage restriction moreover, can be applied to high supply voltage system.

Drawings

Fig. 1 is a schematic diagram of a conventional drain power modulation.

Fig. 2 is a schematic diagram of the principle of conventional gate power modulation.

Fig. 3 is a schematic diagram of the switching time of the conventional gate power modulation of fig. 2.

Fig. 4(a) is a schematic diagram of an amplifier fast power supply modulation circuit according to an embodiment of the present invention.

Fig. 4(B) and 4(C) are schematic diagrams of specific embodiments of power modulation switches.

Fig. 5 is a schematic diagram of a control timing of the circuit configuration of fig. 4 (a).

Fig. 6 is a schematic diagram of a logic circuit configuration of a circuit configuration that implements the control timing of fig. 5.

Fig. 7 is a timing diagram of the logic circuit configuration of fig. 6.

Fig. 8 is a specific implementation of a bias voltage enable circuit according to an embodiment of the invention.

Fig. 9 is an enable timing diagram of a bias voltage according to an embodiment of the invention.

Fig. 10 is a schematic diagram of the circuit of the present invention compared to the conventional gate supply modulation amplifier bias voltage setup and release times.

Detailed Description

The present invention will be further described with reference to the following embodiments and drawings.

Fig. 4(a) is a schematic diagram of an amplifier fast power supply modulation circuit according to an embodiment of the present invention. As shown in fig. 4(a), the power modulation circuit according to the present invention includes a common source transistor N1, wherein the source of the common source transistor N1 is grounded, the gate is connected to the bias voltage VBIAS _ N1 through the bias resistor Rg, the drain is connected to the power supply terminal, and the gate of the common source transistor N1 is coupled to the radio frequency signal input terminal RFIN.

On the basis of the conventional grid power modulation structure shown in fig. 2, the utility model discloses add power modulation switch SW and realize the fast power modulation of amplifier. In the circuit implementation, the control port of the power modulation switch SW is connected to the modulation circuit, the lower output port is connected to the bias voltage VBIAS _ N1, and the upper output port is coupled to the radio frequency signal input terminal, so that the upper and lower output ports of the power modulation switch SW are connected in parallel with the bias resistor Rg, as shown in fig. 4(a), when the power modulation switch SW is closed, the power modulation switch SW is equivalent to a low-value resistor, and a low-resistance channel from the bias voltage VBIAS _ N1 to the gate voltage Vg1 of the common-source transistor N1 is formed. When the amplifier is switched between on and off, the gate voltage Vg1 of the common-source transistor N1 can be quickly established or released through the low-resistance path, so that the amplifier can be quickly switched.

According to an embodiment of the present invention, the power modulation switch SW may be an NMOS transistor as shown in fig. 4(B) or a PMOS transistor as shown in fig. 4 (C). Those skilled in the art will appreciate that the power modulation switch SW is not limited to the specific embodiments of fig. 4(B) and 4 (C).

Further, the utility model provides a fast power modulation function needs to be realized through the control chronogenesis that fig. 5 shows, and its concrete theory of operation is as follows: when the amplifier enable signal EN _ AMP changes from low to high, the control signal SW _ CTR of the power supply modulation switch is kept at high level for a period of time, during which the power supply modulation switch is always closed, so as to provide a low resistance channel through which the bias voltage VBIAS _ N1 can quickly charge the gate parasitic capacitance Cpar of the transistor N1, thereby realizing the quick establishment of the gate voltage Vg1 of the transistor N1; when the gate voltage Vg1 is established, the control signal SW _ CTR of the power modulation switch becomes low level, the power modulation switch is turned off, at this time, the gate voltage Vg1 of the transistor N1 is maintained through the high-resistance channel Rg, and the amplifier is restored to the normal operating mode; when the amplifier enabling signal EN _ AMP is changed from high to low, the control signal SW _ CTR of the power supply modulation switch SW is changed from low to high, so that the power supply modulation switch SW is closed, a low-resistance channel is established, and the gate voltage Vg1 of the transistor N1 is quickly released; then, the gate control signal SW _ CTR of the power modulation switch SW will continue to remain high until the next switching cycle. Therefore, the utility model discloses be applied to the fast power supply modulation circuit of amplifier and can realize.

The power supply modulation circuit according to the above embodiment of the present invention has a fast gate voltage set-up and release time, as compared with the gate voltage set-up and release time of the conventional gate power supply modulation amplifier, as shown in fig. 10. In addition, according to the utility model discloses a power supply modulation circuit is not restricted by amplifier supply voltage, can be applied to high supply voltage system.

Another aspect of the present invention provides a circuit structure for implementing the control sequence shown in fig. 5, which is specifically shown in fig. 6. 601, 604, 605 and 606 are inverters, 602 is an RC delay circuit, and 603 is an NOR gate circuit.

Further, the logic circuit shown in fig. 6 further includes

inverters

607, 608, 609, and the logic circuit shown in fig. 6 may further generate an EN _ VBIAS _ N1 signal for generating a gate bias voltage VBIAS _ N1 of the transistor N1. The logic circuit of fig. 6 will produce the waveforms shown in fig. 7.

Further, a specific implementation form of the enable circuit of the gate bias voltage VBIAS _ N1 of the common-source transistor N1 is shown in fig. 8, wherein the control signal EN _ VBIAS _ N1 is from the logic circuit shown in fig. 6, and the enable circuit shown in fig. 8 will generate the timing sequence shown in fig. 9.

The embodiments of the present invention have been described in detail with reference to the drawings, but the present invention is not limited to the above embodiments, and various changes made without departing from the spirit and scope of the present invention should be construed as falling within the scope of the present invention.

For example, in some embodiments, the Transistor may be implemented by a Field Effect Transistor (FET), and specifically includes a Junction Field-Effect Transistor (JFET), a High Electron Mobility Transistor (HEMT), a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET), and the like.

In some embodiments, the transistors are implemented using N-type Field Effect transistors (NMOS FETs) or P-type Field Effect transistors (PMOS FETs).

In the drawings, some features of the structures or methods may be shown in a particular arrangement and/or order. However, it is to be understood that such specific arrangement and/or ordering may not be required. Rather, in some embodiments, the features may be arranged in a manner and/or order different from that shown in the illustrative figures. In addition, the inclusion of a structural or methodical feature in a particular figure is not meant to imply that such feature is required in all embodiments, and in some embodiments, may not be included or may be combined with other features.

It is noted that, in the examples and descriptions of the present invention, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the use of the verb "comprise a" to define an element does not exclude the presence of another, same element in a process, method, article, or apparatus that comprises the element.

While the present application has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application.

Claims

1. An amplifier fast power supply modulation circuit, which comprises a common source transistor, wherein the source electrode of the common source transistor is grounded, the grid electrode of the common source transistor is connected with a bias voltage through a bias resistor, the drain electrode of the common source transistor is connected with a power supply end, and the grid electrode of the common source transistor is coupled to a radio frequency signal input end,

the control port of the power supply modulation switch is connected with the modulation circuit, the lower port of the output of the power supply modulation switch is connected with the bias voltage, and the upper port of the output of the power supply modulation switch is coupled to the radio frequency signal input end, so that the upper and lower output ports of the power supply modulation switch are connected with the bias resistor in parallel.

2. The amplifier circuit of claim 1, wherein the power switch is an NMOS transistor or a PMOS transistor.

3. The amplifier fast power supply modulation circuit according to claim 1, further comprising a load circuit through which the drain of the common source transistor is connected to the power supply terminal.

4. The amplifier fast power supply modulation circuit of claim 1, further comprising a feedback circuit through which a source of the common-source transistor is grounded.

5. The amplifier fast power supply modulation circuit of claim 1, further comprising a bias capacitor, wherein the bias resistor and the bias capacitor are connected in series and then grounded.

6. The amplifier fast power supply modulation circuit according to any one of claims 1-5, wherein the modulation circuit comprises a first inverter, an RC delay circuit, an NOR gate circuit, and an odd number of second inverters connected in series.

7. The amplifier fast power supply modulation circuit of claim 6, further comprising an odd number of third inverters connected in series for generating an enable signal for the bias voltage.