CN211543264U - Voltage output reverse connection prevention circuit - Google Patents
Voltage output reverse connection prevention circuit Download PDFInfo
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- CN211543264U CN211543264U CN202020095871.7U CN202020095871U CN211543264U CN 211543264 U CN211543264 U CN 211543264U CN 202020095871 U CN202020095871 U CN 202020095871U CN 211543264 U CN211543264 U CN 211543264U
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Abstract
The utility model discloses a voltage output reverse connection prevention circuit, which comprises a MOS tube, a triode, a first resistor, a first diode, a second diode and a second resistor; the source electrode of the MOS tube is connected with an output signal Vout of the transformer, and the drain electrode of the MOS tube is connected with the positive output end; the base electrode of the triode is connected with the enable output signal, the collector electrode of the triode is connected with the grid electrode of the MOS tube, and the emitter electrode of the triode is grounded; the first end of the first resistor is connected with the forward output end, the second end of the first resistor is connected with the cathode of the first diode, and the anode of the first diode and the cathode of the second diode are both connected with the base electrode of the triode; the positive electrode of the second diode and the first end of the second resistor are both connected with the emitting electrode of the triode, and the second end of the second resistor is connected with the negative output end. The anti-reverse function can be realized, and meanwhile, the second resistor samples the output current of the charger, so that the output charging current of the charger can be controlled and overcurrent protection can be realized.
Description
Technical Field
The utility model relates to a technical field that charges, concretely relates to voltage output prevents reverse connection circuit.
Background
With the gradual popularization of electric vehicles, the safety performance of a large-current vehicle charging power supply applied to the vehicle is also concerned widely. The most critical safety performance of electric vehicles is the safety performance of fuel cells. And the automobile power supply is directly connected with the fuel cell, and if the positive end and the negative end of the output of the automobile power supply are reversed, the danger of battery explosion can occur. In the electric vehicle, the cable is complex to assemble, and the condition of connecting the positive end and the negative end of the battery reversely occurs in the assembling and maintaining processes. The power supply can be directly damaged, and the battery explosion can be possibly caused, so that an anti-reverse connection circuit is added into the automobile power supply, and the safety performance of the electric automobile is improved.
At present, the traditional scheme generally adopts a relay with an output end connected in series, a control circuit detects the voltage of the output end and then controls the switch of the relay to be closed. Because the output current of the automobile power supply is more than 100A, the relay can meet the requirements at present, but the relay is resistant to high temperature difference and high in cost. Therefore, a new output reverse connection prevention scheme with high reliability, simple circuit and low cost is needed.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to provide a voltage output prevents reverse connection circuit, it can realize preventing reverse function, and second resistance R2 samples charger output current simultaneously, can control and realize overcurrent protection to the output charging current of charger.
In order to solve the above technical problem, the utility model provides a voltage output prevents reverse connection circuit, including MOS pipe Q1, triode Q2, first resistance R1, first diode D1, second diode D2 and second resistance R2;
the source electrode of the MOS tube Q1 is connected with an output signal Vout of the transformer, and the drain electrode of the MOS tube Q1 is connected with the positive output end;
the base electrode of the triode Q2 is connected with an enable output signal, the collector electrode of the triode Q2 is connected with the grid electrode of the MOS transistor Q1, and the emitter electrode of the triode Q2 is grounded;
a first end of a first resistor R1 is connected with a positive output end, a second end of the first resistor R1 is connected with a negative electrode of a first diode D1, and an anode of the first diode D1 and a negative electrode of a second diode D2 are both connected with a base of a triode Q2;
an anode of the second diode D2 and a first end of the second resistor R2 are both connected to an emitter of the transistor Q2, and a second end of the second resistor R2 is connected to a negative output terminal.
Preferably, the device further comprises a third resistor R3, and the third resistor R3 is connected with the second resistor R2 in parallel.
Preferably, the transistor further comprises a fourth resistor R4, one end of the fourth resistor R4 is connected to the source of the MOS transistor Q1, and the other end of the fourth resistor R4 is connected to the collector of the transistor Q2.
Preferably, the device further comprises a third diode D3, wherein the anode of the third diode D3 is connected to the gate of the MOS transistor Q1, and the cathode of the third diode D3 is connected to the source of the MOS transistor Q1.
Preferably, the device further comprises a fifth resistor R5, and the fifth resistor R5 is connected in parallel with the third diode D3.
Preferably, the third diode D3 is a zener diode.
Preferably, a sixth resistor R6 is connected between the base of the transistor Q2 and the enable output signal.
Preferably, the circuit further comprises a seventh resistor R7, and the seventh resistor R7 is connected in parallel with the second diode D2.
The utility model has the advantages that:
1. the utility model discloses a circuit design is nimble, simple structure, only uses two diodes D1 and D2 and second resistance R1 can realize preventing reverse function.
2. The utility model discloses well second resistance R2 can detect the output current of the charger when normally charging effectively, carries out current limitation and overcurrent protection to charger or battery.
3. The utility model discloses under the reversal connection state, positive output is connected with the rechargeable battery negative pole promptly, and negative direction output is connected with the rechargeable battery positive end, and the MOS pipe can be forced to get into the final state, and reaction rate is fast, and is with low costs.
Drawings
Fig. 1 is a schematic structural diagram of an anti-reverse connection circuit of the present invention;
FIG. 2 is a first state diagram of the reverse connection preventing circuit in the reverse connection condition;
fig. 3 is a state diagram two of the reverse connection preventing circuit in the reverse connection condition.
Detailed Description
The present invention is further described with reference to the following drawings and specific embodiments so that those skilled in the art can better understand the present invention and can implement the present invention, but the embodiments are not to be construed as limiting the present invention.
Referring to fig. 1, the utility model discloses a voltage output prevents reverse connection circuit, including MOS transistor Q1, triode Q2, first resistance R1, first diode D1, second diode D2 and second resistance R2. The source of the MOS transistor Q1 is connected to the output signal Vout of the transformer, and the drain of the MOS transistor Q1 is connected to the forward output terminal BATTERY +. The base electrode of the triode Q2 is connected with the enable output signal MCU _ CONTROL, the collector electrode of the triode Q2 is connected with the grid electrode of the MOS tube Q1, and the emitter electrode of the triode Q2 is grounded. The first end of the first resistor R1 is connected to the positive output terminal batt +, the second end of the first resistor R1 is connected to the negative electrode of the first diode D1, and the positive electrode of the first diode D1 and the negative electrode of the second diode D2 are both connected to the base of the transistor Q2. An anode of the second diode D2 and a first end of the second resistor R2 are both connected to an emitter of the transistor Q2, and a second end of the second resistor R2 is connected to a negative output terminal batt-. BATTERY + and BATTERY-are energy storage load signals of a low-voltage storage BATTERY or a super capacitor and the like.
When the positive output terminal BATTERY + is connected with the positive electrode of the BATTERY and the negative output terminal BATTERY-is connected with the negative electrode of the BATTERY when the positive output terminal BATTERY + is normally connected with the energy storage load. The enable output signal MCU _ CONTROL is controlled by the singlechip, the MCU outputs high level in normal work, the triode Q2 is conducted, at the moment, the grid-source voltage of the MOS tube Q1 is negative pressure (larger than the MOS starting threshold), the source electrode and the drain electrode of the MOS tube Q1 are conducted, so Vout charges BATTERY + and BATTERY-through the MOS tube Q1, and normal charging is realized as shown in figure 1.
As shown in fig. 2, when the positive and negative electrodes of the load BATTERY or super capacitor are connected in reverse, i.e. the positive output terminal BATTERY is connected to the positive electrode of the BATTERY, and the negative output terminal BATTERY + is connected to the negative electrode of the BATTERY. At this time, the load battery or the super capacitor is short-circuited by the current second resistor R2, and the second resistor R2 is a sampling resistor. Meanwhile, D2 is positively biased to be conducted, the conduction voltage drop is 0.7V, namely Vbe of a triode Q2 is-0.7V, and the emitter of the triode is forced to be reversely biased. At this time, the MCU _ CONTROL forces the MOS transistor Q1 to enter a cut-off state regardless of whether the single chip outputs a high level. Therefore, the MOS transistor Q1 in the main circuit is turned off rapidly, and VOUT inside the charger is physically disconnected from the battery at this time, thereby protecting the charger and the battery itself, as shown in fig. 3.
The MOS tube is a P-channel MOSFET.
The utility model discloses still include third resistance R3, third resistance R3 is parallelly connected with second resistance R2. The third resistor R3 and the second resistor R2 are connected in parallel, so that the size of the sampling resistor can be adjusted conveniently, and the output current and the sampling output current of the charger can be controlled more flexibly.
The utility model discloses still include fourth resistance R4, fourth resistance R4's one end is connected with MOS pipe Q1's source electrode, and fourth resistance R4's the other end is connected with triode Q2's collecting electrode. The fourth resistor R4 is a voltage dividing resistor.
The utility model discloses still include third diode D3, third diode D3's positive pole and MOS pipe Q1's grid are connected, and third diode D3's negative pole and MOS pipe Q1's source electrode are connected. The utility model discloses still include fifth resistance R5, fifth resistance R5 is parallelly connected with third diode D3. When the triode Q2 is turned on, the fifth resistor R5 and the fourth resistor R4 form a voltage division of Vout, the gate driving voltage of the MOS transistor Q1 is controlled within a reasonable range, and the third diode D3 connected in parallel is a zener diode and plays a role in protecting the gate of the MOS transistor Q1, thereby enhancing the reliability of the operation of the MOS transistor Q1 during the charging process.
A sixth resistor R6 is connected between the base of the transistor Q2 and the enable output signal. This facilitates regulation of the magnitude of the base current of transistor Q2.
The utility model discloses still include seventh resistance R7, seventh resistance R7 is parallelly connected with second diode D2. R7 acts as a pull-down resistor at the base of transistor Q2 and prevents false conduction of transistor Q2 when the MCU does not provide a signal to transistor Q2.
The above-mentioned embodiments are merely preferred embodiments for fully illustrating the present invention, and the scope of the present invention is not limited thereto. Equivalent substitutes or changes made by the technical personnel in the technical field on the basis of the utility model are all within the protection scope of the utility model. The protection scope of the present invention is subject to the claims.
Claims (8)
1. A voltage output anti-reverse connection circuit is characterized by comprising an MOS (metal oxide semiconductor) tube Q1, a triode Q2, a first resistor R1, a first diode D1, a second diode D2 and a second resistor R2;
the source electrode of the MOS tube Q1 is connected with an output signal Vout of the transformer, and the drain electrode of the MOS tube Q1 is connected with the positive output end;
the base electrode of the triode Q2 is connected with an enable output signal, the collector electrode of the triode Q2 is connected with the grid electrode of the MOS transistor Q1, and the emitter electrode of the triode Q2 is grounded;
a first end of a first resistor R1 is connected with a positive output end, a second end of the first resistor R1 is connected with a negative electrode of a first diode D1, and an anode of the first diode D1 and a negative electrode of a second diode D2 are both connected with a base of a triode Q2;
an anode of the second diode D2 and a first end of the second resistor R2 are both connected to an emitter of the transistor Q2, and a second end of the second resistor R2 is connected to a negative output terminal.
2. The voltage output anti-reverse connection circuit according to claim 1, further comprising a third resistor R3, wherein the third resistor R3 is connected in parallel with the second resistor R2.
3. The voltage output anti-reverse connection circuit as claimed in claim 1, further comprising a fourth resistor R4, wherein one end of the fourth resistor R4 is connected to the source of the MOS transistor Q1, and the other end of the fourth resistor R4 is connected to the collector of the transistor Q2.
4. The voltage output anti-reverse connection circuit as claimed in claim 1, further comprising a third diode D3, wherein the anode of the third diode D3 is connected to the gate of the MOS transistor Q1, and the cathode of the third diode D3 is connected to the source of the MOS transistor Q1.
5. The voltage output anti-reverse connection circuit according to claim 4, further comprising a fifth resistor R5, wherein the fifth resistor R5 is connected in parallel with a third diode D3.
6. The voltage output anti-reverse connection circuit according to claim 4, wherein the third diode D3 is a zener diode.
7. The voltage output anti-reverse connection circuit as claimed in claim 1, wherein a sixth resistor R6 is connected between the base of the transistor Q2 and the enable output signal.
8. The voltage output anti-reverse connection circuit according to claim 1, further comprising a seventh resistor R7, wherein the seventh resistor R7 is connected in parallel with a second diode D2.
Priority Applications (1)
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CN202020095871.7U CN211543264U (en) | 2020-01-16 | 2020-01-16 | Voltage output reverse connection prevention circuit |
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CN202020095871.7U CN211543264U (en) | 2020-01-16 | 2020-01-16 | Voltage output reverse connection prevention circuit |
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CN211543264U true CN211543264U (en) | 2020-09-22 |
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Address after: Building 7, No. 15, Weiting Tingrong Street, Suzhou Industrial Park, Jiangsu Province, 215000 Patentee after: Suzhou Hager Electric Control Co.,Ltd. Address before: 215100 Rongting street, Suzhou City, Jiangsu Province Patentee before: SUZHOU HAIGE NEW ENERGY AUTO ELECTRIC CONTROL SYSTEM TECHNOLOGY Co.,Ltd. |