CN211508664U - Dual-intelligent battery charging and discharging management system - Google Patents
Dual-intelligent battery charging and discharging management system Download PDFInfo
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- CN211508664U CN211508664U CN202020196870.1U CN202020196870U CN211508664U CN 211508664 U CN211508664 U CN 211508664U CN 202020196870 U CN202020196870 U CN 202020196870U CN 211508664 U CN211508664 U CN 211508664U
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Abstract
The utility model provides a double-intelligent battery charging and discharging management system, wherein a charging and discharging manager is connected with a direct current input power supply through a direct current input protection circuit; the charge and discharge manager is respectively connected with the battery I and the battery II through a charge and discharge control circuit; the battery I and the battery II are respectively connected with a load through a charge-discharge control circuit; the charge and discharge manager respectively controls the charge and discharge of the battery I and the charge and discharge of the battery II by controlling the charge and discharge control circuit. The system can charge and discharge two intelligent batteries simultaneously, and compared with the traditional sequential discharge, the system can prolong the power supply time and shorten the charging time. The upper computer CAN access the system through a serial port or a CAN bus interface so as to acquire the running states and parameters of the charge controller and the two batteries in real time. Meanwhile, the charging voltage and the charging current of the charging system can be changed by adjusting the configuration resistor and the matching parameters, so that the charging system is suitable for double-battery combinations of different models.
Description
Technical Field
The utility model relates to a battery charge-discharge management technical field especially relates to a two intelligent battery charge-discharge management systems.
Background
In most of the handheld devices or mobile electronic devices, a single battery is used for power supply, and the problem of short power supply time exists due to the limited capacity of the single battery. And the common double-intelligent battery charging and discharging management system does not support the simultaneous charging and discharging of double batteries, and only adopts a sequential discharging mode, namely, the electric quantity of one battery is consumed first and then the electric quantity of a second battery is consumed, so that the power supply time of the batteries is reduced and the charging time is prolonged. Meanwhile, the problem that the communication control of an upper computer is lacked, and the charging voltage and the charging current are fixed and cannot be adjusted exists. Therefore, how to realize the charge and discharge management of the dual-intelligent battery is a technical problem to be solved urgently at present.
SUMMERY OF THE UTILITY MODEL
In order to overcome the problem that single intelligent battery supply time is short and ordinary two intelligent battery can not charge simultaneously or discharge, lack host computer communication control, charging voltage and electric current can not be adjusted, the utility model discloses can support the bi-cell to discharge simultaneously, support simultaneously charging under the bi-cell low loss mode, simultaneously, charging voltage and the biggest charging current are adjustable to provide host computer communication interface, switch the voltage and the charging and discharging current of two batteries of real-time supervision through the SMBus bus.
The method specifically comprises the following steps: a charge and discharge control device, a battery I and a battery II;
the charging and discharging control device is provided with a direct current input protection circuit, a charging and discharging manager and a charging and discharging control circuit;
the charging and discharging manager is connected with the direct-current input power supply through the direct-current input protection circuit;
the charge and discharge manager is respectively connected with the battery I and the battery II through a charge and discharge control circuit;
the battery I and the battery II are respectively connected with a load through a charge-discharge control circuit;
the charge and discharge manager respectively controls the charge and discharge of the battery I and the charge and discharge of the battery II by controlling the charge and discharge control circuit.
Preferably, the charge and discharge manager employs LTC 1760;
the charge and discharge control circuit includes: a switch K1, a switch K2, a switch K3, a switch K4, a switch K5, a MOS transistor Q1, a MOS transistor Q2 and a resistor R1;
the first end of the switch K1 is respectively connected with the output end of the direct current input protection circuit and the D pole of the MOS tube Q1;
the first end of the switch K2 is connected with the charging and supplying end of the battery II and the first end of the switch K5 respectively;
the first end of the switch K3 is connected with the first end of the switch K4 and the charging and supplying end of the battery I respectively;
the second end of the switch K1, the second end of the switch K2, the second end of the switch K3 and the power supply detection end of the charge and discharge manager are respectively connected with the power supply output end of the charge and discharge control device;
the second end of the switch K4 and the second end of the switch K5 are respectively connected with the first end of the resistor R1;
the second end of the resistor R1 is respectively connected with the S pole of the MOS transistor Q1 and the D pole of the MOS transistor Q2;
the S pole of the MOS transistor Q2 is grounded;
the G pole of the MOS transistor Q1 and the G pole of the MOS transistor Q2 are respectively connected with the control end of the charge and discharge manager;
the control end of the charge and discharge manager is also respectively connected with the control end of the switch K1, the control end of the switch K2, the control end of the switch K3, the control end of the switch K4 and the control end of the switch K5.
And the battery detection end of the charge and discharge manager is respectively connected with the battery I and the battery II and respectively acquires the electric quantity state and the output state of the battery I and the electric quantity state and the output state of the battery II.
Preferably, the dc input protection circuit includes: a schottky diode D1 and a self-recovery fuse F1;
the anode of the Schottky diode D1 is connected with a direct current input power supply;
the cathode of the schottky diode D1 is connected to the first end of the self-recovery fuse F1, and the second end of the self-recovery fuse F1 is connected to the first end of the switch K1 and the D-pole of the MOS transistor Q1, respectively.
Preferably, the method further comprises the following steps: a microprocessor and a status display circuit;
the microprocessor is connected with the state display circuit, the microprocessor is connected with the charge and discharge manager through the SMBus bus, and the microprocessor acquires the working state information of the charge and discharge manager and displays the information through the state display circuit.
Preferably, the microprocessor is connected with the upper computer through a serial port or a CAN bus.
The microprocessor adopts C8051F 320;
the state display circuit is provided with a plurality of LED lamps and nixie tubes and is used for respectively indicating charging, discharging, breaking and alarming information of the battery I and charging, discharging, breaking and alarming information of the battery II.
According to the technical scheme, the utility model has the advantages of it is following:
the system can charge and discharge two intelligent batteries simultaneously, and compared with the traditional sequential discharge, the system can prolong the power supply time and shorten the charging time. The upper computer CAN access the system through a serial port or a CAN bus interface so as to acquire the running states and parameters of the charge controller and the two batteries in real time. Meanwhile, the charging voltage and the charging current of the charging system can be changed by adjusting the configuration resistor and the matching parameters, so that the charging system is suitable for double-battery combinations of different models.
In the system, the charge and discharge control device can realize the charge and discharge of the two intelligent batteries under the condition of no host computer management, compared with the traditional sequential discharge mode, the power supply time can be prolonged by 10 percent, and the charge time can be reduced by 50 percent; meanwhile, the charge and discharge manager can realize input power supply switching within 10 microseconds, and power supply interruption is prevented when power supply of the battery and an external power supply is transferred.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings used in the description will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of a dual intelligent battery charge and discharge management system;
FIG. 2 is a circuit diagram of a charge/discharge control device;
fig. 3 is a schematic diagram of an embodiment of a dual intelligent battery charging and discharging management system.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments, and obviously, the embodiments described below are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the scope of protection of this patent.
The utility model provides a two intelligent battery charge-discharge management systems, as shown in FIG. 1, include: a charge and discharge control device, a battery I2 and a battery II 3;
the charging and discharging control device is provided with a direct current input protection circuit 4, a charging and discharging manager 1 and a charging and discharging control circuit 9; the charging and discharging manager 1 is connected with a direct current input power supply through a direct current input protection circuit 4; the charge and discharge manager 1 is respectively connected with a battery I2 and a battery II 3 through a charge and discharge control circuit 9; the battery I2 and the battery II 3 are respectively connected with the load 5 through a charge-discharge control circuit 9; the charge and discharge manager 1 controls the charge and discharge of the battery I2 and the charge and discharge of the battery II 3, respectively, by controlling the charge and discharge control circuit 9.
To further illustrate the specific form of the present invention, as shown in fig. 2, the charge and discharge manager 1 employs an LTC 1760; the charge and discharge manager 1 has three SMBus bus interfaces, a 10-bit current DA converter, and an 11-bit voltage DA converter.
The charge and discharge control circuit 9 includes: a switch K1, a switch K2, a switch K3, a switch K4, a switch K5, a MOS transistor Q1, a MOS transistor Q2 and a resistor R1;
the first end of the switch K1 is respectively connected with the output end of the direct current input protection circuit 4 and the D pole of the MOS tube Q1; the first end of the switch K2 is connected with the charging and supplying end of the battery II 3 and the first end of the switch K5 respectively; the first end of the switch K3 is connected with the first end of the switch K4 and the charging and supplying end of the battery I2 respectively; the second end of the switch K1, the second end of the switch K2, the second end of the switch K3 and the power supply detection end of the charge and discharge manager 1 are respectively connected with the power supply output end of the charge and discharge control device; the second end of the switch K4 and the second end of the switch K5 are respectively connected with the first end of the resistor R1; the second end of the resistor R1 is respectively connected with the S pole of the MOS transistor Q1 and the D pole of the MOS transistor Q2; the S pole of the MOS transistor Q2 is grounded; the G pole of the MOS transistor Q1 and the G pole of the MOS transistor Q2 are respectively connected with the control end of the charge-discharge manager 1; the control terminal of the charge and discharge manager 1 is further connected to the control terminal of the switch K1, the control terminal of the switch K2, the control terminal of the switch K3, the control terminal of the switch K4, and the control terminal of the switch K5, respectively.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.
The switches K1, K2, K3, K4, and K5 may be relays, switches having control nodes, or the like. The charge and discharge manager 1 can control the charging or discharging of the battery I2 and the battery II 3 by controlling the switch K1, the switch K2, the switch K3, the switch K4, the switch K5, the MOS transistor Q1, and the MOS transistor Q2, respectively. When the charge and discharge manager 1 controls the switch K1, the switch K2, the switch K3, the switch K4, the switch K5, the MOS transistor Q1 and the MOS transistor Q2, a power supply path or a charging path can be connected, so that the current charging or power supply requirements are met.
Namely, two intelligent batteries are connected through two N-channel MOS tubes connected in series, the grids of the two MOS tubes are connected with the LTC1760, and the conduction state is controlled by the LTC 1760. SMBus buses and safety signal lines of the two intelligent batteries are respectively connected to the charge and discharge controller LTC 1760. During charging, the LTC1760 turns on the MOS transistors Q1 and Q2 first, turns off the discharge output of the two batteries at the same time, and turns on the power supply output of the dc power supply, thereby realizing simultaneous charging of the two batteries. When the battery is not charged, the LTC1760 turns off the output of the dc power supply, and turns off the MOS transistors Q1 and Q2, turning on the discharge switch of the battery.
The battery detection end of the charge and discharge manager 1 is respectively connected with the battery I2 and the battery II 3, and respectively acquires the electric quantity state and the output state of the battery I2 and the electric quantity state and the output state of the battery II 3.
That is, the charge and discharge manager 1 can acquire the state of charge and the output state of the battery I2 and the state of charge and the output state of the battery II 3. It is understood that the charge and discharge manager 1 configuration circuit includes a charge voltage configuration circuit and a charge current configuration circuit, a battery output voltage acquisition circuit, and the like.
The charging voltage and the charging current can be set through a configuration resistor and a matched sampling resistor, and when the configuration resistor is an open circuit and the sampling resistor is 25 milliohms, the maximum charging current is 4A. The charging voltage can be output with a minimum of 8.4V and a maximum of 32.7V by changing the configuration resistance of the charging voltage.
The dc input protection circuit 4 includes: a schottky diode D1 and a self-recovery fuse F1; the anode of the Schottky diode D1 is connected with a direct current input power supply; the cathode of the schottky diode D1 is connected to the first end of the self-recovery fuse F1, and the second end of the self-recovery fuse F1 is connected to the first end of the switch K1 and the D-pole of the MOS transistor Q1, respectively. The fuse tube is a self-recovery fuse tube, can be fused in a short time when a load is short-circuited, and can automatically recover after the short-circuit state of the rear-stage circuit is eliminated, so that the rear-stage circuit is protected. The Schottky diodes connected in series can prevent the direct current power supply input from damaging a rear-stage circuit when being reversely connected.
In order to enable the charge/discharge control device to acquire the control command, the control of the battery I2 and the battery II 3 is performed based on the control command.
As shown in fig. 3, the system further comprises: a microprocessor 6 and a status display circuit 7; the microprocessor 6 is connected with the state display circuit 7, the microprocessor 6 is connected with the charge and discharge manager 1 through an SMBus bus, and the microprocessor 6 acquires the working state information of the charge and discharge manager 1 and displays the information through the state display circuit 7. The microprocessor 6 is connected with the upper computer 8 through a serial port or a CAN bus. The upper computer 8 can be used as a control instruction input end, and can be connected with the microprocessor 6 by configuring a control key to acquire a control instruction.
The microprocessor 6 adopts C8051F 320; the state display circuit 7 is provided with a plurality of LED lamps and nixie tubes for respectively indicating charging, discharging, breaking and alarming information of the battery I2 and charging, discharging, breaking and alarming information of the battery II 3.
Specifically, the microprocessor 6 is provided with a serial port bus, and the microprocessor 6 has a communication function with the upper computer 8 through an optional external expansion CAN bus interface; and the state indicating circuit comprises battery capacity remaining percentage and charging and power-off state indicating information.
The microprocessor is connected with the upper computer 8 through a serial port or a CAN bus, so that the upper computer 8 CAN acquire the running state of the charge and discharge manager 1 in real time and CAN track the working state of one battery randomly; as an optimal mode, the microprocessor 6 can acquire the temperature and alarm information of the battery in real time, and the safe operation of the charging and discharging circuit is ensured.
As the utility model discloses preferred mode, battery I2 and battery II 3 all are equipped with SMBus bus and safety signal line, and battery I2 and battery II 3 are connected to LTC1760 respectively, and LTC1760 provides a main SMBus bus and is connected with the microprocessing simultaneously. The LTC1760 follows the standard SMBus V1.1 bus protocol, and the external microprocessor 6 opens the SMBus bus of the charge and discharge manager 1 or the corresponding battery through an addressing instruction, thereby acquiring corresponding status information.
The utility model discloses in can also disposing the circuit part, LTC 1760's pin VLIMITThe four resistors with different resistance values are respectively connected, according to the rated voltage of the battery, only one resistor needs to be welded or the empty welding is kept, a specific charging voltage can be obtained, and five grades of charging voltage are selected in total. Like the charging current, adjusting the configuration resistance and the sampling resistance adapted thereto according to the charging current level may change the upper limit of the charging current to a maximum of 4A.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. The utility model provides a two intelligent battery charge and discharge management systems which characterized in that includes: a charge and discharge control device, a battery I and a battery II;
the charging and discharging control device is provided with a direct current input protection circuit, a charging and discharging manager and a charging and discharging control circuit;
the charging and discharging manager is connected with the direct-current input power supply through the direct-current input protection circuit;
the charge and discharge manager is respectively connected with the battery I and the battery II through a charge and discharge control circuit;
the battery I and the battery II are respectively connected with a load through a charge-discharge control circuit;
the charge and discharge manager respectively controls the charge and discharge of the battery I and the charge and discharge of the battery II by controlling the charge and discharge control circuit.
2. The dual intelligent battery charge and discharge management system of claim 1,
the charge and discharge manager adopts LTC 1760;
the charge and discharge control circuit includes: a switch K1, a switch K2, a switch K3, a switch K4, a switch K5, a MOS transistor Q1, a MOS transistor Q2 and a resistor R1;
the first end of the switch K1 is respectively connected with the output end of the direct current input protection circuit and the D pole of the MOS tube Q1;
the first end of the switch K2 is connected with the charging and supplying end of the battery II and the first end of the switch K5 respectively;
the first end of the switch K3 is connected with the first end of the switch K4 and the charging and supplying end of the battery I respectively;
the second end of the switch K1, the second end of the switch K2, the second end of the switch K3 and the power supply detection end of the charge and discharge manager are respectively connected with the power supply output end of the charge and discharge control device;
the second end of the switch K4 and the second end of the switch K5 are respectively connected with the first end of the resistor R1;
the second end of the resistor R1 is respectively connected with the S pole of the MOS transistor Q1 and the D pole of the MOS transistor Q2;
the S pole of the MOS transistor Q2 is grounded;
the G pole of the MOS transistor Q1 and the G pole of the MOS transistor Q2 are respectively connected with the control end of the charge and discharge manager;
the control end of the charge and discharge manager is also respectively connected with the control end of the switch K1, the control end of the switch K2, the control end of the switch K3, the control end of the switch K4 and the control end of the switch K5.
3. The dual intelligent battery charge and discharge management system of claim 2,
and the battery detection end of the charge and discharge manager is respectively connected with the battery I and the battery II and respectively acquires the electric quantity state and the output state of the battery I and the electric quantity state and the output state of the battery II.
4. The dual intelligent battery charge and discharge management system of claim 2,
the direct current input protection circuit includes: a schottky diode D1 and a self-recovery fuse F1;
the anode of the Schottky diode D1 is connected with a direct current input power supply;
the cathode of the schottky diode D1 is connected to the first end of the self-recovery fuse F1, and the second end of the self-recovery fuse F1 is connected to the first end of the switch K1 and the D-pole of the MOS transistor Q1, respectively.
5. The dual intelligent battery charge and discharge management system of claim 2,
the charge and discharge manager has three SMBus bus interfaces, a 10-bit current DA converter, and an 11-bit voltage DA converter.
6. The dual smart battery charge and discharge management system of claim 1 or 2,
further comprising: a microprocessor and a status display circuit;
the microprocessor is connected with the state display circuit, the microprocessor is connected with the charge and discharge manager through the SMBus bus, and the microprocessor acquires the working state information of the charge and discharge manager and displays the information through the state display circuit.
7. The dual intelligent battery charge and discharge management system of claim 6,
the microprocessor is connected with an upper computer through a serial port or a CAN bus.
8. The dual intelligent battery charge and discharge management system of claim 6,
the microprocessor adopts C8051F 320;
the state display circuit is provided with a plurality of LED lamps and nixie tubes and is used for respectively indicating charging, discharging, breaking and alarming information of the battery I and charging, discharging, breaking and alarming information of the battery II.
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Effective date of registration: 20210601 Address after: 250101 Shandong province Ji'nan High-tech Development Zone, Road No. 1 Qilu Software Park Venture Plaza F block A312 Patentee after: SHANDONG SHEENRUN OPTICS & ELECTRONICS Co.,Ltd. Address before: The East Innovation workshop of Jinan high tech Zone is adjacent to A307 of Shenrong Electronic Industrial Park in the south Patentee before: JINAN TENGYUE ELECTRONICS Co.,Ltd. |