CN211208842U

CN211208842U - USB3.0 data line, interface module and terminal equipment

Info

Publication number: CN211208842U
Application number: CN201922047426.3U
Authority: CN
Inventors: 丁永波; 吴胜广
Original assignee: Shenzhen Weibu Information Co Ltd
Current assignee: Shenzhen Weibu Information Co Ltd
Priority date: 2019-11-25
Filing date: 2019-11-25
Publication date: 2020-08-07
Anticipated expiration: 2029-11-25

Abstract

The embodiment of the utility model discloses USB3.0 data line, interface module and terminal equipment, USB3.0 data line include a connecting wire, and one end of connecting wire sets up the public first interface of first USB3.0, and the other end of connecting wire sets up the public first interface of second USB3.0, and the electric pressure foot, data foot, lower margin, communication foot and the detection foot of the public first USB3.0 interface are connected with the electric pressure foot, data foot, lower margin, communication foot and the detection foot of the public first interface of second USB3.0 one-to-one; the voltage pin of the first USB3.0 male connector is connected with the detection pin of the first USB3.0 male connector, and the voltage pin of the second USB3.0 male connector is connected with the detection pin of the second USB3.0 male connector. The USB3.0 data line can be converted into the USB2.0 data line for use by connecting the voltage pin and the detection pin, and the USB2.0 data transmission function of the USB3.0 data line is realized.

Description

USB3.0 data line, interface module and terminal equipment

Technical Field

The utility model relates to a USB technical field especially relates to a USB3.0 data line, interface module and terminal equipment.

Background

The USB data lines commonly available in the market at present include USB2.0 data lines and USB3.0 data lines upgraded on the basis of USB 2.0. In the pin design, the pins of the male head of USB version 3.0 are 9 pins (upper 5 and lower 4), and the pins of USB version 2.0 are 4 pins (lower 4). In order to be compatible with the USB2.0 version, the lower 4 pins of the 9 pins of the USB3.0 have the same shape and definition as those of the USB2.0, and the other 5 pins are dedicated pins of the USB 3.0.

Although the male connector of the USB3.0 can be compatible with the USB2.0 version, the USB3.0 data line can only be used on equipment with a USB3.0 interface, and only can support data transmission of the USB 3.0. Some chip platforms (such as a joint department and a core micro) cannot use a USB3.0 data line to realize data transmission and OTG (On-The-Go) functions of USB 2.0. The tablet computers, two-in-one tablets, IOT (Internet of things) products and the like manufactured by the platforms all need to use the USB3.0 interface seat, the platforms do not have the interface definition of the USB3.0, and customers need the USB3.0 interface seat to realize the functions of the USB 2.0. In the interface definition of the interface socket of USB3.0, the 7 th pin (detection pin) is grounded, and only OTG equipment can be identified and connected when the male socket equipment of USB2.0 is inserted, and data transmission with the computer cannot be performed, and the data transmission function of USB2.0 with the computer cannot be realized.

SUMMERY OF THE UTILITY MODEL

To the above technical problem, the embodiment of the utility model provides a USB3.0 data line, interface module and terminal equipment to solve the problem that current USB3.0 data line can not realize USB 2.0's data transmission and OTG function.

The embodiment of the utility model provides a USB3.0 data line, including a connecting wire, the one end of connecting wire sets up the public first interface of first USB3.0, the other end of connecting wire sets up the public first interface of second USB3.0, wherein, the electric pressure foot of the public first interface of first USB3.0, data foot, lower margin, communication foot and detection foot are connected with the electric pressure foot of the public first interface of second USB3.0, data foot, lower margin, communication foot and detection foot one-to-one; the voltage pin of the first USB3.0 male connector is connected with the detection pin of the first USB3.0 male connector, and the voltage pin of the second USB3.0 male connector is connected with the detection pin of the second USB3.0 male connector.

Optionally, in the USB3.0 data line, the voltage pin is a VBUS pin, and the data pin includes a D + pin and a D-pin; the communication pins comprise an STDA _ SSRX + pin, an STDA _ SSRX-pin, an STDA _ SSTX + pin and an STDA _ SSTX-pin; the detection pin is a DRAIN pin.

A second aspect of the embodiment of the present invention provides an interface module, which is connected to a CPU and a power module, and is further connected to the USB3.0 data line; the interface module comprises a female head circuit, a conversion circuit and a power supply circuit, wherein the female head circuit is connected with the conversion circuit, the power supply circuit and the CPU, the conversion circuit and the power supply circuit are both connected with the CPU, and the power supply circuit is connected with the power supply module;

the female circuit outputs a detection signal of a corresponding level according to a voltage signal transmitted by a USB3.0 data line, and the conversion circuit divides the voltage of the detection signal and outputs a corresponding identification signal to the CPU to judge the working mode of the peripheral equipment;

when the power supply circuit is in a power supply mode, the power supply circuit converts the power supply voltage provided by the power supply module into output power supply voltage according to the enabling signal output by the CPU and outputs the output power supply voltage to the peripheral equipment for power supply through the female circuit;

when the bus circuit is in a data transmission mode, the bus circuit outputs data transmitted by the CPU to the peripheral and outputs voltage signals provided by the peripheral for power supply.

Optionally, in the interface module, the female connector circuit includes a USB3.0 female connector, a first capacitor, a first diode, a second diode, and a third diode;

the VBUS pin of the USB3.0 female connector is connected with one end of the first capacitor, the power supply end, the VBUS pin of the USB3.0 male connector and the power supply circuit; the D-pin of the USB3.0 female connector is connected with one end of a third diode, the D-pin of the USB3.0 male connector and the CPU; the D + pin of the USB3.0 female connector is connected with one end of a second diode D2, the D + pin of the USB3.0 male connector and the CPU; the other end of the first capacitor is grounded, the other end of the third diode is connected with the other end of the second diode and the ground, a GND pin of a USB3.0 female connector is connected with the GND pin of the USB3.0 male connector and the ground, a DRAIN pin of the USB3.0 female connector is connected with the anode of the first diode and the conversion circuit, and the cathode of the first diode is connected with a VBUS pin of the USB3.0 male connector;

the USB3.0 male connector is a first USB3.0 male connector or a second USB3.0 male connector.

Optionally, in the interface module, the conversion circuit includes a first resistor and a second resistor; one end of the first resistor is connected with a DRAIN pin of the USB3.0 female connector and the anode of the first diode, the other end of the first resistor is connected with one end of the second resistor and the CPU, and the other end of the second resistor is grounded.

Optionally, in the interface module, the power supply circuit includes a power chip, a second capacitor, a third resistor, a fourth resistor, and a fifth resistor;

an IN pin of the power supply chip is connected with one end of the second capacitor, one end of the fourth resistor and a power supply end; the other end of the second capacitor is grounded, the EN pin of the power chip is connected with the other end of the fourth resistor and the CPU, the OUT pin of the power chip is connected with one end of the third resistor and the VBUS pin of the USB3.0 female connector, the GND pin of the power chip is grounded, the SET pin of the power chip is grounded through the fifth resistor, the other end of the third resistor is connected with one end of the third capacitor and the external power supply end, and the other end of the third capacitor is grounded.

A third aspect of the embodiments of the present invention provides a terminal device, including a housing, wherein a main board is disposed in the housing, the main board is provided with a CPU and a power module, and the main board is further provided with the interface module; the interface module is connected with the power supply module and the CPU, and is also connected with an external device through the USB3.0 data line;

the interface module outputs a corresponding identification signal to the CPU according to the level transmitted by the peripheral equipment, and the CPU judges the working mode of the peripheral equipment according to the high and low levels of the identification signal; when the CPU is in a power supply mode, the CPU controls the interface module to convert the power supply voltage provided by the power supply module into power supply voltage and output the power supply voltage to the peripheral equipment for power supply; when the CPU is in a data transmission mode, the interface module outputs data transmitted by the CPU to the peripheral and outputs a voltage signal provided by the peripheral to the mainboard for power supply.

In the technical scheme provided by the embodiment of the utility model, USB3.0 data line includes a connecting wire, one end of connecting wire sets up the public first interface of first USB3.0, the other end of connecting wire sets up the public first interface of second USB3.0, its characterized in that, the electric pressure foot, data foot, lower margin, communication foot and the detection foot of the public first USB3.0 interface are connected with the electric pressure foot, data foot, lower margin, communication foot and the detection foot of the public first USB3.0 interface one to one; the voltage pin of the first USB3.0 male connector is connected with the detection pin of the first USB3.0 male connector, and the voltage pin of the second USB3.0 male connector is connected with the detection pin of the second USB3.0 male connector. The electric pressure pins of the two USB3.0 male connectors are connected with the detection pins, so that the USB3.0 data line can be converted into a USB2.0 data line for use, the USB2.0 data transmission function of the USB3.0 data line is realized, and the problem that the USB3.0 data line cannot realize the data transmission and OTG functions of the USB2.0 is solved.

Drawings

Fig. 1 is a schematic diagram of a USB3.0 data line according to an embodiment of the present invention.

Fig. 2 is a block diagram of a terminal device according to an embodiment of the present invention.

Fig. 3 is a circuit diagram of an interface module according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. The embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts, belong to the protection scope of the present invention.

Referring to fig. 1, a USB3.0 data line provided in an embodiment of the present invention includes a connection line, one end of the connection line is provided with a first USB3.0 male connector CN1, and the other end of the connection line is provided with a second USB3.0 male connector CN 2; the electric pressure pin (VBUS pin), the data pin (D +/-pin), the ground pin (GND pin), the communication pin (STDA _ SSRX +/-pin, STDA _ SSTX +/-pin) and the detection pin (DRAIN pin) of the first USB3.0 male connector CN1 are connected with the electric pressure pin (VBUS pin), the data pin (D +/-pin), the ground pin (GND pin), the communication pin (STDA _ SSRX +/-pin, STDA _ SSTX +/-pin) and the detection pin (DRAIN pin) of the second USB3.0 male connector CN2 in a one-to-one manner; the voltage pin (VBUS pin) of the first USB3.0 male connector CN1 is connected with the detection pin (DRAIN pin) of the first USB3.0 male connector CN1, and the voltage pin (VBUS pin) of the second USB3.0 male connector CN2 is connected with the detection pin (DRAIN pin) of the second USB3.0 male connector CN 2. Therefore, when the USB2.0 interface is only supported but the USB3.0 interface is used for realizing the data transmission and OTG function of the USB2.0, the power voltage pins (the 1 st pin) of the two USB3.0 male interfaces are connected with the detection pins (the 7 th pin) (such as wire welding) to be conducted, the switching detection of the OTG function and the data transmission of the USB2.0 is realized through the high and low levels of the detection pins, the OTG function is realized when the detection pins are pulled down, and the data transmission function of the USB2.0 is realized when the detection pins are pulled up. The USB3.0 data line can be converted into the USB2.0 data line for use, the USB2.0 data transmission function of the USB3.0 data line is realized, and the problem that the USB3.0 data line cannot realize the data transmission and OTG functions of the USB2.0 is solved.

In specific implementation, the USB3.0 data line is respectively inserted into USB3.0 female connectors of two terminal devices (such as a computer and a tablet computer, or an OTG device and a tablet computer) through two USB3.0 male connectors, the different types of male connectors (such as Type-A, Type-B, Type-C) realize corresponding types of data transmission, and the voltage pin (1 st pin) in the male connectors is connected with the detection pin (7 th pin), and can be applied to MTK (joint distribution department) platforms (such as M10HAR320, M133HR110, and the like).

Based on the USB3.0 male connector, the peripheral circuit of the USB3.0 female connector corresponding to the USB3.0 male connector is also modified. The embodiment also provides a terminal device, please refer to fig. 2 and fig. 3 together, the terminal device includes a housing, a main board is disposed in the housing, a power module, a CPU and an interface module 10 are disposed on the main board, and the interface module 10 is connected to the power module and the CPU. The interface module 10 is connected to an external device (such as a computer or an OTG device (such as a mouse, a keyboard, a USB disk, and other external devices)) through the USB3.0 data line (the USB3.0 male connector and the connecting line). The interface module 10 outputs a corresponding identification signal USB _ ID to the CPU according to the level transmitted by the peripheral device, and the CPU determines the working mode of the peripheral device according to the high-low level of the identification signal USB _ ID; when the power module is in the power supply mode (for example, the identification signal USB _ ID is a low level), the CPU controls the interface module 10 to convert the power voltage 5V _ OTG _ HDMI provided by the power module into the power voltage HOST _ VCC and output the power voltage HOST _ VCC to the peripheral; when the data transmission mode is set (for example, the identification signal USB _ ID is at a low level), the interface module 10 outputs the data transmitted by the CPU to the peripheral device, and outputs a voltage signal provided by the peripheral device to the motherboard for power supply.

The interface module comprises a female circuit 100, a conversion circuit 200 and a power supply circuit 300; the female circuit 100 is connected with the conversion circuit 200, the power supply circuit 300 and the USB3.0 male interface, the conversion circuit 200 and the power supply circuit 300 are both connected with the CPU, and the power supply circuit 300 is connected with the power supply module; the female circuit 100 outputs a detection signal USB _ ID _5V (an internal voltage pin is connected with a detection pin) of a corresponding level according to a voltage signal transmitted by a USB3.0 male interface of a USB3.0 data line, and the conversion circuit 200 divides the voltage of the detection signal and outputs a corresponding identification signal USB _ ID to the CPU to determine a peripheral operating mode (an external computer is in a data transmission mode, and an external OTG device is in a power supply mode); when the power supply circuit is in the power supply mode, the power supply circuit 300 converts the power supply voltage 5V _ OTG _ HDMI provided by the power supply module into the output power supply voltage HOST _ VCC according to the enable signal HOST _ EN output by the CPU, and outputs the output power supply voltage HOST _ VCC to the peripheral through the female circuit 100; when in the data transmission mode, the power supply circuit 300 does not operate, the bus circuit 100 outputs the data (USB _ DM _ P0, USB _ DP _ P0) transmitted by the CPU to the peripheral, and outputs the voltage signal provided by the peripheral to the main board for power supply.

It should be understood that the USB3.0 male interface connected by the interface module may be the first USB3.0 male interface CN1 or the second USB3.0 male interface CN2, where the first and second interfaces are only used for distinguishing and are not limited to the connection manner of the USB3.0 male interface.

Referring to fig. 3, in the present embodiment, the female circuit 100 includes a USB3.0 female interface J, a first capacitor C1, a first diode D1 (zener diode), a second diode D2 (diac), and a third diode D3 (diac); the VBUS pin of the USB3.0 female connector J is connected to one end of the first capacitor C1, the power supply terminal (providing the supply voltage HOST _ VCC), the VBUS pin of the USB3.0 male connector J, and the power supply circuit 300; the D-pin of the USB3.0 female connector J is connected with one end of a third diode D3, the D-pin of the USB3.0 male connector and the CPU; the D + pin of the USB3.0 female connector J is connected with one end of a second diode D2, the D + pin of the USB3.0 male connector and the CPU; the other end of the first capacitor C1 is grounded, the other end of the third diode D3 is connected to the other end of the second diode D2 and ground, the GND pin of the USB3.0 female connector J is connected to the GND pin of the USB3.0 male connector and ground, the DRAIN pin of the USB3.0 female connector J is connected to the anode of the first diode D1 and the conversion circuit 200, and the cathode of the first diode D1 is connected to the VBUS pin of the USB3.0 male connector.

The conversion circuit 200 comprises a first resistor R1 and a second resistor R2; one end of the first resistor R1 is connected with the DRAIN pin of the USB3.0 female connector J and the anode of the first diode D1, the other end of the first resistor R1 is connected with one end of the second resistor R2 and the CPU, and the other end of the second resistor R2 is grounded. The voltage on the DRAIN pin is divided by the first resistor R1 and the second resistor R2, so that the situation that 5V voltage directly enters the CPU to burn the CPU can be avoided.

The power supply circuit 300 comprises a power chip U1 (the model is preferably L PW5210 and corresponds to a current-limiting switch), a second capacitor C2, a third capacitor C3, a third resistor R3, a fourth resistor R4 and a fifth resistor R5, wherein an IN pin of the power chip U1 is connected with one end of the second capacitor C2, one end of the fourth resistor R4 and a power supply end of a power module (the power module of a mainboard provides a power supply voltage of 5V _ OTG _ HDMI), the other end of the second capacitor C2 is grounded, an EN pin of the power chip U1 is connected with the other end of the fourth resistor R4 and a CPU (transmit enable signal HOST _ EN), an OUT pin of the power chip U1 is connected with one end of the third resistor R3 and a VBUS pin of a USB3.0 female connector J, a pin of the power chip U1 is grounded, a pin of the power chip U1 is grounded through the fifth resistor R5, the other end of the third resistor 3 is connected with one end of the third capacitor R5 and one end of the VBUS pin of the third capacitor R5857324 and the power supply voltage of the peripheral (VBST _ GND _ C).

In this embodiment, the USB3.0 female interface J is a standard TYPE _ a interface, and after the USB3.0 female interface J is connected to an external USB3.0 male interface, a VBUS pin of the USB3.0 male interface, a DRAIN pin of the USB3.0 male interface, a VBUS pin of the USB3.0 female interface J, and a DRAIN pin of the USB3.0 female interface J are connected to each other. The peripheral power supply end supplies power to other peripherals when a plurality of peripherals exist, and one power supply end is not enough to support the plurality of peripherals.

Taking a terminal device as an example, when the tablet computer is connected to the computer through a USB3.0 male connector and needs data transmission, a VBUS pin of the USB3.0 male connector provides a high level of 5V to pull up a DRAIN pin thereof (the two pins are connected to each other), so that the DRAIN pin of the USB3.0 female connector is also pulled up and outputs a high-level detection signal USB _ ID _5V, and the detection signal USB _ ID is divided by R1 and R2 to output a 1.8V identification signal USB _ ID to the CPU. The CPU detects that the identification signal USB _ ID is high level, judges that the computer is currently connected and is in a data transmission mode, and transmits data (USB _ DM _ P0 and USB _ DP _ P0) through a D +/-pin of a USB3.0 female connector J, so that the USB2.0 data transmission function of a USB3.0 data line is realized, namely the data transmission of USB2.0 is carried out between the tablet computer and the computer; meanwhile, the CPU outputs an enable signal HOST _ EN with a low level to control the power supply chip U1 not to work, and at the moment, the computer supplies power to the tablet computer through the USB3.0 female interface J, namely, the DRAIN pin of the USB3.0 female interface J outputs a 5V high level to supply power to the VBUS end through the first diode D1 (positive direction conduction and reverse direction cutoff), so that the function of supplying power to the tablet computer by the computer is realized. In this embodiment, a GPIO port debugging function has been performed on the DRAIN pin of the USB3.0 female connector J at the motherboard end, and in a normal case, the DRAIN pin of the USB3.0 female connector J is grounded, which cannot implement the data transmission function of the USB2.0, and the VBUS pin of the USB3.0 male connector is connected to the DRAIN pin to implement the data transmission function of the USB2.0 with the USB3.0 connector.

When the OTG equipment is externally connected, the OTG equipment provides a low-level detection signal USB _ ID _5V low level for a DRAIN pin of a USB3.0 female interface J, the voltage is further reduced after the voltage division of R1 and R2, the CPU detects that the identification signal USB _ ID is low level, the currently connected OTG equipment is judged to be in a power supply mode, and the CPU outputs a high-level enable signal HOST _ EN to control the power supply chip U1 to work. The power supply chip U1 converts the power supply voltage 5V _ OTG _ HDMI output by the power supply module into a power supply voltage HOST _ VCC and outputs the power supply voltage HOST _ VCC to the OTG device for power supply. When a plurality of OTG devices exist, other OTG devices can be powered through the external power supply voltage VBUS0_ HOST.

To sum up, the utility model provides a USB3.0 data line, interface module and terminal equipment, the electric pressure foot of two USB3.0 public first interfaces of USB3.0 data line is connected with the detection foot, and the switching that realizes the data transmission of OTG function and USB2.0 through the high low level that detects the foot detects, is drawn down when detecting the foot and realizes the OTG function, is drawn high when detecting the foot and realizes USB 2.0's data transmission function. The USB3.0 data line can be converted into the USB2.0 data line for use, the USB2.0 data transmission function of the USB3.0 data line is realized, and the problem that the USB3.0 data line cannot realize the data transmission and OTG functions of the USB2.0 is solved.

The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims

1. A USB3.0 data line comprises a connecting line, wherein one end of the connecting line is provided with a first USB3.0 male connector, and the other end of the connecting line is provided with a second USB3.0 male connector, and is characterized in that a voltage pin, a data pin, a ground pin, a communication pin and a detection pin of the first USB3.0 male connector are connected with a voltage pin, a data pin, a ground pin, a communication pin and a detection pin of the second USB3.0 male connector in a one-to-one manner; the voltage pin of the first USB3.0 male connector is connected with the detection pin of the first USB3.0 male connector, and the voltage pin of the second USB3.0 male connector is connected with the detection pin of the second USB3.0 male connector.

2. The USB3.0 data line of claim 1, wherein the voltage pin is a VBUS pin and the data pin comprises a D + pin and a D-pin; the communication pins comprise an STDA _ SSRX + pin, an STDA _ SSRX-pin, an STDA _ SSTX + pin and an STDA _ SSTX-pin; the detection pin is a DRAIN pin.

3. An interface module, connecting a CPU and a power supply module, characterized in that the USB3.0 data line of claim 1 is also connected; the interface module comprises a female head circuit, a conversion circuit and a power supply circuit, wherein the female head circuit is connected with the conversion circuit, the power supply circuit and the CPU, the conversion circuit and the power supply circuit are both connected with the CPU, and the power supply circuit is connected with the power supply module;

4. The interface module of claim 3, wherein the female circuitry comprises a USB3.0 female interface, a first capacitor, a first diode, a second diode, and a third diode;

5. The interface module of claim 4, wherein the conversion circuit comprises a first resistor and a second resistor; one end of the first resistor is connected with a DRAIN pin of the USB3.0 female connector and the anode of the first diode, the other end of the first resistor is connected with one end of the second resistor and the CPU, and the other end of the second resistor is grounded.

6. The interface module of claim 5, wherein the power supply circuit comprises a power chip, a second capacitor, a third resistor, a fourth resistor, and a fifth resistor;

7. A terminal device, comprising a housing, a main board disposed in the housing, the main board having a CPU and a power module, wherein the main board further has an interface module according to any one of claims 3 to 6; the interface module is connected with the power supply module and the CPU, and is also connected with the peripheral through the USB3.0 data line according to claim 1 or 2;