CN211047392U

CN211047392U - Circuit board

Info

Publication number: CN211047392U
Application number: CN201920882949.7U
Authority: CN
Inventors: 黄立湘; 缪桦
Original assignee: Shennan Circuit Co Ltd
Current assignee: Shennan Circuit Co Ltd
Priority date: 2019-06-12
Filing date: 2019-06-12
Publication date: 2020-07-17
Anticipated expiration: 2029-06-12

Abstract

The utility model discloses a circuit board, include: a first metal layer; a chip having first and second surfaces opposite to each other, the first surface being electrically connected to one surface of the first metal layer through an electrical bonding layer; a first insulating layer covering the chip and the electrical connection layer and connected with the first metal layer; the second metal layer is positioned on one surface, far away from the first metal layer, of the first insulating layer, and the first through holes penetrate through the first insulating layer to electrically connect the second surface of the chip with the second metal layer, so that the structure is simplified, the heat dissipation is enhanced, and the reliability of the circuit board is improved.

Description

Circuit board

Technical Field

The utility model relates to an embedded circuit board technical field especially relates to a circuit board.

Background

With the continuous development of the electronic industry, the performance requirements for electronic devices are increasing, the power of the devices is increasing to be a necessary trend, and the heat dissipation problem of the power device package follows. A Direct Bonding Copper (DBC) substrate structure is a common power circuit board structure, wherein a DBC board is formed by directly bonding a copper foil to a ceramic substrate at a high temperature, and generally adopts a structure of a lower copper layer, a ceramic layer and an upper copper layer, which plays roles of insulation and heat conduction. The DBC substrate structure generally adopts conductive adhesive or solder to connect the chip and the DBC substrate, and connects the chip external terminals to perform aluminum wire bonding, so as to realize circuit connection with the chip, however, the aluminum wire bonding mode leads to the complexity of the packaging structure, the heat dissipation effect is poor, and the stability of the circuit board is reduced due to the high temperature of the chip, or even the chip is damaged.

SUMMERY OF THE UTILITY MODEL

The utility model discloses the technical problem who mainly solves provides a circuit board and circuit board manufacturing method to simplify the structure, strengthen the heat dissipation, improve the reliability of circuit board.

In order to solve the technical problem, the utility model discloses a technical scheme be:

provided is a circuit board including:

a first metal layer;

a chip having first and second opposing surfaces, the first surface being electrically connected to one side of the first metal layer by an electrical bonding layer;

a first insulating layer covering the chip and the bonding layer and connected to the first metal layer;

and the second metal layer is positioned on one surface of the first insulating layer, which is far away from the first metal layer, and the plurality of first via holes penetrate through the first insulating layer so as to electrically connect the second surface of the chip with the second metal layer.

The utility model has the advantages that: be different from prior art's condition, the utility model discloses a set up the chip in the first insulating layer between first metal level and second metal level, will through the electric junctional layer the first surface of chip with first metal level electricity is connected, through first via hole in the first insulating layer will the second surface of chip with second metal level electricity is connected to simplify the structure, the reinforcing is dispelled the heat, improves the reliability of circuit board.

Drawings

Fig. 1 is a schematic structural diagram of a first embodiment of the circuit board of the present invention;

fig. 2 is a schematic structural diagram of a second embodiment of the circuit board of the present invention;

fig. 3 is a schematic structural diagram of a third embodiment of the circuit board of the present invention;

fig. 4 is a schematic cross-sectional view of a third embodiment of the circuit board of the present invention;

Detailed Description

The present invention will be described in detail with reference to the accompanying drawings and examples.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a circuit board according to a first embodiment of the present invention, the circuit board includes:

a first metal layer 10;

a chip 20 having first and second

opposing surfaces

21, 22, the first surface 21 being electrically connected to one side of the first metal layer 10 by an electrical bonding layer 30;

a first insulating layer 40 covering the chip 20 and the electrical bonding layer 30 and connected to the first metal layer 10;

and a second metal layer 50 located on a surface of the first insulating layer 40 away from the first metal layer 10, wherein a plurality of first via holes 41 penetrate through the first insulating layer 40 to electrically connect the second surface 22 of the chip 20 with the second metal layer 50.

The chip 20 is a bare chip, and the first via hole 41 penetrates through the first insulating layer 40, so as to lead out a signal on the second surface 22 of the chip 20 onto the second metal layer 50.

In this embodiment, the circuit board further includes a first heat dissipation structure 60, the first heat dissipation structure 60 is located on a side of the second metal layer 50 away from the chip 20, and the first heat dissipation structure 60 completely covers the chip 20.

The first heat dissipation structure 60 is connected to a side of the second metal layer 50 away from the chip 20 through an electrical bonding layer 30.

Forming patterns on the first metal layer 10 and the second metal layer 50 to respectively lead out signals on the chip 20; vias 11/51 are provided on the first metal layer 10 and the second metal layer 50 at locations not covered by the first insulating layer 40 for signal transmission with external areas.

The electric bonding layer 30 electrically connects the first surface 21 of the chip 20 and the first metal layer 10, leads signals on the first surface 21 to the first metal layer 10, forms a pattern on the first metal layer 10 to lead signals on the first surface 21 respectively, and arranges a via hole 11 at a position on the first metal layer 10 not covered by the first insulating layer 40 to realize signal transmission between the first surface 21 of the chip 20 and an external area; the first via 41 in the first insulating layer 40 electrically connects the second surface 22 of the chip 20 to the second metal layer 50, leads out the signal on the second surface 22 to the second metal layer 50, patterning the second metal layer 50 to respectively draw out signals on the second surface 22, vias 51 are provided on the second metal layer 50 at locations not covered by the first insulating layer 40 to enable signal transmission between the second surface 22 of the chip 20 and external areas, the signal extraction on the first surface 21 and the second surface 22 of the chip 20 in the above manner does not need external welding, and the structure is simpler and more reliable, because the first surface 21 of the chip 20 is proximate to the first metal layer 10, and the first metal layer 10 is thick copper-based, therefore, the heat dissipation of the chip 20 is facilitated, and the heat dissipation effect is better after the first heat dissipation structure 60 is correspondingly attached.

Referring to fig. 2, which is a schematic structural diagram of a second embodiment of the circuit board of the present invention, in comparison with the first embodiment (fig. 1), the first insulating layer 40 further includes a second via hole 42, and the first metal layer 10 and the second metal layer 50 are electrically connected through the second via hole 42.

In this embodiment, the second via 42 redirects the signal on the second surface 22 of the chip 20, which is guided to the second metal layer 50 through the first via 41, to the first metal layer 10, the electrical bonding layer 30 guides the signal on the first surface 21 of the chip 20 to the first metal layer 10, both the signals on the first surface 21 and the second surface 22 of the chip 20 are guided to the first metal layer 10 in the above manner, a pattern is formed on the first metal layer 10 to guide the signals on the first surface 21 and the second surface 22, respectively, and the via 11 is provided at a position on the first metal layer 10 which is not covered by the first insulating layer 40 to realize signal transmission between the first surface 21 and the second surface 22 of the chip 20 and an external region.

In other embodiments, the signal on the second surface 22 of the chip 20 may also be led out to the second metal layer 50 through the second via 42, and a via 41 is disposed at a position on the second metal layer 50 not covered by the first insulating layer 40 to implement signal transmission between the first surface 21 and the second surface 22 of the chip 20 and an external area.

The first metal layer 10 is copper and has a thickness of 1000 μm to 3000 μm, and the second metal layer 50 is copper and has a thickness of 50 μm to 200 μm, which can be adjusted within the thickness range according to the power of the chip 20.

The thickness of the first metal layer 10 is much larger than the thickness of a common signal layer (generally 50 μm), and external transmission of signals is performed on the first metal layer 10, so that the product has high structural strength and good heat dissipation performance.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a circuit board according to a third embodiment of the present invention, and with reference to fig. 4, fig. 4 is a cross-sectional view of the circuit board of the present invention along a dotted line a in fig. 3, which is different from the circuit board according to the second embodiment (fig. 2) in that: the circuit board further includes a second insulating layer 70 filled between the first metal layer 10 and the second metal layer 50 and not filled with the first insulating layer 40, the second insulating layer 70 being of a different material from the first insulating layer 40.

In this embodiment, the first insulating layer 40 is made of thermoplastic resin, such as polypropylene (PP), and is used for encapsulating the chip 20; the second insulating layer 70 is made of thermosetting resin, such as epoxy resin, the second insulating layer 70 is disposed around the chip 20, and the epoxy resin is cured and then molded, and is heated without softening and dissolving, so as to form a protective frame, thereby preventing the chip 20 from being damaged in the packaging process.

The circuit board further includes a second heat dissipation structure 80 located on a side of the first metal layer 10 away from the chip 20.

The first heat dissipation structure 60 and the second heat dissipation structure 80 completely cover the chip 20, so as to reduce the pressure on the chip 20 during the pressing process, thereby avoiding damaging the chip 20.

Wherein, first heat radiation structure 60 is including range upon range of setting gradually second metal layer 50 is kept away from fourth metal layer 61, ceramic layer 62 and fifth metal layer 63 on the first insulating layer 40, fourth metal layer 61 with be provided with between the second metal layer 50 electric joint layer 30, fourth and

fifth metal layer

61, 63 are copper, ceramic layer 62 is aluminium oxide. Second heat radiation structure 80 is including range upon range of setting gradually first metal layer 10 is kept away from fourth metal layer 81, ceramic layer 82 and fifth metal layer 83 on the first insulating layer 40, fourth metal layer 81 with be provided with between the second metal layer 50 electric joint layer 30, fourth and fifth metal layer 81, 83 are copper, ceramic layer 82 is aluminium oxide.

The first heat dissipation structure 60 is connected to the side of the second metal layer 50 away from the chip 20 through an electrical bonding layer 30, and the second heat dissipation structure 80 is connected to the side of the first metal layer 10 away from the chip 20 through the electrical bonding layer 30 to form a double-sided heat dissipation structure, which is more beneficial to heat dissipation of the chip 20.

The utility model discloses a set up the chip in the first insulating layer between first metal level and second metal level, electrically connect the first surface of chip with first metal level through electric joint layer, lead the signal of first surface to first metal level, electrically connect the second surface of chip with the second metal level through the first via hole in the first insulating layer, electrically connect the first metal level of chip with the second metal level through the second via hole in the first insulating layer, lead the signal of second surface to the first metal level, realize the signal transmission of chip first surface and second surface and outside region through etching pattern and via hole on the first metal level and the second metal level, set up first heat radiation structure and set up the second heat radiation structure in the one side that the chip was kept away from to the second metal level, the structure is simplified, the heat dissipation is enhanced, and the reliability of the circuit board is improved.

The above only is the embodiment of the present invention, not limiting the patent scope of the present invention, all the equivalent structures or equivalent processes that are used in the specification and the attached drawings or directly or indirectly applied to other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A circuit board, comprising:

a first metal layer;

a first insulating layer covering the chip and the electrical connection layer and connected to the first metal layer;

2. The circuit board of claim 1, wherein the first insulating layer further comprises a second via, the first metal layer being electrically connected to the second metal layer by the second via.

3. The circuit board according to claim 1, further comprising a second insulating layer filled between the first metal layer and the second metal layer and not filled with the first insulating layer, the second insulating layer being different in material from the first insulating layer.

4. The circuit board of claim 3, wherein the first insulating layer is made of a thermoplastic resin, the second insulating layer is disposed around the chip, and the material is a thermosetting resin.

5. The circuit board of claim 3, wherein the first metal layer and the second metal layer are patterned to respectively lead out signals on the chip; and arranging a via hole at a position on the first metal layer or the second metal layer, which is not covered by the first and second insulating layers, so as to transmit signals with an external area.

6. The circuit board of claim 3, wherein the first metal layer and the second metal layer are patterned to respectively lead out signals on the chip; and arranging via holes at positions, which are not covered by the first and second insulating layers, on the first metal layer and the second metal layer so as to transmit signals with an external area.

7. The circuit board of claim 1, wherein the first metal layer is copper and has a thickness of 1000 μm to 3000 μm, and the second metal layer is copper and has a thickness of 50 μm to 200 μm.

8. The circuit board of claim 1, further comprising a first heat dissipation structure, wherein the first heat dissipation structure is located on a side of the second metal layer away from the chip, and the first heat dissipation structure completely covers the chip.

9. The circuit board of claim 8, further comprising a second heat dissipation structure, wherein the second heat dissipation structure is located on a side of the first metal layer away from the chip, and the second heat dissipation structure completely covers the chip.

10. The circuit board of claim 9, wherein the first and second heat dissipation structures comprise a fourth metal layer, a ceramic layer and a fifth metal layer sequentially stacked on the second metal layer and away from the first insulating layer, the electrical bonding layer is disposed between the fourth metal layer and the second metal layer, the fourth and fifth metal layers are copper, and the ceramic layer is aluminum oxide.