CN211046876U - High-power linear broadband two-dimensional traveling wave amplifier - Google Patents

High-power linear broadband two-dimensional traveling wave amplifier Download PDF

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CN211046876U
CN211046876U CN201922454219.XU CN201922454219U CN211046876U CN 211046876 U CN211046876 U CN 211046876U CN 201922454219 U CN201922454219 U CN 201922454219U CN 211046876 U CN211046876 U CN 211046876U
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inductor
capacitor
microstrip line
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林倩
陈思维
邬海峰
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Qinghai Nationalities University
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Qinghai Nationalities University
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Abstract

The utility model discloses a high-power linear broadband two dimension traveling wave amplifier, divide amplifier network, power supply offset network, last stage PMOS distribution amplifier network, last stage NMOS distribution amplifier network, the artifical transmission line of last stage including broadband input drive merit, the utility model discloses core framework adopts three piles of high-gain to pile up self-adaptation amplifier network at the high power of microwave section, high-gain characteristic, utilizes the ultra wide band frequency response characteristic of two-dimentional synthetic distributed amplifier structure and the series connection partial pressure structure of simplifying simultaneously for whole power amplifier has obtained good broadband, high-gain, high efficiency and high power output ability, and the power supply network is simple and easy simultaneously.

Description

High-power linear broadband two-dimensional traveling wave amplifier
Technical Field
The utility model relates to a field effect transistor radio frequency power amplifier and integrated circuit field, especially to the high-power linear broadband two dimension traveling wave amplifier that the terminal emission module of radio frequency microwave transceiver used.
Background
With the rapid development of wireless communication systems and rf microwave circuits, rf front-end transceivers are also developing in the direction of high performance, high integration, and low power consumption. Therefore, the rf and microwave power amplifiers of the transmitter are urgently required to have high output power, high gain, high efficiency, low cost and other performances in the market, and the integrated circuit is a key technology expected to meet the market demand.
However, when the integrated circuit process design is adopted to realize the chip circuit of the radio frequency and microwave power amplifier, the performance and the cost are limited to a certain extent, and the method mainly comprises the following steps:
(1) the broadband high gain amplification capability is limited: the traditional single transistor is influenced by a gain-bandwidth product, and the ultra-wideband amplification capability can be obtained only by sacrificing gain, so that the high-gain amplification capability of the wideband is severely limited.
(2) The broadband high power amplification capability is limited: the characteristic frequency of transistors in semiconductor processes is higher and higher, thereby bringing about low breakdown voltage and limiting the power capacity of a single transistor. In order to obtain high power capability, multi-transistor power synthesis is often required, but the efficiency of the power amplifier is low due to energy loss of a multi-synthesis network, and the circuit cannot meet the requirements of low power consumption or green communication.
The circuit structure of the common ultra-wideband high-power amplifier is many, most typically the conventional distributed amplifier, but it is difficult for the conventional distributed amplifier to satisfy the requirements of various parameters at the same time, mainly because:
① in the traditional distributed power amplifier, the core amplifying circuit is realized by a distributed amplifying arrangement of a plurality of single transistors, because the single transistors are affected by parasitic parameters, the power gain of the single transistors will be significantly reduced and the power characteristics will be significantly deteriorated as the working frequency increases, therefore, in order to obtain an ultra-wideband flat amplifying structure, the low frequency gain must be sacrificed to balance the high frequency loss, resulting in the ultra-wideband gain of the traditional distributed amplifier being very low;
② in order to improve the amplifier gain and isolation, it is also possible to use a Cascode two-transistor distributed amplification structure, but although Cascode two-transistor increases circuit isolation, it is not possible to achieve a tendency that gain is significantly deteriorated with frequency, and it is also not possible to achieve optimum impedance matching between Cascode two-transistors, thereby reducing output power characteristics.
Therefore, the design difficulty of the ultra-wideband radio frequency power amplifier based on the integrated circuit process is as follows: the high power output difficulty under the ultra-wide band is large; there are many limitations to the conventional single transistor structure or the distributed amplification structure of the Cascode transistor.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem of providing a high-power linear broadband two-dimensional traveling wave amplifier, which comprises a broadband input drive power division amplifying network, a power supply bias network, a final-stage PMOS distribution amplifying network, a final-stage NMOS distribution amplifying network and a final-stage artificial transmission line; the core architecture adopts the high-power and high-gain characteristics of a high-gain three-stack self-adaptive amplification network in a microwave band, and simultaneously utilizes the ultra-wideband frequency response characteristic of a two-dimensional synthesis distribution type amplifier structure and a simplified serial voltage division structure, so that the whole power amplifier obtains good broadband, high-gain, high-efficiency and high-power output capability, and meanwhile, the power supply network is simple and easy.
The utility model provides an above-mentioned technical problem's technical scheme as follows: the embodiment of the utility model provides a high-power linear broadband two-dimensional traveling wave amplifier, which is characterized in that the amplifier comprises a broadband input drive power division amplifying network, a power supply bias network, a final-stage PMOS distribution amplifying network, a final-stage NMOS distribution amplifying network and a final-stage artificial transmission line;
the input end of the broadband input drive power division amplifying network is the input end of the whole high-power linear broadband two-dimensional traveling wave amplifier, the first output end of the broadband input drive power division amplifying network is connected with the first input end of the last-stage PMOS distribution amplifying network, the second output end of the broadband input drive power division amplifying network is connected with the input end of the last-stage NMOS distribution amplifying network, and the third output end of the broadband input drive power division amplifying network is connected with the first output end of the power supply;
the second output end of the power supply bias network is connected with the second input end of the final-stage PMOS distribution amplification network;
the second input end of the final-stage PMOS distribution amplification network is connected with the second output end of the power supply bias network; the first output end, the second output end, the third output end and the fourth output end of the final-stage PMOS distributed amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the final-stage artificial transmission line;
the input end of the last-stage NMOS distribution amplification network is connected with the second output end of the broadband input drive power division amplification network; the first output end, the second output end, the third output end and the fourth output end of the last-stage NMOS distributed amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the last-stage artificial transmission line;
the output end of the final-stage artificial transmission line is the output end of the whole high-power linear broadband two-dimensional traveling wave amplifier.
The beneficial effect of above-mentioned scheme is: the utility model discloses a two pile up synthetic distribution and amplify network technique, PMOS and the complementary cascade structure of NMOS have ultra wide band frequency response characteristic and the series connection partial pressure structure of simplifying for whole power amplifier has obtained good broadband, high-gain, high efficiency and high power output ability, and the power supply network is simple and easy simultaneously.
Furthermore, the input end of the broadband input drive power division amplifying network is connected with a capacitor C1Capacitor C1Another end of the resistor R is connected with a resistor R1And an inductor L1Resistance R1The other end of the capacitor C is connected with a capacitor C2Capacitor C2Is connected with an inductor L at the other end2Inductor L2The other end of the second switch is connected with a third output end of the broadband input drive power division amplifying network and an inductor L5B terminal and P type field effect transistor M2Inductor L1The other end of the capacitor is connected with a grounding capacitor C3Inductor L3And an inductor L4Inductor L3Is connected with an inductor L at the other end7Microstrip line T L2And a second output terminal of the broadband input drive power division amplifier network, inductor L7The other end of the capacitor is connected with a grounding capacitor C5And a supply voltage VgnInductor L4The other end of the N-type field effect transistor M is connected with the N-type field effect transistor M1Grid electrode of (1), field effect transistor M1Is grounded, microstrip line T L2The other end of the capacitor C is connected with a capacitor C7End a of (1), field effect transistor M1Drain electrode connecting microstrip line T L1Microstrip line T L1The other end of the first electrode is connected with a field effect tube M2Source electrode of (1), field effect transistor M2Gate connection resistance R2And a ground capacitor C4Resistance R2Is connected with an inductor L at the other end6Inductor L6The other end of the first capacitor is connected with a first output end of the broadband input drive power division amplifying network and a capacitor C8Capacitor C8Is connected with the microstrip line T L at the other end3Microstrip line T L3The other end of the capacitor C is also connected with a capacitor C7Terminal a of (a), inductor L5The a end of the capacitor is connected with a grounding capacitor C6And a capacitor C7The b terminal of (1).
The beneficial effects of the further scheme are as follows: the utility model discloses broadband input drive merit divides the amplifier network can realize that the drive of broadband is enlargied, adopts very simple circuit structure form simultaneously, and the chip area who occupies is less, and the cost is lower.
Further, the first output terminal of the power supply bias network is connected with the inductor L8And an inductor L9Inductor L8Is connected with a bias voltage V at the other endgpAnd a ground capacitor C9Inductor L9And the other end of the second switch is connected with a second output end of the power supply bias network.
The beneficial effects of the further scheme are as follows: the utility model discloses a power supply biasing network can guarantee that the power supply is stable, considers except that the low frequency clutter.
Furthermore, the first input end of the final PMOS distributed amplification network is connected with an inductor Lb1End a and microstrip line T Lb1Microstrip line T Lb1Is connected with an inductor L at the other endb3End a and microstrip line T Lb2Microstrip line T Lb2Is connected with an inductor L at the other endb7End a and microstrip line T Lb3Microstrip line T Lb3Is connected with an inductor L at the other endb10End a and microstrip line T Lb4Microstrip line T Lb4Another end of the resistor R is connected with a resistor RbResistance RbThe other end of the capacitor is connected with a grounding capacitor Cb5And an inductor Lb12Inductor Lb12Is connected with a bias voltage V at the other enddAnd a ground capacitor Cb6(ii) a The second input end of the final-stage PMOS distribution amplification network is connectedP-type field effect transistor Mb1Drain and inductor Lb4Inductor Lb4The other end of the first electrode is connected with a P-type field effect transistor Mb2Drain and inductor Lb6Inductor Lb6The other end of the first electrode is connected with a P-type field effect transistor Mb3Drain and inductor Lb9Inductor Lb9The other end of the first electrode is connected with a P-type field effect transistor Mb4Inductor Lb1Terminal b of (3) is connected with an inductor Lb2And a ground capacitor Cb1Inductor Lb2The other end of the first electrode is connected with a P-type field effect transistor Mb1Inductor Lb3Terminal b of (3) is connected with an inductor Lb5And a ground capacitor Cb2Inductor Lb5The other end of the first electrode is connected with a P-type field effect transistor Mb2Inductor Lb7Terminal b of (3) is connected with an inductor Lb8And a ground capacitor Cb3Inductor Lb8The other end of the first electrode is connected with a P-type field effect transistor Mb3Inductor Lb10Terminal b of (3) is connected with an inductor Lb11And a ground capacitor Cb4Inductor Lb11The other end of the first electrode is connected with a P-type field effect transistor Mb4A gate electrode of (1); p-type field effect transistor Mb1、Mb2、Mb3、Mb4The source electrodes of the two microstrip lines are respectively connected with a microstrip line T Lb5、TLb6、 TLb7、TLb8Microstrip line T Lb5、TLb6、TLb7、TLb8The other end of the first output end of the PMOS distribution amplifying network is respectively connected with the first, the second, the third and the fourth output ends of the last-stage PMOS distribution amplifying network.
The beneficial effects of the further scheme are as follows: the utility model discloses a two heap PMOS amplification technique and two dimension synthesis distribution amplification technique have ultra wide band frequency response characteristic and the series connection partial pressure structure of simplifying for whole power amplifier has obtained good broadband, high gain, high efficiency and high power output ability.
Furthermore, the input end of the final NMOS distributed amplification network is connected with an inductor La1End a and microstrip line T La1Microstrip line T La1Is connected with an inductor L at the other enda3End a and microstrip line T La2Microstrip line T La2Is connected with an inductor L at the other enda5End a and microstrip line T La3Microstrip lineLine T La3Is connected with an inductor L at the other enda7End a and microstrip line T La4Microstrip line T La4Another end of the resistor R is connected with a resistor RaResistance RaThe other end of the capacitor is connected with a grounding capacitor Ca5Inductor La1Terminal b of (3) is connected with an inductor La2And a ground capacitor Ca1Inductor La2The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma1Inductor La3Terminal b of (3) is connected with an inductor La4And a ground capacitor Ca2Inductor La4The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma2Inductor La5Terminal b of (3) is connected with an inductor La6And a ground capacitor Ca3Inductor La6The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma3Inductor La7Terminal b of (3) is connected with an inductor La8And a ground capacitor Ca4Inductor La8The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma4A gate electrode of (1); n-type field effect transistor Ma1、Ma2、Ma3、Ma4The source of (2) is grounded; n-type field effect transistor Ma1、Ma2、Ma3、 Ma4The drains of the two are respectively connected with a microstrip line T La5、TLa6、TLa7、TLa8Microstrip line T La5、TLa6、TLa7、TLa8The other end of the first output end of the final-stage NMOS distribution amplification network is respectively connected with the first, second, third and fourth output ends of the final-stage NMOS distribution amplification network.
The beneficial effects of the further scheme are as follows: the utility model discloses a two pile NMOS amplify the technique and two-dimentional synthetic distribution amplify the technique and have ultra wide band frequency response characteristic and the series connection partial pressure structure of simplifying for whole power amplifier has obtained good broadband, high-gain, high efficiency and high power output ability.
Furthermore, the first input end of the final-stage artificial transmission line is connected with the microstrip line T Lc1And a microstrip line T Lc2Microstrip line T Lc1Another end of the resistor R is connected with a resistor RcResistance RcThe other end of the capacitor is connected with a grounding capacitor CmMicrostrip line T Lc2The other end of the first end is connected with the second input end of the final-stage artificial transmission line and the microstrip line T Lc3Micro, microStrip line T Lc3The other end of the first end-stage artificial transmission line is connected with the third input end of the final-stage artificial transmission line and the microstrip line T Lc4Microstrip line T Lc4The other end of the first end-stage artificial transmission line is connected with the fourth input end of the final-stage artificial transmission line and the microstrip line T Lc5Microstrip line T Lc5The other end of the capacitor C is connected with a capacitor CnCapacitor CnThe other end of the transmission line is the output end of the final-stage artificial transmission line.
The beneficial effects of the further scheme are as follows: the utility model discloses a final stage artificial transmission line can realize three routes radio frequency signal's power synthesis, and this kind of artificial transmission line has advantages such as bandwidth width, reflection coefficient are low, can ensure the output and the efficiency of amplifier.
Drawings
Fig. 1 is a schematic block diagram of a power amplifier of the present invention;
fig. 2 is a circuit diagram of the power amplifier of the present invention.
Detailed Description
Exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It is to be understood that the embodiments shown and described in the drawings are merely exemplary and are intended to illustrate the principles and spirit of the invention, not to limit the scope of the invention.
The embodiment of the utility model provides the technical problem that the utility model aims to solve provides a high-power linear broadband two-dimensional traveling wave amplifier, which is characterized in that the high-power linear broadband two-dimensional traveling wave amplifier comprises a broadband input drive power division amplifying network, a power supply bias network, a last-stage PMOS distribution amplifying network, a last-stage NMOS distribution amplifying network and a last-stage artificial transmission line;
as shown in fig. 1, the input end of the broadband input drive power division amplifier network is the input end of the whole high-power linear broadband two-dimensional traveling wave amplifier, the first output end of the broadband input drive power division amplifier network is connected with the first input end of the last-stage PMOS distributed amplifier network, the second output end of the broadband input drive power division amplifier network is connected with the input end of the last-stage NMOS distributed amplifier network, and the third output end of the broadband input drive power division amplifier network is connected with the first output end of the;
the second output end of the power supply bias network is connected with the second input end of the final-stage PMOS distribution amplification network;
the second input end of the final-stage PMOS distribution amplification network is connected with the second output end of the power supply bias network; the first output end, the second output end, the third output end and the fourth output end of the final-stage PMOS distributed amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the final-stage artificial transmission line;
the input end of the last-stage NMOS distribution amplification network is connected with the second output end of the broadband input drive power division amplification network; the first output end, the second output end, the third output end and the fourth output end of the last-stage NMOS distributed amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the last-stage artificial transmission line;
the output end of the final-stage artificial transmission line is the output end of the whole high-power linear broadband two-dimensional traveling wave amplifier.
As shown in fig. 2, the input end of the broadband input driving power division amplifying network is connected with a capacitor C1Capacitor C1Another end of the resistor R is connected with a resistor R1And an inductor L1Resistance R1The other end of the capacitor C is connected with a capacitor C2Capacitor C2Is connected with an inductor L at the other end2Inductor L2The other end of the second switch is connected with a third output end of the broadband input drive power division amplifying network and an inductor L5B terminal and P type field effect transistor M2Inductor L1The other end of the capacitor is connected with a grounding capacitor C3Inductor L3And an inductor L4Inductor L3Is connected with an inductor L at the other end7Microstrip line T L2And a second output terminal of the broadband input drive power division amplifier network, inductor L7The other end of the capacitor is connected with a grounding capacitor C5And a supply voltage VgnInductor L4The other end of the N-type field effect transistor M is connected with the N-type field effect transistor M1Grid electrode of (1), field effect transistor M1Is grounded, microstrip line T L2The other end of the capacitor C is connected with a capacitor C7End a of (1), field effect transistor M1Drain electrode connecting microstrip line T L1Microstrip line T L1The other end of the first electrode is connected with a field effect tube M2Source electrode of (1), field effect transistor M2Gate connection resistance R2And a ground capacitor C4Resistance R2Is connected with an inductor L at the other end6Inductor L6The other end of the first capacitor is connected with a first output end of the broadband input drive power division amplifying network and a capacitor C8Capacitor C8Is connected with the microstrip line T L at the other end3Microstrip line T L3The other end of the capacitor C is also connected with a capacitor C7Terminal a of (a), inductor L5The a end of the capacitor is connected with a grounding capacitor C6And a capacitor C7The b terminal of (1).
The first output terminal of the power supply bias network is connected with an inductor L8And an inductor L9Inductor L8Is connected with a bias voltage V at the other endgpAnd a ground capacitor C9Inductor L9And the other end of the second switch is connected with a second output end of the power supply bias network.
The first input end of the final PMOS distributed amplification network is connected with an inductor Lb1End a and microstrip line T Lb1Microstrip line T Lb1Is connected with an inductor L at the other endb3End a and microstrip line T Lb2Microstrip line T Lb2Is connected with an inductor L at the other endb7End a and microstrip line T Lb3Microstrip line T Lb3Is connected with an inductor L at the other endb10End a and microstrip line T Lb4Microstrip line T Lb4Another end of the resistor R is connected with a resistor RbResistance RbThe other end of the capacitor is connected with a grounding capacitor Cb5And an inductor Lb12Inductor Lb12Is connected with a bias voltage V at the other enddAnd a ground capacitor Cb6(ii) a The second input end of the final PMOS distribution amplification network is connected with a P-type field effect transistor Mb1Drain and inductor Lb4Inductor Lb4The other end of the first electrode is connected with a P-type field effect transistor Mb2Drain and inductor Lb6Inductor Lb6The other end of the first electrode is connected with a P-type field effect transistor Mb3Drain and inductor Lb9Inductor Lb9The other end of the first electrode is connected with a P-type field effect transistor Mb4Inductor Lb1Terminal b of (3) is connected with an inductor Lb2And a ground capacitor Cb1Inductor Lb2The other end of the first electrode is connected with a P-type field effect transistor Mb1Inductor Lb3Terminal b of (3) is connected with an inductor Lb5And a ground capacitor Cb2Inductor Lb5The other end of the first electrode is connected with a P-type field effect transistor Mb2A gate electrode of (1); electric powerFeeling Lb7Terminal b of (3) is connected with an inductor Lb8And a ground capacitor Cb3Inductor Lb8The other end of the first electrode is connected with a P-type field effect transistor Mb3Inductor Lb10Terminal b of (3) is connected with an inductor Lb11And a ground capacitor Cb4Inductor Lb11The other end of the first electrode is connected with a P-type field effect transistor Mb4A gate electrode of (1); p-type field effect transistor Mb1、Mb2、Mb3、Mb4The source electrodes of the two microstrip lines are respectively connected with a microstrip line T Lb5、TLb6、TLb7、TLb8Microstrip line T Lb5、TLb6、TLb7、TLb8The other end of the first output end is connected with the first output end, the second output end, the third output end and the fourth output end of the final-stage PMOS distribution amplification network respectively.
The input end of the final NMOS distributed amplification network is connected with an inductor La1End a and microstrip line T La1Microstrip line T La1Is connected with an inductor L at the other enda3End a and microstrip line T La2Microstrip line T La2Is connected with an inductor L at the other enda5End a and microstrip line T La3Microstrip line T La3Is connected with an inductor L at the other enda7End a and microstrip line T La4Microstrip line T La4Another end of the resistor R is connected with a resistor RaResistance RaThe other end of the capacitor is connected with a grounding capacitor Ca5Inductor La1Terminal b of (3) is connected with an inductor La2And a ground capacitor Ca1Inductor La2The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma1Inductor La3Terminal b of (3) is connected with an inductor La4And a ground capacitor Ca2Inductor La4The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma2Inductor La5Terminal b of (3) is connected with an inductor La6And a ground capacitor Ca3Inductor La6The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma3Inductor La7Terminal b of (3) is connected with an inductor La8And a ground capacitor Ca4Inductor La8The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma4A gate electrode of (1); n-type field effect transistor Ma1、Ma2、Ma3、Ma4The source of (2) is grounded; n-type field effect transistor Ma1、Ma2、Ma3、Ma4The drains of the two are respectively connected with a microstrip line T La5、TLa6、TLa7、TLa8Microstrip line T La5、TLa6、TLa7、TLa8The other end of the first output end of the final-stage NMOS distribution amplification network is respectively connected with the first, second, third and fourth output ends of the final-stage NMOS distribution amplification network.
The first input end of the final-stage artificial transmission line is connected with a microstrip line T Lc1And a microstrip line T Lc2Microstrip line T Lc1Another end of the resistor R is connected with a resistor RcResistance RcThe other end of the capacitor is connected with a grounding capacitor CmMicrostrip line T Lc2The other end of the first end is connected with the second input end of the final-stage artificial transmission line and the microstrip line T Lc3Microstrip line T Lc3The other end of the first end-stage artificial transmission line is connected with the third input end of the final-stage artificial transmission line and the microstrip line T Lc4Microstrip line T Lc4The other end of the first end-stage artificial transmission line is connected with the fourth input end of the final-stage artificial transmission line and the microstrip line T Lc5Microstrip line T Lc5The other end of the capacitor C is connected with a capacitor CnCapacitor CnThe other end of the transmission line is the output end of the final-stage artificial transmission line.
The following introduces the specific working principle and process of the present invention with reference to fig. 2:
radio frequency input signal through input terminal RFinThe input end of the last-stage PMOS distribution amplification network and the input end of the last-stage NMOS distribution amplification network enter the circuit, and are simultaneously synthesized into a path of signal from the first output end to the fourth output end of the last-stage artificial transmission line after power amplification is carried out through the amplification network after the input end of the circuit enters the circuit and the input end of the last-stage PMOS distribution amplification network and the input end of the last-stage NMOS distribution amplification network are subjected to de-drive signal amplification, impedance conversion matching and power distribution through theoutAnd (6) outputting.
Based on the circuit analysis, the utility model provides a high-power linear broadband two dimension traveling wave amplifier and the difference of the amplifier structure based on integrated circuit technology in the past lie in the form that the core framework adopted two heap PMOS amplifier networks of broadband and two heap NMOS amplifier networks of distributing type to concatenate:
the broadband two-stack PMOS amplifying network and the distributed two-stack NMOS amplifying network are different from the traditional single transistor in structure, and the details are not repeated;
the difference between the distributed broadband two-pile PMOS amplification network and the two-pile NMOS amplification network and the traditional distributed field effect transistor is that the traditional distributed power amplifier only has one input artificial transmission line and one output artificial transmission line, and particularly when the input impedance of a transistor is high, capacitance voltage division is often needed to realize 50-ohm matching, so that the input matching characteristic is deteriorated, the high-frequency roll-off is serious, and the gain flatness index is poor; and the utility model discloses a broadband PMOS who two-dimentional distributing type amplifies network and two piles of NMOS and amplifies the network, has two artifical transmission lines of input, and the artifical transmission line of output of a sharing, and the equivalence is parallelly connected for two 100 ohmic artifical transmission lines of input, and input impedance matches betterly, and simultaneously, the form that adopts the transmission line of sharing is matchd in the output, under the condition with traditional distributed power amplifier isopower, can show improvement efficiency and power index.
In the whole high-power enhanced field effect transistor power amplifier, the size of a transistor and the sizes of other resistors and capacitors are determined after the gain, bandwidth, output power and other indexes of the whole circuit are comprehensively considered, and through later-stage layout design and reasonable layout, the required indexes can be better realized, and the high-power output capacity, high-power gain and good input-output matching characteristic are realized.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the present invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included within the protection scope of the present invention.

Claims (6)

1. A high-power linear broadband two-dimensional traveling wave amplifier is characterized by comprising a broadband input drive power division amplifying network, a power supply bias network, a final-stage PMOS (P-channel metal oxide semiconductor) distribution amplifying network, a final-stage NMOS (N-channel metal oxide semiconductor) distribution amplifying network and a final-stage artificial transmission line;
the input end of the broadband input drive power division amplifying network is the input end of the whole high-power linear broadband two-dimensional traveling wave amplifier, the first output end of the broadband input drive power division amplifying network is connected with the first input end of the last-stage PMOS distributed amplifying network, the second output end of the broadband input drive power division amplifying network is connected with the input end of the last-stage NMOS distributed amplifying network, and the third output end of the broadband input drive power division amplifying network is connected with the first output end of the power supply bias network;
a second output end of the power supply bias network is connected with a second input end of the final-stage PMOS distribution amplification network;
a second input end of the final-stage PMOS distribution amplification network is connected with a second output end of the power supply bias network; the first output end, the second output end, the third output end and the fourth output end of the final-stage PMOS distributed amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the final-stage artificial transmission line;
the input end of the last-stage NMOS distribution amplification network is connected with the second output end of the broadband input drive power division amplification network; the first output end, the second output end, the third output end and the fourth output end of the last-stage NMOS distributed amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the last-stage artificial transmission line;
and the output end of the final-stage artificial transmission line is the output end of the whole high-power linear broadband two-dimensional traveling wave amplifier.
2. The high-power linear broadband two-dimensional traveling-wave amplifier according to claim 1, wherein the input end of the broadband input driving power division amplifying network is connected with a capacitor C1Capacitor C1Another end of the resistor R is connected with a resistor R1And an inductor L1Resistance R1The other end of the capacitor C is connected with a capacitor C2Capacitor C2Is connected with an inductor L at the other end2Inductor L2The other end of the second switch is connected with a third output end of the broadband input drive power division amplifying network and an inductor L5B terminal and P type field effect transistor M2Inductor L1The other end of the capacitor is connected with a grounding capacitor C3Inductor L3And an inductor L4Inductor L3Is connected with an inductor L at the other end7Microstrip line T L2And a second output terminal of the broadband input drive power division amplifier network, inductor L7The other end of the capacitor is connected with a grounding capacitor C5And a supply voltage VgnInductor L4The other end of the N-type field effect transistor M is connected with the N-type field effect transistor M1Grid electrode of (1), field effect transistor M1Is grounded, microstrip line T L2The other end of the capacitor C is connected with a capacitor C7End a of (1), field effect transistor M1Drain electrode connecting microstrip line T L1Microstrip line T L1The other end of the first electrode is connected with a field effect tube M2Source electrode of (1), field effect transistor M2Gate connection resistance R2And a ground capacitor C4Resistance R2Is connected with an inductor L at the other end6Inductor L6The other end of the first capacitor is connected with a first output end of the broadband input drive power division amplifying network and a capacitor C8Capacitor C8Is connected with the microstrip line T L at the other end3Microstrip line T L3The other end of the capacitor C is also connected with a capacitor C7Terminal a of (a), inductor L5The a end of the capacitor is connected with a grounding capacitor C6And a capacitor C7The b terminal of (1).
3. The high-power linear broadband two-dimensional traveling-wave amplifier according to claim 1, wherein the first output terminal of the power supply bias network is connected with an inductor L8And an inductor L9Inductor L8Is connected with a bias voltage V at the other endgpAnd a ground capacitor C9Inductor L9And the other end of the second switch is connected with a second output end of the power supply bias network.
4. The high power linear broadband two-dimensional traveling-wave amplifier according to claim 1, wherein the first input terminal of the final PMOS distributed amplification network is connected to an inductor Lb1End a and microstrip line T Lb1Microstrip line T Lb1Is connected with an inductor L at the other endb3End a and microstrip line T Lb2Microstrip line T Lb2Is connected with an inductor L at the other endb7End a and microstrip line T Lb3Microstrip line T Lb3Is connected with an inductor L at the other endb10End a and microstrip line T Lb4Microstrip line T Lb4Another end of the resistor R is connected with a resistor RbResistance RbIs connected at the other endGrounding capacitor Cb5And an inductor Lb12Inductor Lb12Is connected with a bias voltage V at the other enddAnd a ground capacitor Cb6(ii) a The second input end of the final-stage PMOS distribution amplification network is connected with a P-type field effect transistor Mb1Drain and inductor Lb4Inductor Lb4The other end of the first electrode is connected with a P-type field effect transistor Mb2Drain and inductor Lb6Inductor Lb6The other end of the first electrode is connected with a P-type field effect transistor Mb3Drain and inductor Lb9Inductor Lb9The other end of the first electrode is connected with a P-type field effect transistor Mb4Inductor Lb1Terminal b of (3) is connected with an inductor Lb2And a ground capacitor Cb1Inductor Lb2The other end of the first electrode is connected with a P-type field effect transistor Mb1Inductor Lb3Terminal b of (3) is connected with an inductor Lb5And a ground capacitor Cb2Inductor Lb5The other end of the first electrode is connected with a P-type field effect transistor Mb2Inductor Lb7Terminal b of (3) is connected with an inductor Lb8And a ground capacitor Cb3Inductor Lb8The other end of the first electrode is connected with a P-type field effect transistor Mb3Inductor Lb10Terminal b of (3) is connected with an inductor Lb11And a ground capacitor Cb4Inductor Lb11The other end of the first electrode is connected with a P-type field effect transistor Mb4A gate electrode of (1); p-type field effect transistor Mb1、Mb2、Mb3、Mb4The source electrodes of the two microstrip lines are respectively connected with a microstrip line T Lb5、TLb6、TLb7、TLb8Microstrip line T Lb5、TLb6、TLb7、TLb8And the other end of the first output terminal is respectively connected with the first, second, third and fourth output terminals of the final-stage PMOS distribution amplification network.
5. The high-power linear broadband two-dimensional traveling-wave amplifier according to claim 1, wherein an inductor L is connected to an input terminal of the last-stage NMOS distributed amplification networka1End a and microstrip line T La1Microstrip line T La1Is connected with an inductor L at the other enda3End a and microstrip line T La2Microstrip line T La2Is connected with an inductor L at the other enda5A terminal and aStrip line T La3Microstrip line T La3Is connected with an inductor L at the other enda7End a and microstrip line T La4Microstrip line T La4Another end of the resistor R is connected with a resistor RaResistance RaThe other end of the capacitor is connected with a grounding capacitor Ca5Inductor La1Terminal b of (3) is connected with an inductor La2And a ground capacitor Ca1Inductor La2The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma1Inductor La3Terminal b of (3) is connected with an inductor La4And a ground capacitor Ca2Inductor La4The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma2Inductor La5Terminal b of (3) is connected with an inductor La6And a ground capacitor Ca3Inductor La6The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma3Inductor La7Terminal b of (3) is connected with an inductor La8And a ground capacitor Ca4Inductor La8The other end of the N-type field effect transistor M is connected with the N-type field effect transistor Ma4A gate electrode of (1); n-type field effect transistor Ma1、Ma2、Ma3、Ma4The source of (2) is grounded; n-type field effect transistor Ma1、Ma2、Ma3、Ma4The drains of the two are respectively connected with a microstrip line T La5、TLa6、TLa7、TLa8Microstrip line T La5、TLa6、TLa7、TLa8And the other end of the first and second terminals is respectively connected with the first, second, third and fourth output terminals of the last-stage NMOS distributed amplification network.
6. The high-power linear broadband two-dimensional traveling-wave amplifier according to claim 1, wherein the first input end of the final artificial transmission line is connected with a microstrip line T Lc1And a microstrip line T Lc2Microstrip line T Lc1Another end of the resistor R is connected with a resistor RcResistance RcThe other end of the capacitor is connected with a grounding capacitor CmMicrostrip line T Lc2The other end of the first end-stage artificial transmission line is connected with the second input end of the final-stage artificial transmission line and the microstrip line T Lc3Microstrip line T Lc3The other end of the first end-stage artificial transmission line is connected with the third input end of the final-stage artificial transmission line and the microstrip line T Lc4Microstrip line T Lc4The other end of the first end-stage artificial transmission line is connected with the fourth input end of the final-stage artificial transmission line and the microstrip line T Lc5Microstrip line T Lc5The other end of the capacitor C is connected with a capacitor CnCapacitor CnAnd the other end of the transmission line is the output end of the final-stage artificial transmission line.
CN201922454219.XU 2019-12-30 2019-12-30 High-power linear broadband two-dimensional traveling wave amplifier Active CN211046876U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114362685A (en) * 2021-12-14 2022-04-15 成都嘉纳海威科技有限责任公司 Power amplifier based on high Q value differential coupling technology

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114362685A (en) * 2021-12-14 2022-04-15 成都嘉纳海威科技有限责任公司 Power amplifier based on high Q value differential coupling technology
CN114362685B (en) * 2021-12-14 2022-09-20 成都嘉纳海威科技有限责任公司 Power amplifier based on high Q value differential coupling technology

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