CN211018816U - Wireless receiving control circuit with strong anti-interference performance for mining receiver - Google Patents
Wireless receiving control circuit with strong anti-interference performance for mining receiver Download PDFInfo
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- CN211018816U CN211018816U CN201922406663.4U CN201922406663U CN211018816U CN 211018816 U CN211018816 U CN 211018816U CN 201922406663 U CN201922406663 U CN 201922406663U CN 211018816 U CN211018816 U CN 211018816U
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Abstract
The utility model discloses a wireless receiving control circuit of mining receiver that interference killing feature is strong, including the low-power consumption wireless receiving main chip, still include the wireless signal receiving terminal, be used for receiving the first signal that the sender sent, L C filter circuit, directly link to each other with the wireless signal receiving terminal, be used for filtering the clutter in order to obtain first processing signal, triode mixing circuit, directly link to each other through first coupling electric capacity C3 with L C filter circuit's output, be arranged in with the first processing signal carrier signal's frequency transform in order to obtain a second processing signal that has new carrier frequency, low noise amplifier circuit, directly link to each other through second coupling electric capacity C6 with triode mixing circuit's output, the utility model discloses a set up L C filter circuit, triode mixing circuit, low noise amplifier circuit, well amplifier circuit and frequency discrimination circuit, improved the anti-interference feature of receiver and the accuracy of received signal.
Description
Technical Field
The utility model relates to a mining remote control receiver technical field specifically is a wireless receiving control circuit of mining receiver that interference killing feature is strong.
Background
The mining intrinsic safety type remote control receiver is specially designed for remote control operation control of equipment such as coal mine underground coal mining machines and heading machines, and the application meets the standard Q/BD 005-2012. The receiver receives the radio operation signal from the remote control transmitter, demodulates the signal and outputs the demodulated signal in an RS-485 form, and the receiver can send an RS-485 control signal through a local button, wherein the signal is the same as the corresponding wireless receiving command. The external receiver is generally fixed at a position close to a driver of equipment such as a heading machine, a coal mining machine and the like by using a removable open fixture, and the mounting position and the fixture are designed by paying attention to a relatively large open space facing the using direction of the remote control transmitting device. The mining remote control receiver has higher requirements on the anti-interference performance of a control circuit of the mining remote control receiver due to the fact that the using environment of the mining remote control receiver is severe, but the anti-interference performance of the existing high-frequency board control circuit of the mining remote control receiver is not improved through reasonable circuit improvement.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a wireless receiving control circuit of mining receiver that interference killing feature is strong, through setting up L C filter circuit, triode mixing circuit, low-noise amplifier circuit, well discharge circuit and frequency discrimination circuit, improved the interference killing feature of receiver and received signal's accuracy.
In order to achieve the above object, the utility model provides a following technical scheme: the utility model provides a wireless receiving control circuit of mining receiver that interference killing feature is strong, includes low-power consumption wireless receiving main chip, still includes:
the wireless signal receiving end is used for receiving a first signal sent by the transmitter;
the L C filter circuit is directly connected with the wireless signal receiving end and is used for filtering clutter to obtain a first processed signal;
the triode mixer circuit is directly connected with the output end of the L C filter circuit through a first coupling capacitor C3 and is used for converting the frequency of a carrier signal in the first processing signal to obtain a second processing signal with a new carrier frequency;
the low-noise amplification circuit is directly connected with the output end of the triode mixer circuit through a second coupling capacitor C6 and is used for carrying out power amplification on the second processing signal to obtain a second amplified signal;
the middle amplifying circuit is directly connected with the output end of the low-noise amplifying circuit through a third coupling capacitor C7 and is used for improving the signal-to-noise ratio of the second amplified signal to obtain a third processed signal;
the frequency discrimination circuit is directly connected with the output end of the intermediate amplifier circuit and is used for separating the low-frequency modulation signal in the third processing signal;
the frequency discrimination circuit comprises a phase shift circuit and a band-pass filter circuit;
the output end of the frequency discrimination circuit is electrically connected with the first input end of the wireless receiving main chip.
Preferably, the L C filter circuit includes a low-pass filter composed of a capacitor C1, an inductor L1 and a capacitor C2, one end of each of the capacitor C1 and the capacitor C2 is connected to a signal ground, the other end of each of the capacitor C1 and the capacitor C2 is connected to an inductor L1, and one end of the capacitor C1 is electrically connected to a wireless signal receiving terminal.
Preferably, the triode mixer circuit comprises a first resonant circuit formed by connecting an inductor L2 and a capacitor C4 in parallel and a second resonant circuit formed by connecting L3 and a capacitor C5 in parallel, one end of the first resonant circuit is connected with a signal ground, the other end of the first resonant circuit is electrically connected with a base of a triode Q1, one end of the second resonant circuit is connected with a power supply VCC through a resistor R1, and the other end of the second resonant circuit is electrically connected with a collector of a triode Q1.
Preferably, the low noise amplifying circuit includes a transistor Q2, a collector of the transistor Q2 is connected to the power source VCC through a resistor R3, and the resistor R3 is configured to convert a change in collector current into a change in voltage.
Preferably, the base of the transistor Q2 is connected to the power supply VCC through a resistor R2, and the transmitter of the transistor is connected to the signal ground through a resistor R4.
Preferably, the intermediate amplifier circuit comprises a resistor R5 for input impedance matching, an inductor L4 for tuning the input circuit, a current limiting resistor R6 and a triode Q3, wherein an emitter of the triode Q3 is connected with a signal ground through a resistor R9.
Preferably, the intermediate-discharge circuit further includes a damping resistor R7, a decoupling resistor R8, an output tuning inductor L5 and a distributed capacitor C9, the damping resistor R7 is connected in parallel with the output tuning inductor L5, and a collector of the triode Q3 is electrically connected to one end of the tuning inductor L5.
Preferably, the phase shift circuit comprises a capacitor C8 and a resistor R10, one end of the capacitor C8 is connected to the output end of the intermediate amplifier circuit, the other end of the capacitor C8 is connected to the resistor R10, and the other end of the resistor R10 is connected to a signal ground.
Preferably, the band-pass filter circuit includes a capacitor C10 and an inductor L6 connected in parallel, where one end of the inductor L6 is connected to signal ground, and the other end is connected to a capacitor C11.
Preferably, the common terminal of the capacitor C8 and the resistor R10 is connected to one terminal of a capacitor C10, the other terminal of the capacitor C10 is connected to signal ground, and the other terminal of the capacitor C11 is connected to the 3 rd pin of the wireless receiving main chip.
Compared with the prior art, the beneficial effects of the utility model are that:
the utility model discloses a mining receiver high frequency board control circuit, through setting up L C filter circuit, triode mixing circuit, low noise amplifier circuit, well discharge circuit and frequency discrimination circuit, improved the anti interference ability of receiver and received signal's accuracy.
Drawings
Fig. 1 is a schematic circuit block diagram of a wireless receiving control circuit of a mining receiver with strong anti-interference performance according to the present invention;
fig. 2 is a schematic diagram of circuit connection of an L C filter circuit, a triode mixer circuit, a low-noise amplifier circuit, a middle amplifier circuit and a frequency discrimination circuit in a wireless receiving control circuit of the mining receiver with strong anti-interference performance;
fig. 3 is the utility model relates to a circuit schematic diagram of wireless reception main chip among the wireless reception control circuit of mining receiver that interference killing feature is strong.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1, the present invention provides an embodiment: the utility model provides a wireless receiving control circuit of mining receiver that interference killing feature is strong, includes low-power consumption wireless receiving main chip, still includes:
the wireless signal receiving end is used for receiving a first signal sent by the transmitter;
the L C filter circuit is directly connected with the wireless signal receiving end and is used for filtering clutter to obtain a first processed signal;
the triode mixer circuit is directly connected with the output end of the L C filter circuit through a first coupling capacitor C3 and is used for converting the frequency of a carrier signal in the first processing signal to obtain a second processing signal with a new carrier frequency;
the low-noise amplification circuit is directly connected with the output end of the triode mixer circuit through a second coupling capacitor C6 and is used for carrying out power amplification on the second processing signal to obtain a second amplified signal;
the middle amplifying circuit is directly connected with the output end of the low-noise amplifying circuit through a third coupling capacitor C7 and is used for improving the signal-to-noise ratio of the second amplified signal to obtain a third processed signal;
the frequency discrimination circuit is directly connected with the output end of the intermediate amplifier circuit and is used for separating the low-frequency modulation signal in the third processing signal;
the frequency discrimination circuit comprises a phase shift circuit and a band-pass filter circuit;
the output end of the frequency discrimination circuit is electrically connected with the first input end of the wireless receiving main chip.
The utility model provides a pair of embodiment, L C filter circuit includes the low pass filter who comprises electric capacity C1, inductance L1 and electric capacity C2, electric capacity C1 and electric capacity C2's one end all links to each other with signal ground, and the other end is connected through inductance L1, electric capacity C1's one end is connected with the radio signal receiving terminal electricity pi type low pass filter that electric capacity C1, inductance L1 and electric capacity C2 constitute, wherein electric capacity C1 and electric capacity C2 are used for filtering high frequency signal, and inductance L1 is used for making low frequency signal pass through.
The utility model provides a pair of embodiments, triode mixing circuit includes the first resonant circuit that comprises inductance L2 and electric capacity C4 parallel connection and the second resonant circuit that comprises L3 and electric capacity C5 parallel connection, first resonant circuit's one end links to each other with signal ground, and the other end is connected with triode Q1's base electricity, second resonant circuit's one end is passed through resistance R1 and is linked to each other with the power VCC, and the other end is connected with triode Q1's collecting electrode electricity.
The utility model provides a pair of embodiments, low noise amplifier circuit includes triode Q2, triode Q2's collecting electrode passes through resistance R3 and links to each other with the power VCC, resistance R3 is used for turning into voltage variation with collector current variation.
The utility model provides a pair of embodiment, triode Q2's base passes through resistance R2 and links to each other with the power VCC, and the transmitter of triode passes through resistance R4 and links to each other with signal ground.
The utility model provides a pair of embodiments, well amplifier circuit including be used for carrying out input impedance matching's resistance R5, be used for carrying out harmonious inductance L4, current limiting resistance R6 and triode Q3 to input circuit, triode Q3's projecting pole passes through resistance R9 and links to each other with signal ground.
The utility model provides a pair of embodiments, well discharge circuit still includes damping resistance R7, decoupling resistance R8, output tuning inductance L5 and distributed capacitance C9, damping resistance R7 and output tuning inductance L5 parallel connection, triode Q3's collecting electrode is connected with tuning inductance L5's one end electricity.
The utility model provides a pair of embodiment, phase shift circuit includes electric capacity C8 and resistance R10, electric capacity C8's one end links to each other with the output of well circuit of putting, and the other end links to each other with resistance R10, resistance R10's the other end links to each other with signal ground.
The utility model provides a pair of embodiments, band-pass filter circuit includes parallel connection's electric capacity C10 and inductance L6, inductance L6's one end links to each other with signal ground, and the other end links to each other with electric capacity C11.
The utility model provides a pair of embodiment, electric capacity C8 links to each other with electric capacity C10's one end with resistance R10's common port, electric capacity C10's the other end links to each other with signal ground, electric capacity C11's other end wireless reception owner chip's 3 rd pin links to each other for will be through enlargeing the received signal who makes an uproar and handle and operate to wireless reception owner chip.
The working principle is that the mining remote control receiver receives a wireless signal sent by the mining remote control transmitter through a wireless signal receiving end, the wireless signal is firstly used for converting clutter through an L C filter circuit to obtain a first processing signal, then the frequency of a carrier signal in the first processing signal is converted through a triode mixing circuit directly connected with the output end of a L C filter circuit through a first coupling capacitor C3 to obtain a second processing signal with a new carrier frequency, then the second processing signal is subjected to power amplification through a low-noise amplification circuit directly connected with the output end of the triode mixing circuit through a second coupling capacitor C6 to obtain a second amplification signal, the second amplification signal is subjected to signal-to-noise ratio improvement through a middle amplification circuit to obtain a third processing signal, and finally a low-frequency modulation signal in the third processing signal is separated through a frequency discrimination circuit directly connected with the output end of the middle amplification circuit and then is electrically connected with the first input end of a wireless receiving main chip, so that the amplified and denoised receiving signal is sent to the wireless receiving main chip for processing and operation, and the anti-interference performance of the receiver and the accuracy of the receiving signal are improved.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (10)
1. The utility model provides a wireless receiving control circuit of mining receiver that interference killing feature is strong, includes low-power consumption wireless receiving main chip, its characterized in that still includes:
the wireless signal receiving end is used for receiving a first signal sent by the transmitter;
the L C filter circuit is directly connected with the wireless signal receiving end and is used for filtering clutter to obtain a first processed signal;
the triode mixer circuit is directly connected with the output end of the L C filter circuit through a first coupling capacitor C3 and is used for converting the frequency of a carrier signal in the first processing signal to obtain a second processing signal with a new carrier frequency;
the low-noise amplification circuit is directly connected with the output end of the triode mixer circuit through a second coupling capacitor C6 and is used for carrying out power amplification on the second processing signal to obtain a second amplified signal;
the middle amplifying circuit is directly connected with the output end of the low-noise amplifying circuit through a third coupling capacitor C7 and is used for improving the signal-to-noise ratio of the second amplified signal to obtain a third processed signal;
the frequency discrimination circuit is directly connected with the output end of the intermediate amplifier circuit and is used for separating the low-frequency modulation signal in the third processing signal;
the frequency discrimination circuit comprises a phase shift circuit and a band-pass filter circuit;
the output end of the frequency discrimination circuit is electrically connected with the first input end of the wireless receiving main chip.
2. The wireless receiving control circuit of the mining receiver with strong anti-interference performance according to claim 1, characterized in that the L C filter circuit comprises a low-pass filter consisting of a capacitor C1, an inductor L1 and a capacitor C2, one end of each of the capacitor C1 and the capacitor C2 is connected with a signal ground, the other end of each of the capacitor C1 and the capacitor C2 is connected with an inductor L1, and one end of the capacitor C1 is electrically connected with a wireless signal receiving end.
3. The wireless receiving control circuit of the mining receiver with strong interference resistance as claimed in claim 1 or 2, characterized in that the triode mixer circuit comprises a first resonant circuit formed by connecting an inductor L2 and a capacitor C4 in parallel and a second resonant circuit formed by connecting L3 and a capacitor C5 in parallel, one end of the first resonant circuit is connected with signal ground, the other end of the first resonant circuit is electrically connected with the base electrode of a triode Q1, one end of the second resonant circuit is connected with a power supply VCC through a resistor R1, and the other end of the second resonant circuit is electrically connected with the collector electrode of a triode Q1.
4. The wireless receiving control circuit of the mining receiver with strong anti-interference performance according to claim 1, characterized in that: the low-noise amplifying circuit comprises a triode Q2, a collector of the triode Q2 is connected with a power supply VCC through a resistor R3, and the resistor R3 is used for converting current change of the collector into voltage change.
5. The mining receiver wireless receiving control circuit with high interference rejection performance according to claim 4, wherein: the base of the transistor Q2 is connected to the power supply VCC through a resistor R2, and the transmitter of the transistor is connected to signal ground through a resistor R4.
6. The wireless receiving control circuit of the mining receiver with strong interference resistance as claimed in claim 1, wherein the intermediate amplifier circuit comprises a resistor R5 for input impedance matching, an inductor L4 for tuning the input circuit, a current limiting resistor R6 and a triode Q3, and an emitter of the triode Q3 is connected with a signal ground through a resistor R9.
7. The wireless receiving control circuit of the mining receiver with high interference resistance as claimed in claim 6, wherein the intermediate discharge circuit further comprises a damping resistor R7, a decoupling resistor R8, an output tuning inductor L5 and a distributed capacitor C9, the damping resistor R7 is connected in parallel with the output tuning inductor L5, and the collector of the triode Q3 is electrically connected with one end of the tuning inductor L5.
8. The mining receiver wireless receiving control circuit with high interference rejection performance according to claim 7, wherein: the phase shift circuit comprises a capacitor C8 and a resistor R10, one end of the capacitor C8 is connected with the output end of the intermediate amplifier circuit, the other end of the capacitor C8 is connected with the resistor R10, and the other end of the resistor R10 is connected with a signal ground.
9. The wireless receiving control circuit of the mining receiver with high anti-jamming performance according to claim 1, characterized in that the band-pass filter circuit comprises a capacitor C10 and an inductor L6 which are connected in parallel, one end of the inductor L6 is connected with signal ground, and the other end is connected with a capacitor C11.
10. The wireless receiving control circuit of the mining receiver with high interference resistance according to claim 9, characterized in that: the common end of the capacitor C8 and the resistor R10 is connected with one end of a capacitor C10, the other end of the capacitor C10 is connected with a signal ground, and the other end of the capacitor C11 is connected with a No. 3 pin of a wireless receiving main chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922406663.4U CN211018816U (en) | 2019-12-27 | 2019-12-27 | Wireless receiving control circuit with strong anti-interference performance for mining receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922406663.4U CN211018816U (en) | 2019-12-27 | 2019-12-27 | Wireless receiving control circuit with strong anti-interference performance for mining receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211018816U true CN211018816U (en) | 2020-07-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922406663.4U Active CN211018816U (en) | 2019-12-27 | 2019-12-27 | Wireless receiving control circuit with strong anti-interference performance for mining receiver |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211018816U (en) |
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2019
- 2019-12-27 CN CN201922406663.4U patent/CN211018816U/en active Active
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