CN211018269U - Heavy current surge protection circuit - Google Patents
Heavy current surge protection circuit Download PDFInfo
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- CN211018269U CN211018269U CN201922374902.2U CN201922374902U CN211018269U CN 211018269 U CN211018269 U CN 211018269U CN 201922374902 U CN201922374902 U CN 201922374902U CN 211018269 U CN211018269 U CN 211018269U
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Abstract
The utility model discloses a heavy current surge protection circuit, including surge protection circuit, surge protection circuit includes surge suppression circuit, a control circuit, surge time setting circuit and output voltage detection circuit, surge suppression circuit's output and output voltage detection circuit are connected, output voltage detection circuit's output is connected with control circuit's input, control circuit and surge suppression circuit are connected, surge time setting circuit is connected with control circuit, control circuit is used for receiving output voltage detection circuit output's voltage signal and predetermines the voltage value and compare, control when voltage signal is greater than predetermine the voltage value surge suppression circuit inlays output voltage to the output voltage output of setting, surge time setting circuit is used for setting up the surge time. The surge protection circuit is used for restraining the surge voltage, the output voltage is stable, the current equalization of the surge protection circuit is guaranteed, and the normal work of a follow-up circuit is guaranteed.
Description
Technical Field
The utility model belongs to the technical field of the surge restraines, a heavy current surge protection circuit is related to.
Background
At present, surge voltage exists at the input end of many precise electric equipment and instruments in the processes of starting, switching, working and the like. Because the surge voltage exceeds the input voltage application range of the circuit, the circuit can not work normally, even be damaged, and finally the problems of restarting of equipment instruments, damage of equipment and the like are caused, so that serious influence is generated.
At present, a surge protection circuit is usually adopted to suppress overvoltage surge voltage, so that output voltage is always maintained in a power supply range allowed by equipment, and the stability of a power supply system is ensured. However, under a large current condition, because the dissipation power generated by the surge voltage is very large, the existing surge protection circuit has the risk of non-uniform current, and the circuit is damaged or cannot work normally.
Disclosure of Invention
The utility model aims to provide a: the high-current surge protection circuit solves the problems that under the high-current condition, the existing surge protection circuit has the risk of non-current sharing due to the fact that dissipation power generated by surge voltage is very high, and the circuit can be damaged or cannot normally work.
The utility model adopts the technical scheme as follows:
the utility model provides a heavy current surge protection circuit, includes surge protection circuit, surge protection circuit includes surge suppression circuit, control circuit, surge time setting circuit and output voltage detection circuit, surge suppression circuit's output and output voltage detection circuit are connected, output voltage detection circuit's output is connected with control circuit's input, control circuit and surge suppression circuit are connected, surge time setting circuit is connected with control circuit, control circuit is used for receiving the voltage signal of output voltage detection circuit output and predetermines the voltage value and compare, controls when voltage signal is greater than predetermine the voltage value surge suppression circuit is inserted output voltage to the output voltage output of setting, surge time setting circuit is used for setting up surge time.
Further, the surge protection circuits are arranged in multiple stages, and the multiple stages of surge protection circuits are arranged in series.
Furthermore, the single-stage surge protection circuit equally divides the total power generated by the surge voltage, and the output voltage of the surge protection circuit is reduced step by step.
Further, the surge protection circuit specifically includes: the field effect transistor VT1 comprises an N-channel field effect transistor VT1, a resistor R1 and a capacitor C1, wherein the drain electrode of the field effect transistor VT1 is connected with the anode of an input end, the source electrode of the field effect transistor VT1 is connected with the anode of an output end and simultaneously connected with a control circuit, the grid electrode of the field effect transistor VT1 is connected with a resistor R1 and a capacitor C1 in series and then grounded, and any point between the resistor R1 and the capacitor C1 is connected with the control circuit.
The control circuit specifically comprises a controller U1 with the model number of L TC4366, a resistor R4, a resistor R5, a resistor R11, capacitors C3 and C7, wherein one end of the resistor R4 is connected with an input positive electrode, the other end of the resistor R4 is connected with a pin 3 of the controller U1, one end of the resistor R5 is connected with the input positive electrode, the other end of the resistor R5 is connected with a pin 4 of the controller U1, one end of the resistor R11 is connected with a pin 1, a pin 8 and a pin 9 of the controller U1 and is connected with a surge time setting circuit, the other end of the resistor R11 is grounded, a pin 2 of the controller U1 is connected with a surge time setting circuit, one end of the capacitor C3 is connected with an output positive electrode, the other end of the capacitor C11 is connected with one end of the input positive electrode, the other end of the capacitor C7 is connected with a ground, a pin 7 of the controller U1 is connected with an output voltage detection circuit, and pin 6865 and pin 686.
Further, the surge time setting circuit specifically includes: the capacitor C8, the capacitor C9 and the capacitor C10 are connected in parallel, one end of the capacitor C8, one end of the capacitor C9 and one end of the capacitor C10 are connected with the control circuit, and the other end of the capacitor C8, the other end of the capacitor C9 and the other end of the capacitor C10 are connected with the control circuit and then grounded.
Further, the output voltage detection circuit specifically includes: the circuit comprises a resistor R8 and a resistor R9, wherein one end of the resistor R8 is connected with the positive electrode of the output after the resistor R9 is connected in series, the other end of the resistor R8 is connected with the positive electrode of the output, the other end of the resistor R9 is grounded, and any point between the resistor R8 and the resistor R9 is connected with a control circuit.
To sum up, owing to adopted above-mentioned technical scheme, the beneficial effects of the utility model are that:
the utility model relates to a heavy current surge protection circuit suppresses surge voltage through surge protection circuit, under the rated power condition that guarantees that surge protection circuit can bear, realizes surge protection circuit normal work in whole surge time, and output voltage is stable, guarantees that surge protection circuit flow equalizes, ensures that follow-up circuit normally works.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and that for those skilled in the art, other relevant drawings can be obtained according to the drawings without inventive effort, wherein:
fig. 1 is a schematic diagram of a frame of a surge suppression circuit of the present invention;
fig. 2 is a schematic diagram of a frame of a multi-stage arrangement of the surge suppression circuit of the present invention;
fig. 3 is a circuit diagram of a surge protection circuit of the present invention;
fig. 4 is a specific circuit diagram of the surge protection circuit of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention, i.e., the described embodiments are only some, but not all embodiments of the invention. The components of embodiments of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiment of the present invention, all other embodiments obtained by the person skilled in the art without creative work belong to the protection scope of the present invention.
It is noted that relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Example 1
As shown in fig. 1, the utility model provides a pair of heavy current surge protection circuit, surge protection circuit includes surge suppression circuit, control circuit, surge time setting circuit and output voltage detection circuit, surge suppression circuit's output and output voltage detection circuit are connected, output voltage detection circuit's output and control circuit's input are connected, control circuit and surge suppression circuit are connected, surge time setting circuit is connected with control circuit, control circuit is used for receiving the voltage signal of output voltage detection circuit output and predetermines the voltage value and compare, controls when voltage signal is greater than predetermineeing the voltage value surge suppression circuit sets up output voltage to the output voltage output of setting, surge time setting circuit is used for setting up the surge time.
The utility model discloses: the surge protection circuit restrains the surge voltage through the surge suppression circuit, the output voltage of the surge suppression circuit is detected through the output voltage detection circuit and fed back to the control circuit, the control circuit controls the surge suppression circuit to clamp the output voltage to the set output voltage to output, wherein the surge time is controlled through the surge time setting circuit, the technical requirement of the surge time is guaranteed to be met, and the output of the surge suppression circuit in the surge protection circuit accords with the technology. The surge protection circuit is used for restraining surge voltage, normal work of the surge protection circuit in the whole surge time is realized under the condition that the rated power which can be borne by the surge protection circuit is guaranteed, the output voltage is stable, current equalization of the surge protection circuit is guaranteed, and normal work of a follow-up circuit is guaranteed.
Example 2
On the basis of embodiment 1, as shown in fig. 2, the surge protection circuit is provided in multiple stages, and the multiple stages of surge protection circuits are arranged in series; the single-stage surge protection circuit equally divides the total power generated by surge voltage, and the output voltage of the surge protection circuit is reduced step by step.
In this embodiment, the total power that surge voltage produced is shared through the surge protection circuit of multistage series connection, single-stage surge protection circuit suppresses surge voltage through surge suppression circuit, detect surge suppression circuit's output voltage and feed back to control circuit through output voltage detection circuit, control circuit control surge suppression circuit clamps output voltage to the output voltage who sets up and outputs next level surge protection circuit, wherein, the surge time is controlled through the surge time setting circuit, guarantee to satisfy the technical requirement of surge time, until the surge suppression circuit output in the surge protection circuit of last level accords with the technique. The single-stage surge protection circuit equally divides the total power generated by the surge voltage, the set value of the output voltage of each stage is gradually reduced, the single-stage surge protection circuit is convenient to share the total power generated by the surge voltage, and the output voltage set by the last stage is ensured to be the technical requirement output voltage value.
Example 3
As shown in fig. 3, the utility model provides a pair of specific surge protection circuit, surge protection circuit specifically includes: the field effect transistor VT1 comprises an N-channel field effect transistor VT1, a resistor R1 and a capacitor C1, wherein the drain electrode of the field effect transistor VT1 is connected with the anode of an input end, the source electrode of the field effect transistor VT1 is connected with the anode of an output end and simultaneously connected with a control circuit, the grid electrode of the field effect transistor VT1 is connected with a resistor R1 and a capacitor C1 in series and then grounded, and any point between the resistor R1 and the capacitor C1 is connected with the control circuit. In practice, the filtering is performed through the resistor R1 and the capacitor C1, and the power consumption generated by the surge voltage is transferred to the outside through the drain electrode of the field effect transistor VT1 in the form of heat energy.
Specifically, as shown in fig. 3, the control circuit specifically includes a controller U1 of model L TC4366, a resistor R4, a resistor R5, a resistor R11, and capacitors C3 and C7, the resistor R4 has one end connected to the input positive electrode and the other end connected to pin 3 of the controller U1, the resistor R5 has one end connected to the input positive electrode and the other end connected to pin 4 of the controller U1, the resistor R11 has one end connected to pin 1, pin 8, and pin 9 of the controller U1 and to the surge time setting circuit and the other end grounded, the controller U1 has pin 2 connected to the surge time setting circuit, the capacitor C3 has one end connected to the output positive electrode and the other end connected to one end of the resistor R11, the capacitor C7 has one end connected to the input positive electrode and the other end grounded, the controller U1 has pin 7 connected to the output voltage detection circuit, the pins 5 and 6 of the controller U1 are connected to the input positive electrode and the output voltage detection circuit, the output voltage control circuit, the output voltage is stabilized by the resistor R72 and the output voltage control resistor R1, the output voltage control circuit is controlled by comparing the input resistor R1 and the output voltage control gate 1, the output voltage of the input resistor R1, the output resistor R1, and the output voltage control circuit 1.
Specifically, as shown in fig. 3, the surge time setting circuit specifically includes: the capacitor C8, the capacitor C9 and the capacitor C10 are connected in parallel, one end of the capacitor C8, one end of the capacitor C9 and one end of the capacitor C10 are connected with the control circuit, and the other end of the capacitor C8, the other end of the capacitor C9 and the other end of the capacitor C10 are connected with the control circuit and then grounded. In implementation, the setting of the surge time is realized by setting the total capacitance value of the capacitor C8, the capacitor C9 and the capacitor C10.
Specifically, as shown in fig. 3, the output voltage detection circuit specifically includes: the circuit comprises a resistor R8 and a resistor R9, wherein one end of the resistor R8 is connected with the positive electrode of the output after the resistor R9 is connected in series, the other end of the resistor R8 is connected with the positive electrode of the output, the other end of the resistor R9 is grounded, and any point between the resistor R8 and the resistor R9 is connected with a control circuit. In implementation, the resistor R8 and the resistor R9 form an output voltage detection circuit, so that the output voltage is detected and fed back to the control circuit, wherein the resistance values of the resistor R8 and the resistor R9 are set to determine the output voltage, i.e., the single-stage output voltage can be obtained through calculation.
As shown in fig. 4, in the specific circuit diagram of the multi-stage series surge protection circuit, the single-stage surge protection circuit equally divides the total power generated by the surge voltage, and the set value of the output voltage of each stage is gradually decreased, so that the single-stage surge protection circuit can divide the total power generated by the surge voltage, and the output voltage set at the last stage is ensured to be the output voltage value required by the technology.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any modifications, equivalents and improvements made by those skilled in the art within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (7)
1. A kind of heavy current surge protective circuit, characterized by: including surge protection circuit, surge protection circuit includes surge suppression circuit, control circuit, surge time setting circuit and output voltage detection circuit, surge suppression circuit's output and output voltage detection circuit are connected, output voltage detection circuit's output is connected with control circuit's input, control circuit is connected with surge suppression circuit, surge time setting circuit is connected with control circuit, control circuit is used for receiving the voltage signal of output voltage detection circuit output and comparing with the preset voltage value, controls when voltage signal is greater than preset voltage value surge suppression circuit inlays output voltage to the output voltage output of setting, surge time setting circuit is used for setting up surge time.
2. A high current surge protection circuit according to claim 1, wherein: the surge protection circuit is arranged in multiple stages, and the multiple stages of surge protection circuits are connected in series.
3. A high current surge protection circuit according to claim 2, wherein: the single-stage surge protection circuit equally divides the total power generated by surge voltage, and the output voltage of the surge protection circuit is reduced step by step.
4. A high current surge protection circuit according to claim 1, wherein: the surge protection circuit specifically includes: the field effect transistor VT1 comprises an N-channel field effect transistor VT1, a resistor R1 and a capacitor C1, wherein the drain electrode of the field effect transistor VT1 is connected with the anode of an input end, the source electrode of the field effect transistor VT1 is connected with the anode of an output end and simultaneously connected with a control circuit, the grid electrode of the field effect transistor VT1 is connected with a resistor R1 and a capacitor C1 in series and then grounded, and any point between the resistor R1 and the capacitor C1 is connected with the control circuit.
5. A large-current surge protection circuit according to claim 1, wherein the control circuit specifically comprises a controller U1 with a model number of L TC4366, a resistor R4, a resistor R5, a resistor R11, capacitors C3 and C7, one end of the resistor R4 is connected with an input positive electrode, the other end is connected with a pin 3 of the controller U1, one end of the resistor R5 is connected with the input positive electrode, the other end is connected with a pin 4 of the controller U1, one end of the resistor R11 is connected with a pin 1, a pin 8 and a pin 9 of a controller U1 and is connected with a surge time setting circuit, and the other end is grounded, a pin 2 of the controller U1 is connected with the surge time setting circuit, one end of the capacitor C3 is connected with an output positive electrode, the other end is connected with one end of a resistor R11, one end of the capacitor C7 is connected with the input positive electrode, the other end is grounded, a pin 7 of the controller U1 is connected with an output voltage detection circuit, and a pin 6866 and a surge suppression circuit are connected with a pin.
6. A high current surge protection circuit according to claim 1, wherein: the surge time setting circuit specifically comprises: the capacitor C8, the capacitor C9 and the capacitor C10 are connected in parallel, one end of the capacitor C8, one end of the capacitor C9 and one end of the capacitor C10 are connected with the control circuit, and the other end of the capacitor C8, the other end of the capacitor C9 and the other end of the capacitor C10 are connected with the control circuit and then grounded.
7. A high current surge protection circuit according to claim 1, wherein: the output voltage detection circuit specifically includes: the circuit comprises a resistor R8 and a resistor R9, wherein one end of the resistor R8 is connected with the positive electrode of the output after the resistor R9 is connected in series, the other end of the resistor R8 is connected with the positive electrode of the output, the other end of the resistor R9 is grounded, and any point between the resistor R8 and the resistor R9 is connected with a control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922374902.2U CN211018269U (en) | 2019-12-25 | 2019-12-25 | Heavy current surge protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922374902.2U CN211018269U (en) | 2019-12-25 | 2019-12-25 | Heavy current surge protection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211018269U true CN211018269U (en) | 2020-07-14 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922374902.2U Active CN211018269U (en) | 2019-12-25 | 2019-12-25 | Heavy current surge protection circuit |
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| Country | Link |
|---|---|
| CN (1) | CN211018269U (en) |
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2019
- 2019-12-25 CN CN201922374902.2U patent/CN211018269U/en active Active
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