CN210955062U - General computing platform PCIe bus and CAN interface conversion device based on MXM structure - Google Patents
General computing platform PCIe bus and CAN interface conversion device based on MXM structure Download PDFInfo
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- CN210955062U CN210955062U CN202020305890.8U CN202020305890U CN210955062U CN 210955062 U CN210955062 U CN 210955062U CN 202020305890 U CN202020305890 U CN 202020305890U CN 210955062 U CN210955062 U CN 210955062U
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Abstract
The utility model provides a general computing platform PCIe bus and CAN interface conversion equipment based on MXM structure belongs to general computing platform CAN communication interface application, and its structure includes MXM golden finger, FPGA chip, CAN controller, CAN transceiver, the MXM golden finger includes PCIe standard interface, the FPGA chip passes through the PCIe signal line and links to each other with the MXM golden finger, and the FPGA chip is PCIe agreement and CAN decoding circuit, and the FPGA chip links to each other with the CAN controller in order, and the CAN controller is connected in order with the CAN transceiver. According to the technical scheme, the PCIe circuit is matched with the FPGA chip of the programmable logic device, conversion between the PCIe bus based on the MXM structure and the CAN protocol is achieved, and the technical problem that conversion of the CAN bus protocol of the vehicle-mounted domestic integrated computer is difficult is solved.
Description
Technical Field
The utility model belongs to general computing platform CAN communication interface application, specifically speaking relate to a communication interface conversion equipment that all kinds of military vehicle carried computer is used for extension and other on-vehicle CAN interface devices.
Background
The CAN is a short for Controller Area Network (CAN), and is one of the most widely used field buses internationally, and the CAN bus protocol has become a standard bus of an automobile computer control system and an embedded industrial control local Area Network. At present, military equipment is developed towards informatization and intellectualization, and various informatization and mechanical equipment is equipped on the military equipment. The improvement of the equipment informatization degree increases the design difficulty of the system, so that the state of the vehicle-mounted equipment needs to be monitored and diagnosed in an all-round way for improving the reliability of the system.
Meanwhile, the device is limited by the space in the vehicle, the equipment in the vehicle is generally monitored by adopting an integrated computing platform, and the size requirement of the device is very high, so that the invention is disclosed.
Disclosure of Invention
The technical task of the utility model is to solve the not enough of prior art, provide a general computing platform PCIe bus and CAN interface conversion equipment based on MXM structure.
The utility model provides a technical scheme that its technical problem adopted is:
the utility model provides a general purpose computing platform PCIe bus and CAN interface conversion equipment based on MXM structure, includes MXM golden finger, FPGA chip, CAN controller, CAN transceiver, the MXM golden finger includes PCIe standard interface, the FPGA chip passes through the PCIe signal line and links to each other with the MXM golden finger, and the FPGA chip is PCIe agreement and CAN decoding circuit, and the FPGA chip links to each other with the CAN controller in order, and the CAN controller is connected with the CAN transceiver in order.
Preferably, the MXM golden finger further comprises a power supply interface, a CAN signal line leading-out interface is reserved, the power supply interface is connected with the power conversion chip, the power supply range is 7-20V, the CAN signal line is led out through a wiring terminal and connected with the CAN transceiver, and the MXM golden finger is reserved for leading out.
Preferably, the FPGA adopts SPARTAN6 of XILINX company, PCIE bus data packet analysis and receiving and SPI controller driving logic are integrated inside the FPGA, and the SPI main control logic is used for controlling the receiving and transmitting time sequence control of the CAN controller.
Preferably, the CAN controller is an MCP2515 controller.
Preferably, the CAN transceiver is an ADM3503 integrated optical-electrical isolation module transceiver.
Preferably, the FPGA chip is connected with the FLASH chip, and the FLASH chip is internally provided with configuration data.
The utility model discloses a general computing platform PCIe bus compares produced beneficial effect with prior art with CAN interface conversion equipment based on MXM structure is:
according to the technical scheme, the PCIe circuit is matched with the FPGA chip of the programmable logic device, conversion between the PCIe bus based on the MXM structure and the CAN protocol is achieved, and the technical problem that conversion of the CAN bus protocol of the vehicle-mounted domestic integrated computer is difficult is solved.
Drawings
In order to more clearly describe the working principle of the PCIe bus and CAN interface conversion apparatus of the present invention based on the MXM structure, the following schematic diagram is attached for further description.
Fig. 1 is a schematic structural diagram of the present invention.
The reference numerals in the figures denote:
1. MXM golden finger, 2, FPGA chip, 3, FLASH chip, 4, CAN controller,
5. CAN transceiver, 6, binding post.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Please refer to fig. 1, the utility model discloses a general computing platform PCIe bus and CAN interface conversion equipment based on MXM structure, including MXM golden finger 1, FPGA chip 2, CAN controller 4, CAN transceiver 5, MXM golden finger 1 includes PCIe standard interface, FPGA chip 2 links to each other with MXM golden finger 1 through the PCIe signal line, FPGA chip 2 is PCIe agreement and CAN decoding circuit, FPGA chip 2 links to each other with CAN controller 4 in order, CAN controller 4 is connected in order with CAN transceiver 5.
The MXM golden finger 1 further comprises a power supply interface, a CAN signal line leading-out interface is reserved, the power supply interface is connected with the power supply conversion chip, the power supply range is 7-20V, the CAN signal line is led out through the wiring terminal 6 to be connected with the CAN transceiver 5, and the MXM golden finger 1 is reserved for leading out.
The FPGA adopts SPARTAN6 of XILINX company, PCIE bus data packet analysis and receiving and SPI controller driving logic are realized by internal integration, and the function of the SPI main control logic is to control the receiving and transmitting time sequence control of the CAN controller 4.
Wherein the CAN controller 4 is a MCP2515 controller.
Wherein the CAN transceiver 5 is an ADM3503 integrated optical-electrical isolation module transceiver.
The FPGA chip 2 is connected with the FLASH chip 3, and configuration data are arranged in the FLASH chip 3.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
In addition to the technical features described in the specification, the technology is known to those skilled in the art.
Claims (6)
1. The utility model provides a general purpose computing platform PCIe bus and CAN interface conversion equipment based on MXM structure, its characterized in that, includes MXM golden finger (1), FPGA chip (2), CAN controller (4), CAN transceiver (5), MXM golden finger (1) includes PCIe standard interface, FPGA chip (2) link to each other with MXM golden finger (1) through the PCIe signal line, and FPGA chip (2) are PCIe agreement and CAN decoding circuit, and FPGA chip (2) link to each other in order with CAN controller (4), and CAN controller (4) are connected in order with CAN transceiver (5).
2. The device for converting the PCIe bus and the CAN interface of the general computing platform based on the MXM structure is characterized in that the MXM golden finger (1) further comprises a power supply interface, a CAN signal line leading-out interface is reserved, the power supply interface is connected with a power conversion chip, and a CAN signal line is led out through a wiring terminal (6) to be connected with a CAN transceiver (5) and is reserved for leading out from the MXM golden finger (1).
3. The PCIe bus-to-CAN interface conversion device of the general computing platform based on the MXM structure as claimed in claim 1 or 2, wherein the FPGA adopts SPARTAN6 of XILINX corporation, PCIE bus data packet parsing and receiving and SPI controller driving logic are realized by internal integration, and the function of the SPI master control logic is to control the CAN controller (4) to receive and transmit sequence control.
4. The PCIe bus to CAN interface conversion device for a general purpose computing platform based on MXM structure according to claim 1 or 2, wherein the CAN controller (4) is a MCP2515 controller.
5. The PCIe bus to CAN interface conversion device based on MXM structure for general purpose computing platform is characterized in that the CAN transceiver (5) is ADM3503 integrated optical-electrical isolation module transceiver.
6. The PCIe interface conversion device for the general computing platform based on the MXM structure is characterized in that the FPGA chip (2) is connected with the FLASH chip (3).
Priority Applications (1)
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CN202020305890.8U CN210955062U (en) | 2020-03-12 | 2020-03-12 | General computing platform PCIe bus and CAN interface conversion device based on MXM structure |
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CN202020305890.8U CN210955062U (en) | 2020-03-12 | 2020-03-12 | General computing platform PCIe bus and CAN interface conversion device based on MXM structure |
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