CN210852469U - Data forwarding equipment of railway steel rail broken rail monitoring system - Google Patents

Data forwarding equipment of railway steel rail broken rail monitoring system Download PDF

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CN210852469U
CN210852469U CN201920434774.3U CN201920434774U CN210852469U CN 210852469 U CN210852469 U CN 210852469U CN 201920434774 U CN201920434774 U CN 201920434774U CN 210852469 U CN210852469 U CN 210852469U
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赵建明
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Abstract

The utility model discloses a railway steel rail broken rail monitoring system's data forwarding equipment, data forwarding equipment includes: the device comprises a control circuit, an indicator light circuit, a data storage circuit, a power supply circuit and a communication module; the control circuit is respectively connected with the indicator light circuit, the data storage circuit and the communication module; the power supply circuit is respectively connected with the control circuit, the indicator light circuit, the data storage circuit and the communication module and provides electric energy required by work for the indicator light circuit, the data storage circuit and the communication module; the indicating lamp circuit comprises a first green lamp for indicating the work of the power supply, a first red lamp for indicating the data sending, a second green lamp for indicating the data receiving, a second red lamp for indicating the error state and a plurality of triodes for driving the work of each indicating lamp. The utility model provides a broken rail monitoring system's of railway track data transfer equipment can show all kinds of self operating condition's information, when unusual appearing, is in time discover by the staff easily.

Description

Data forwarding equipment of railway steel rail broken rail monitoring system
Technical Field
The utility model belongs to the technical field of monitoring system, a disconnected rail monitoring system is related to, especially relate to a railway rail broken rail monitoring system's data forwarding equipment.
Background
With the rapid development of railway industry and the improvement of train speed in China, higher requirements are put forward on the safety and efficiency of railway transportation. Therefore, it is an important subject to perform real-time rail breakage detection on the steel rail on the railway operation line, and to ensure that the principle of "failure-safety" can be satisfied when rail breakage occurs. In the existing automatic block section of high-speed railway and ordinary-speed railway, railway signal equipment is completely provided with a track circuit, and the rail break inspection of the steel rail is realized. However, the semi-automatic block section is only provided with an approach track circuit 1200-1400 meters outside the station signal, and the whole section from the power receiving end of the approach track circuit of the station to the power receiving end of the approach track circuit of the adjacent station is not provided with the track circuit, so that the rail breakage cannot be detected, and the detection can be completely realized by the inspection of personnel.
Proposals related to rail break monitoring of railway rails are continuously proposed in recent years, for example, Chinese patent CN201710883589.8 discloses a rail break monitoring system of railway rails; the rail breakage monitoring system comprises at least two transceivers and a server, wherein part or all of the transceivers are used as management modules; dividing a steel rail to be monitored into at least one steel rail monitoring interval; at least two transceivers are distributed in each steel rail monitoring interval; each transceiver is divided into at least one group, each group comprises at least two transceivers, each group of transceivers uses the steel rail as a lead to carry out relay carrier communication until the management module receives the set data, and the management module sends the data to the server. The rail break monitoring system for the railway rail can monitor rail break in real time and ensure the safety of railway traffic.
When the existing monitoring terminal sends data, the working state of the existing monitoring terminal cannot be displayed generally, and the outside cannot know the condition that the monitoring terminal sends the data. If the monitoring terminal fails to send data, the staff cannot acquire corresponding information through the monitoring terminal, so that the monitoring data is easily lost, which has great hidden danger in the field of railway transportation.
In view of the above, there is an urgent need to design a new data transmission device to overcome the above-mentioned drawbacks of the existing data transmission devices.
SUMMERY OF THE UTILITY MODEL
The utility model provides a railway steel rail broken rail monitoring system's data transfer equipment can show all kinds of self operating condition's information, when unusual appearing, is in time discover by the staff easily.
For solving the technical problem, according to the utility model discloses an aspect adopts following technical scheme:
a data transfer device for a railway rail break monitoring system, the data transfer device comprising: the device comprises a control circuit, an indicator light circuit, a data storage circuit, a power supply circuit and a communication module;
the control circuit is respectively connected with the indicator light circuit, the data storage circuit and the communication module; the power supply circuit is respectively connected with the control circuit, the indicator light circuit, the data storage circuit and the communication module and provides electric energy required by work for the indicator light circuit, the data storage circuit and the communication module;
the indicating lamp circuit comprises a first green lamp for indicating the work of a power supply, a first red lamp for indicating data sending, a second green lamp for indicating data receiving, a second red lamp for indicating an error state and a plurality of triodes for driving the work of each indicating lamp; the first green light is a third diode D3, the first red light is a fourth diode D4, the second green light is a fifth diode D5, and the second red light is a sixth diode D6; the indicating lamp circuit comprises a fourth triode Q4, a fifth triode Q5, a sixth triode Q6, a first nine resistor R19, a second zero resistor R20, a second first resistor R21, a second resistor R22, a second third resistor R23, a second seven resistor R27 and a second eight resistor R28;
the first end of the second resistor R22, the first end of the second third resistor R23, the first end of the second seventh resistor R27 and the first end of the second eighth resistor R28 are respectively connected with a power supply voltage; a second end of the second seventh resistor R27 is connected to the anode of the third diode D3, and the cathode of the third diode D3 is grounded; a second end of the second resistor R22 is connected to the anode of the fourth diode D4, the cathode of the fourth diode D4 is connected to the collector of the fourth transistor Q4, and the base of the fourth transistor Q4 is connected to the first end of the first ninth resistor R19; a second end of the second eighth resistor R28 is connected to the anode of the fifth diode D5, the cathode of the fifth diode D5 is connected to the collector of the fifth triode Q5, and the base of the fifth triode Q5 is connected to the first end of the second zero resistor R20; a second end of the second third resistor R23 is connected to the anode of the sixth diode D6, the cathode of the sixth diode D6 is connected to the collector of the sixth triode Q6, and the base of the sixth triode Q6 is connected to the first end of the second first resistor R21; an emitter of the fourth triode Q4, an emitter of the fifth triode Q5 and an emitter of the sixth triode Q6 are respectively grounded;
the data storage circuit comprises a fourth chip U4, a second fourth resistor R24, a second fifth resistor R25 and a second sixth resistor R26; the 3.3V power supply voltage is respectively connected with a VVC pin of a fourth chip U4, a first end of a second fourth resistor R24, a first end of a second fifth resistor R25 and a first end of a second sixth resistor R26; the WP pin of the fourth chip U4 is a write protection pin, and the SCL pin and the SDA pin of the fourth chip U4 are I2C bus pins for data interaction; the WP pin of the fourth chip U4 is connected with the second end of the second fourth resistor R24, the SCL pin of the fourth chip U4 is connected with the second end of the second fifth resistor R25, and the SDA pin of the fourth chip U4 is connected with the second end of the second sixth resistor R26; the A0 pin, the A1 pin, the NC pin and the GND pin of the fourth chip U4 are grounded respectively;
the power supply circuit comprises a power supply module circuit, a switching power supply circuit and a three-terminal voltage stabilizing circuit; the switching power supply circuit converts 220V alternating current into 12V direct current, the power supply module circuit converts the 12V direct current into 5V direct current, and the three-terminal voltage stabilizing circuit converts the 5V direct current into 3.3V direct current;
the power module circuit comprises a first chip U1, a first inductor L1, a first diode D1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first fourth capacitor C14, a first fifth capacitor C15, a first sixth capacitor C16, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4; the 12V power supply voltage is respectively connected with an IN pin of the first chip U1, a first end of the first resistor R1 and a first end of the first capacitor C1; a second end of the first resistor R1 senses the EN pin of the first chip U1, and a second end of the first capacitor C1 is grounded; an SS pin of the first chip U1 is connected with a first end of a second capacitor C2, and a second end of the second capacitor C2 is grounded; the GND pin of the first chip U1 is grounded; a COMP pin of the first chip U1 is connected with a first end of a first four-capacitor C14, a second end of the first four-capacitor C14 is connected with a second end of a second resistor R2, and a first end of the second resistor R2 is grounded; a BS pin of the first chip U1 is connected with a first end of a first five capacitor C15, and a second end of the first five capacitor C15 is respectively connected with a SW pin of the first chip U1, a negative electrode of a first diode D1 and a first end of a first inductor L1; the anode of the first diode D1 is grounded, the second end of the first inductor L1 is connected to a 5V power supply voltage, the second end of the fourth resistor R4, the first end of the first sixth capacitor C16 and the first end of the third capacitor C3, and the second end of the first sixth capacitor C16 and the second end of the third capacitor C3 are grounded, respectively; the FB pin of the first chip U1 is respectively connected with the first end of the third resistor R3 and the first end of the fourth resistor R4, and the second end of the third resistor R3 is grounded;
the switching power supply circuit comprises a third chip U3, a second inductor L2, a third inductor L3, a fifth resistor R5, a sixth resistor R6 and a first interface P1; the + V1 pin of the third chip U3 is connected with 12V power voltage, and the-V1 pin of the third chip U3 is grounded; an FG pin of the third chip U3 is connected with a first port of the first interface P1, an N pin of the third chip U3 is connected with a second end of a second inductor L2, and a first end of the second inductor L2 is respectively connected with a second port of the first interface P1 and a second end of a sixth resistor R6; an L pin of the third chip U3 is connected to a second end of the third inductor L3, a first end of the third inductor L3 is connected to a second end of the fifth resistor R5 and a first end of the sixth resistor R6, respectively, and a first end of the fifth resistor R5 is connected to a third port of the first interface P1;
the three-terminal voltage stabilizing circuit comprises a second chip U2, a fourth capacitor C4 and a first eight capacitor C18; the IN pin of the second chip U2 is connected with a 5V power supply voltage, and the OUT pin of the second chip U2 is respectively connected with a 3.3V power supply voltage, a first end of a fourth capacitor C4 and a first end of a first eight capacitor C18; the GND pin of the second chip U2, the second terminal of the fourth capacitor C4, and the second terminal of the first eighth capacitor C18 are grounded, respectively.
As an embodiment of the present invention, the communication module includes a 485 communication circuit and an RS232 interface circuit.
As an embodiment of the present invention, the 485 communication circuit includes a MAX485 chip, a first four-way TVS tube D14, a first five-way TVS tube D15, a first six-way TVS tube D16, a third five capacitor C35, an eighth second resistor R82, an eighth fourth resistor R84, an eighth fifth resistor R85, an eighth sixth resistor R86, and a ninth first resistor R91; the 485 communication circuit converts a chip TTL signal into a 485 signal through an MAX485 chip; the eighth fourth resistor R84 and the eighth fifth resistor R85 are jumper resistors; the first four-way TVS transistor D14, the first five-way TVS transistor D15, and the first six-way TVS transistor D16 are bidirectional TVS transistors for circuit protection;
a first pin of the MAX485 chip is connected with a second end of an eighth fifth resistor R85; a second pin of the MAX485 chip is respectively connected with a third pin of the MAX485 chip, a second end of an eighth second resistor R82 and a second end of an eighth sixth resistor R86, and a first end of the eighth sixth resistor R86 is connected with a 5V power supply voltage; a fourth pin of the MAX485 chip is connected with a second end of the eighth fourth resistor R84; a fifth pin of the MAX485 chip is grounded; a sixth pin of the MAX485 chip is connected to the first end of the first four-way TVS tube D14, the first end of the first five-way TVS tube D15, and the first end of the ninth resistor R91, respectively; a seventh pin of the MAX485 chip is connected to the second end of the first four-way TVS transistor D14, the second end of the first six-way TVS transistor D16, and the second end of the ninth resistor R91, respectively; the second end of the fifth bidirectional TVS tube D15 and the first end of the sixth bidirectional TVS tube D16 are grounded, respectively; the eighth pin of the MAX485 chip is respectively connected with a 5V power supply voltage and the first end of a third fifth capacitor C35, and the second end of the third fifth capacitor C35 is grounded.
As an embodiment of the present invention, the RS232 interface circuit includes a fifth chip U5, a plurality of capacitors, and a ninth bus DB 9; the RS232 interface circuit is an interface for data interaction with a PC, and the model of the fifth chip U5 is MAX 323; the MAX323 chip converts the TTL signal into a 232 signal for the PC to identify; and the ninth female DB9 is connected with a 232 serial port line and performs data interaction with a PC.
As an embodiment of the present invention, the control circuit includes a sixth chip U6 and related peripheral circuits; the model of the sixth chip U6 is PIC24HJ128GP 504.
As an embodiment of the present invention, the first chip U1 is MP 1482.
As an embodiment of the present invention, the model of the second chip U2 is CJT 1117B-3.3.
As an embodiment of the present invention, the fourth chip U4 is a chip operating with an I2C bus interface, and the chip model is 24WC 256.
As an embodiment of the present invention, the sixth resistor is a varistor with a model of 20D471, and the sixth resistor R6 and the fifth resistor R5 play a role in circuit protection.
The beneficial effects of the utility model reside in that: the utility model provides a broken rail monitoring system's of railway track data transfer equipment can show all kinds of self operating condition's information, when unusual appearing, is in time discover by the staff easily.
Drawings
Fig. 1 is a schematic diagram of a data forwarding device according to an embodiment of the present invention.
Fig. 2 is a schematic circuit diagram of a power circuit in a data forwarding device according to an embodiment of the present invention.
Fig. 3 is a schematic circuit diagram of a control circuit in the data forwarding device according to an embodiment of the present invention.
Fig. 4 is a schematic circuit diagram of an indicator light circuit in a data forwarding device according to an embodiment of the present invention.
Fig. 5 is a schematic circuit diagram of a data storage circuit in a data forwarding device according to an embodiment of the present invention.
Fig. 6 is a schematic circuit diagram of a 485 communication circuit in the data forwarding device according to an embodiment of the present invention.
Fig. 7 is a schematic circuit diagram of an RS232 interface circuit in the data forwarding device according to an embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
For further understanding of the present invention, preferred embodiments of the present invention will be described below with reference to examples, but it should be understood that these descriptions are only for the purpose of further illustrating the features and advantages of the present invention, and are not intended to limit the claims of the present invention.
The description in this section is for exemplary embodiments only, and the present invention is not limited to the scope of the embodiments described. The same or similar prior art means and some technical features of the embodiments are mutually replaced and are also within the scope of the description and the protection of the invention.
The utility model discloses a data forwarding device of a railway steel rail broken rail monitoring system, and a figure 1 is a schematic composition diagram of the data forwarding device in an embodiment of the utility model; referring to fig. 1, in an embodiment of the present invention, the data forwarding apparatus includes: the device comprises a control circuit, an indicator light circuit, a data storage circuit, a power supply circuit and a communication module; in an embodiment of the present invention, the communication module includes a 485 communication circuit and an RS232 interface circuit.
The control circuit is respectively connected with the indicator lamp circuit, the data storage circuit, the 485 communication circuit and the RS232 interface circuit; the power supply circuit is respectively connected with the control circuit, the indicator light circuit, the data storage circuit, the 485 communication circuit and the RS232 interface circuit, and provides electric energy required by work for the indicator light circuit, the data storage circuit, the 485 communication circuit and the RS232 interface circuit.
Fig. 2 is a schematic circuit diagram of a power circuit in a data forwarding device according to an embodiment of the present invention; referring to fig. 2, in an embodiment of the present invention, the power circuit includes a power module circuit, a switching power circuit, and a three-terminal voltage regulator circuit; the switching power supply circuit converts 220V alternating current into 12V direct current, the power supply module circuit converts the 12V direct current into 5V direct current, and the three-terminal voltage stabilizing circuit converts the 5V direct current into 3.3V direct current.
The power module circuit comprises a first chip U1, a first inductor L1, a first diode D1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first fourth capacitor C14, a first fifth capacitor C15, a first sixth capacitor C16, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4; the model of the first chip U1 is MP 1482; the 12V power supply voltage is respectively connected with an IN pin of the first chip U1, a first end of the first resistor R1 and a first end of the first capacitor C1; a second end of the first resistor R1 senses the EN pin of the first chip U1, and a second end of the first capacitor C1 is grounded; an SS pin of the first chip U1 is connected with a first end of a second capacitor C2, and a second end of the second capacitor C2 is grounded; the GND pin of the first chip U1 is grounded; a COMP pin of the first chip U1 is connected with a first end of a first four-capacitor C14, a second end of the first four-capacitor C14 is connected with a second end of a second resistor R2, and a first end of the second resistor R2 is grounded; a BS pin of the first chip U1 is connected with a first end of a first five capacitor C15, and a second end of the first five capacitor C15 is respectively connected with a SW pin of the first chip U1, a negative electrode of a first diode D1 and a first end of a first inductor L1; the anode of the first diode D1 is grounded, the second end of the first inductor L1 is connected to a 5V power supply voltage, the second end of the fourth resistor R4, the first end of the first sixth capacitor C16 and the first end of the third capacitor C3, and the second end of the first sixth capacitor C16 and the second end of the third capacitor C3 are grounded, respectively; the FB pin of the first chip U1 is connected to the first end of the third resistor R3 and the first end of the fourth resistor R4, respectively, and the second end of the third resistor R3 is grounded.
The switching power supply circuit comprises a third chip U3, a second inductor L2, a third inductor L3, a fifth resistor R5, a sixth resistor R6 and a first interface P1; the + V1 pin of the third chip U3 is connected with 12V power voltage, and the-V1 pin of the third chip U3 is grounded; an FG pin of the third chip U3 is connected with a first port of the first interface P1, an N pin of the third chip U3 is connected with a second end of a second inductor L2, and a first end of the second inductor L2 is respectively connected with a second port of the first interface P1 and a second end of a sixth resistor R6; an L pin of the third chip U3 is connected to a second end of the third inductor L3, a first end of the third inductor L3 is connected to a second end of the fifth resistor R5 and a first end of the sixth resistor R6, respectively, and a first end of the fifth resistor R5 is connected to a third port of the first interface P1; the sixth resistor is a piezoresistor with the model number of 20D471, and the sixth resistor R6 and the fifth resistor R5 play a circuit protection role.
The three-terminal voltage stabilizing circuit comprises a second chip U2, a fourth capacitor C4 and a first eight capacitor C18; the model of the second chip U2 is CJT 1117B-3.3; the IN pin of the second chip U2 is connected with a 5V power supply voltage, and the OUT pin of the second chip U2 is respectively connected with a 3.3V power supply voltage, a first end of a fourth capacitor C4 and a first end of a first eight capacitor C18; the GND pin of the second chip U2, the second terminal of the fourth capacitor C4, and the second terminal of the first eighth capacitor C18 are grounded, respectively.
Fig. 3 is a schematic circuit diagram of a control circuit in a data forwarding device according to an embodiment of the present invention; referring to fig. 3, in an embodiment of the present invention, the control circuit includes a sixth chip U6 and related peripheral circuits; the model of the sixth chip U6 is PIC24HJ128GP 504.
Fig. 4 is a schematic circuit diagram of an indicator light circuit in a data forwarding device according to an embodiment of the present invention; referring to fig. 4, in an embodiment of the present invention, the indicator light circuit includes a first green light for indicating the power supply to work, a first red light for indicating the data transmission, a second green light for indicating the data reception, a second red light for indicating the error state, and a plurality of triodes for driving the indicator lights to work; the first green light is a third diode D3, the first red light is a fourth diode D4, the second green light is a fifth diode D5, and the second red light is a sixth diode D6; the indicating lamp circuit comprises a fourth triode Q4, a fifth triode Q5, a sixth triode Q6, a first nine resistor R19, a second zero resistor R20, a second first resistor R21, a second resistor R22, a second third resistor R23, a second seven resistor R27 and a second eight resistor R28.
The first end of the second resistor R22, the first end of the second third resistor R23, the first end of the second seventh resistor R27 and the first end of the second eighth resistor R28 are respectively connected with a power supply voltage; a second end of the second seventh resistor R27 is connected to the anode of the third diode D3, and the cathode of the third diode D3 is grounded; a second end of the second resistor R22 is connected to the anode of the fourth diode D4, the cathode of the fourth diode D4 is connected to the collector of the fourth transistor Q4, and the base of the fourth transistor Q4 is connected to the first end of the first ninth resistor R19; a second end of the second eighth resistor R28 is connected to the anode of the fifth diode D5, the cathode of the fifth diode D5 is connected to the collector of the fifth triode Q5, and the base of the fifth triode Q5 is connected to the first end of the second zero resistor R20; a second end of the second third resistor R23 is connected to the anode of the sixth diode D6, the cathode of the sixth diode D6 is connected to the collector of the sixth triode Q6, and the base of the sixth triode Q6 is connected to the first end of the second first resistor R21; the emitter of the fourth triode Q4, the emitter of the fifth triode Q5 and the emitter of the sixth triode Q6 are respectively grounded.
Fig. 5 is a schematic circuit diagram of a data storage circuit in a data forwarding device according to an embodiment of the present invention; referring to fig. 5, in an embodiment of the present invention, the data storage circuit includes a fourth chip U4, a second fourth resistor R24, a second fifth resistor R25 and a second sixth resistor R26; the fourth chip U4 is a chip working with an I2C bus interface, and the model of the chip is 24WC 256; the 3.3V power supply voltage is respectively connected with a VVC pin of a fourth chip U4, a first end of a second fourth resistor R24, a first end of a second fifth resistor R25 and a first end of a second sixth resistor R26; the WP pin of the fourth chip U4 is a write protection pin, and the SCL pin and the SDA pin of the fourth chip U4 are I2C bus pins for data interaction; the WP pin of the fourth chip U4 is connected with the second end of the second fourth resistor R24, the SCL pin of the fourth chip U4 is connected with the second end of the second fifth resistor R25, and the SDA pin of the fourth chip U4 is connected with the second end of the second sixth resistor R26; the a0 pin, a1 pin, NC pin, and GND pin of the fourth chip U4 are grounded, respectively.
Fig. 6 is a schematic circuit diagram of a 485 communication circuit in the data forwarding device according to an embodiment of the present invention; referring to fig. 6, in an embodiment of the present invention, the 485 communication circuit includes a MAX485 chip, a first four-way TVS transistor D14, a first five-way TVS transistor D15, a first six-way TVS transistor D16, a third five capacitor C35, an eighth second resistor R82, an eighth fourth resistor R84, an eighth fifth resistor R85, an eighth sixth resistor R86, and a ninth first resistor R91; the 485 communication circuit converts a chip TTL signal into a 485 signal through an MAX485 chip; the eighth fourth resistor R84 and the eighth fifth resistor R85 are jumper resistors; the first four-way TVS transistor D14, the first five-way TVS transistor D15, and the first six-way TVS transistor D16 are bidirectional TVS transistors and used for circuit protection.
A first pin of the MAX485 chip is connected with a second end of an eighth fifth resistor R85; a second pin of the MAX485 chip is respectively connected with a third pin of the MAX485 chip, a second end of an eighth second resistor R82 and a second end of an eighth sixth resistor R86, and a first end of the eighth sixth resistor R86 is connected with a 5V power supply voltage; a fourth pin of the MAX485 chip is connected with a second end of the eighth fourth resistor R84; a fifth pin of the MAX485 chip is grounded; a sixth pin of the MAX485 chip is connected to the first end of the first four-way TVS tube D14, the first end of the first five-way TVS tube D15, and the first end of the ninth resistor R91, respectively; a seventh pin of the MAX485 chip is connected to the second end of the first four-way TVS transistor D14, the second end of the first six-way TVS transistor D16, and the second end of the ninth resistor R91, respectively; the second end of the fifth bidirectional TVS tube D15 and the first end of the sixth bidirectional TVS tube D16 are grounded, respectively; the eighth pin of the MAX485 chip is respectively connected with a 5V power supply voltage and the first end of a third fifth capacitor C35, and the second end of the third fifth capacitor C35 is grounded.
Fig. 7 is a schematic circuit diagram of an RS232 interface circuit in the data forwarding device according to an embodiment of the present invention; referring to fig. 7, in an embodiment of the present invention, the RS232 interface circuit includes a fifth chip U5, a plurality of capacitors, and a ninth header DB 9; the RS232 interface circuit is an interface for data interaction with a PC, and the model of the fifth chip U5 is MAX 323; the MAX323 chip converts the TTL signal into a 232 signal for the PC to identify; and the ninth female DB9 is connected with a 232 serial port line and performs data interaction with a PC.
In an embodiment of the present invention, the utility model discloses data forwarding device's theory of operation includes:
the CPU circuit (control circuit) is composed of a programming interface, a PIC chip PIC24HJ128GP504 chip and related peripheral circuits, and the PIC24 series single chip microcomputer is provided with 2 Uart and I2C and other peripheral devices.
The indicating lamp circuit consists of a green lamp for indicating the work of the power supply, a red lamp for indicating the sending of data, a green lamp for indicating the receiving of data, a red lamp for indicating the error state and triodes for driving the work of each indication; the pins control the triode to realize the on-off of the lamp; the power indicator lamp is turned on when electricity is available and turned off when no electricity is available.
The data storage circuit consists of a chip 24WC256 and a driving circuit, wherein the chip 24WC256 works with an I2C bus interface; the circuit supplies power to a chip at 3.3V, WP is a write protection pin, a pull-up resistor, SCL SDA is an I2C bus pin for data interaction, and a 10K resistor needs to be pulled up. The A0A1A2 address line and the GND pin are grounded, and the 24WC256 address is 0 in the mode; the data storage device is used for storing data, and the data is not lost when power is lost.
A power supply circuit: the power supply consists of an AC interface terminal, an inductance voltage dependent resistor, a switching power supply LH10-13B12 module MP1482 power supply module circuit and a three-terminal voltage stabilizing CJT1117B-3.3 circuit; the LH10-13B12 power supply module converts 220V into 12V direct current, the MP1482 power supply circuit converts the direct current DC12V into 5VDC, and then the 5V is converted into 3.3V power supply through the three-terminal voltage stabilizing circuit. Three power supplies of 12V 5V 3.3V are used. The piezoresistors 20D471 and the 5.1R/6W resistor play a circuit protection role.
A 485 circuit: converting the TTL signal of the chip into a 485 signal through an MAX485 chip; R85R84 is a jumper resistor, and when 485 is needed, the resistor is attached, and when the resistor is not suitable, the resistor is not needed; the AB line is connected with a matching resistor R91 in parallel; D14D15D16 is a bidirectional TVS tube used for circuit protection.
RS232 interface circuit: the interface is used for data interaction with a PC and consists of a MAX323 chip and a peripheral circuit which are powered by 3.3V and a DB9 female head; the MAX323 chip is similar to the 485 chip and converts the TTL signal into a 232 signal for the PC to identify; the DB9 female connector is connected with a common 232 serial port line to perform data interaction with a PC.
To sum up, the utility model provides a broken rail monitoring system's of railway track data transfer equipment can show all kinds of self operating condition's information, when unusual appearing, is in time discover by the staff easily.
The description and applications of the present invention are illustrative and are not intended to limit the scope of the invention to the embodiments described above. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the present invention.

Claims (9)

1. A data forwarding device of a railway steel rail broken rail monitoring system is characterized by comprising: the device comprises a control circuit, an indicator light circuit, a data storage circuit, a power supply circuit and a communication module;
the control circuit is respectively connected with the indicator light circuit, the data storage circuit and the communication module; the power supply circuit is respectively connected with the control circuit, the indicator light circuit, the data storage circuit and the communication module and provides electric energy required by work for the indicator light circuit, the data storage circuit and the communication module;
the indicating lamp circuit comprises a first green lamp for indicating the work of a power supply, a first red lamp for indicating data sending, a second green lamp for indicating data receiving, a second red lamp for indicating an error state and a plurality of triodes for driving the work of each indicating lamp; the first green light is a third diode D3, the first red light is a fourth diode D4, the second green light is a fifth diode D5, and the second red light is a sixth diode D6; the indicating lamp circuit comprises a fourth triode Q4, a fifth triode Q5, a sixth triode Q6, a first nine resistor R19, a second zero resistor R20, a second first resistor R21, a second resistor R22, a second third resistor R23, a second seven resistor R27 and a second eight resistor R28;
the first end of the second resistor R22, the first end of the second third resistor R23, the first end of the second seventh resistor R27 and the first end of the second eighth resistor R28 are respectively connected with a power supply voltage; a second end of the second seventh resistor R27 is connected to the anode of the third diode D3, and the cathode of the third diode D3 is grounded; a second end of the second resistor R22 is connected to the anode of the fourth diode D4, the cathode of the fourth diode D4 is connected to the collector of the fourth transistor Q4, and the base of the fourth transistor Q4 is connected to the first end of the first ninth resistor R19; a second end of the second eighth resistor R28 is connected to the anode of the fifth diode D5, the cathode of the fifth diode D5 is connected to the collector of the fifth triode Q5, and the base of the fifth triode Q5 is connected to the first end of the second zero resistor R20; a second end of the second third resistor R23 is connected to the anode of the sixth diode D6, the cathode of the sixth diode D6 is connected to the collector of the sixth triode Q6, and the base of the sixth triode Q6 is connected to the first end of the second first resistor R21; an emitter of the fourth triode Q4, an emitter of the fifth triode Q5 and an emitter of the sixth triode Q6 are respectively grounded;
the data storage circuit comprises a fourth chip U4, a second fourth resistor R24, a second fifth resistor R25 and a second sixth resistor R26; the 3.3V power supply voltage is respectively connected with a VVC pin of a fourth chip U4, a first end of a second fourth resistor R24, a first end of a second fifth resistor R25 and a first end of a second sixth resistor R26; the WP pin of the fourth chip U4 is a write protection pin, and the SCL pin and the SDA pin of the fourth chip U4 are I2C bus pins for data interaction; the WP pin of the fourth chip U4 is connected with the second end of the second fourth resistor R24, the SCL pin of the fourth chip U4 is connected with the second end of the second fifth resistor R25, and the SDA pin of the fourth chip U4 is connected with the second end of the second sixth resistor R26; the A0 pin, the A1 pin, the NC pin and the GND pin of the fourth chip U4 are grounded respectively;
the power supply circuit comprises a power supply module circuit, a switching power supply circuit and a three-terminal voltage stabilizing circuit; the switching power supply circuit converts 220V alternating current into 12V direct current, the power supply module circuit converts the 12V direct current into 5V direct current, and the three-terminal voltage stabilizing circuit converts the 5V direct current into 3.3V direct current;
the power module circuit comprises a first chip U1, a first inductor L1, a first diode D1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first fourth capacitor C14, a first fifth capacitor C15, a first sixth capacitor C16, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4; the 12V power supply voltage is respectively connected with an IN pin of the first chip U1, a first end of the first resistor R1 and a first end of the first capacitor C1; a second end of the first resistor R1 senses the EN pin of the first chip U1, and a second end of the first capacitor C1 is grounded; an SS pin of the first chip U1 is connected with a first end of a second capacitor C2, and a second end of the second capacitor C2 is grounded; the GND pin of the first chip U1 is grounded; a COMP pin of the first chip U1 is connected with a first end of a first four-capacitor C14, a second end of the first four-capacitor C14 is connected with a second end of a second resistor R2, and a first end of the second resistor R2 is grounded; a BS pin of the first chip U1 is connected with a first end of a first five capacitor C15, and a second end of the first five capacitor C15 is respectively connected with a SW pin of the first chip U1, a negative electrode of a first diode D1 and a first end of a first inductor L1; the anode of the first diode D1 is grounded, the second end of the first inductor L1 is connected to a 5V power supply voltage, the second end of the fourth resistor R4, the first end of the first sixth capacitor C16 and the first end of the third capacitor C3, and the second end of the first sixth capacitor C16 and the second end of the third capacitor C3 are grounded, respectively; the FB pin of the first chip U1 is respectively connected with the first end of the third resistor R3 and the first end of the fourth resistor R4, and the second end of the third resistor R3 is grounded;
the switching power supply circuit comprises a third chip U3, a second inductor L2, a third inductor L3, a fifth resistor R5, a sixth resistor R6 and a first interface P1; the + V1 pin of the third chip U3 is connected with 12V power voltage, and the-V1 pin of the third chip U3 is grounded; an FG pin of the third chip U3 is connected with a first port of the first interface P1, an N pin of the third chip U3 is connected with a second end of a second inductor L2, and a first end of the second inductor L2 is respectively connected with a second port of the first interface P1 and a second end of a sixth resistor R6; an L pin of the third chip U3 is connected to a second end of the third inductor L3, a first end of the third inductor L3 is connected to a second end of the fifth resistor R5 and a first end of the sixth resistor R6, respectively, and a first end of the fifth resistor R5 is connected to a third port of the first interface P1;
the three-terminal voltage stabilizing circuit comprises a second chip U2, a fourth capacitor C4 and a first eight capacitor C18; the IN pin of the second chip U2 is connected with a 5V power supply voltage, and the OUT pin of the second chip U2 is respectively connected with a 3.3V power supply voltage, a first end of a fourth capacitor C4 and a first end of a first eight capacitor C18; the GND pin of the second chip U2, the second terminal of the fourth capacitor C4, and the second terminal of the first eighth capacitor C18 are grounded, respectively.
2. The apparatus of claim 1, wherein the data transfer device comprises:
the communication module comprises a 485 communication circuit and an RS232 interface circuit.
3. The apparatus of claim 2, wherein the data transfer device comprises:
the 485 communication circuit comprises a MAX485 chip, a first four-way TVS tube D14, a first five-way TVS tube D15, a first six-way TVS tube D16, a third five capacitor C35, an eighth second resistor R82, an eighth fourth resistor R84, an eighth five resistor R85, an eighth six resistor R86 and a ninth first resistor R91; the 485 communication circuit converts a chip TTL signal into a 485 signal through an MAX485 chip; the eighth fourth resistor R84 and the eighth fifth resistor R85 are jumper resistors; the first four-way TVS transistor D14, the first five-way TVS transistor D15, and the first six-way TVS transistor D16 are bidirectional TVS transistors for circuit protection;
a first pin of the MAX485 chip is connected with a second end of an eighth fifth resistor R85; a second pin of the MAX485 chip is respectively connected with a third pin of the MAX485 chip, a second end of an eighth second resistor R82 and a second end of an eighth sixth resistor R86, and a first end of the eighth sixth resistor R86 is connected with a 5V power supply voltage; a fourth pin of the MAX485 chip is connected with a second end of the eighth fourth resistor R84; a fifth pin of the MAX485 chip is grounded; a sixth pin of the MAX485 chip is connected to the first end of the first four-way TVS tube D14, the first end of the first five-way TVS tube D15, and the first end of the ninth resistor R91, respectively; a seventh pin of the MAX485 chip is connected to the second end of the first four-way TVS transistor D14, the second end of the first six-way TVS transistor D16, and the second end of the ninth resistor R91, respectively; the second end of the fifth bidirectional TVS tube D15 and the first end of the sixth bidirectional TVS tube D16 are grounded, respectively; the eighth pin of the MAX485 chip is respectively connected with a 5V power supply voltage and the first end of a third fifth capacitor C35, and the second end of the third fifth capacitor C35 is grounded.
4. The apparatus of claim 2, wherein the data transfer device comprises:
the RS232 interface circuit comprises a fifth chip U5, a plurality of capacitors and a ninth female head DB 9; the RS232 interface circuit is an interface for data interaction with a PC, and the model of the fifth chip U5 is MAX 323; the MAX323 chip converts the TTL signal into a 232 signal for the PC to identify; and the ninth female DB9 is connected with a 232 serial port line and performs data interaction with a PC.
5. The apparatus of claim 1, wherein the data transfer device comprises:
the control circuit comprises a sixth chip U6 and related peripheral circuits; the model of the sixth chip U6 is PIC24HJ128GP 504.
6. The apparatus of claim 1, wherein the data transfer device comprises:
the model of the first chip U1 is MP 1482.
7. The apparatus of claim 1, wherein the data transfer device comprises:
the model of the second chip U2 is CJT 1117B-3.3.
8. The apparatus of claim 1, wherein the data transfer device comprises:
the fourth chip U4 is a chip operating with an I2C bus interface, and the model of the chip is 24WC 256.
9. The apparatus of claim 1, wherein the data transfer device comprises:
the sixth resistor is a piezoresistor with the model number of 20D471, and the sixth resistor R6 and the fifth resistor R5 play a circuit protection role.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11539177B2 (en) * 2018-06-15 2022-12-27 Siemens Mobility, Inc. Vital relay assembly for modular solid-state current-limiting

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11539177B2 (en) * 2018-06-15 2022-12-27 Siemens Mobility, Inc. Vital relay assembly for modular solid-state current-limiting

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