CN210839384U - Rectifying circuit utilizing saturable mutual inductor - Google Patents
Rectifying circuit utilizing saturable mutual inductor Download PDFInfo
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- CN210839384U CN210839384U CN201921911239.9U CN201921911239U CN210839384U CN 210839384 U CN210839384 U CN 210839384U CN 201921911239 U CN201921911239 U CN 201921911239U CN 210839384 U CN210839384 U CN 210839384U
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Abstract
A rectifying circuit using a saturable transformer comprises a bridge type rectifying circuit, a saturable transformer circuit and an LC filter circuit which are sequentially connected from an input end to an output end. The components of the saturable transformer circuit include a first triode Q and a first inductor LSThe transformer B, MOS-FET Q1, the second triode Q2, the first capacitor C1, the second capacitor C2, the third capacitor C3, the fifth diodeD5, a sixth diode D6, a seventh diode D7, an eighth diode D8; by improving the common rectification circuit in the UPS, the output condition of the current transformer can be effectively controlled due to the constraint relation of the MOS-FET, so that the switch control speed is high, the output current is high, the system response sensitivity is higher, and the output waveform is more stable. The circuit can be used as a rectifier of two-port equipment, can also be applied to a plurality of rectification circuits, provides convenience for the rectification device in the UPS, and has positive guiding significance in engineering practice.
Description
Technical Field
The utility model relates to a rectifier technical field, in particular to utilize rectifier circuit of saturable mutual-inductor.
Background
With the development of UPS technology, people have higher and higher requirements on the performance and stability of the rectifier circuit. Therefore, a new rectifier circuit and a new rectifier device with high rectification efficiency and stable output waveform are needed. The MOS-FET switch in the SRS circuit has high sensitivity, and the output current of the FET is controlled by the induction current in the transformer. Therefore, the MOS-FET has fast switching speed and large output current.
The current of the saturated current transformer is output in proportion to time. This will therefore act as a constraint on the MOS-FET. When the transformer is not saturated, the rectified voltage is approximately equal to the sum of all primary diode voltages. However, upon reaching saturation, the voltage is only approximately equal to the voltage of the MOS-FET on-resistance.
The utility model discloses rectifier circuit that obtains not only can regard as the rectifier of two port equipment to use, also can be applied to in a lot of rectifier circuits, for equipment such as buck-boost converter, for rectifier device provides convenient in the UPS, and engineering practice has positive guiding meaning.
Disclosure of Invention
In order to solve the technical problem in the background art, the utility model provides an utilize rectifier circuit of saturable mutual-inductor improves through the rectifier circuit commonly used in to UPS, through MOS-FET's restraint relation, can effectively control current transformer's the output condition, makes on-off control fast, and output current is big, and system response sensitivity is higher, and the output waveform is more stable.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
a rectifying circuit using a saturable transformer comprises a bridge type rectifying circuit, a saturable transformer circuit and an LC filter circuit which are sequentially connected from an input end to an output end.
The bridge rectifier circuit is formed by connecting a first diode D1, a second diode D2, a third diode D3 and a fourth diode D4.
The components of the saturable transformer circuit include a first triode Q and a first inductor LSThe transformer B, MOS-the FET Q1, the second triode Q2, and further including a first capacitor C1, a second capacitor C2, a third capacitor C3, a fifth diode D5, a sixth diode D6, a seventh diode D7, and an eighth diode D8; the circuit connection relationship is as follows:
1) the upper end (1) of the output end of the bridge rectifier circuit is sequentially connected with a first triode Q and a first inductor L in seriesSThe lower end of the MOS-FET pipe Q1 is connected with the lower end (2) of the output end of the bridge rectifier circuit;
2) the upper end of a primary side n1 of the transformer B is connected with the base electrode of the first triode Q, and the lower end is connected with the first inductor LSA lower end; the upper end of the secondary side n2 of the transformer B is connected with the upper end (3) of the LC filter circuit, and the lower end of the secondary side n2 of the transformer B is connected to the gate of the MOS-FET tube Q1 after passing through a seventh diode D7; the fifth diode D5 and the sixth diode D6 are connected in series in an inverted manner and then connected in parallel to two ends of the secondary side n2 of the transformer B;
3) the first capacitor C1 is connected between the source and the drain of the MOS-FET Q1, the second capacitor C2 is connected between the source and the gate of the MOS-FET Q1, and the third capacitor C3 is connected between the gate and the drain of the MOS-FET Q1;
4) the collector and emitter of the second transistor Q2 are connected to the gate and drain of the MOS-FET Q1, respectively, the base of the second transistor Q2 is connected to the intermediate point (4) where the secondary side n2 of the transformer B is connected to the seventh diode D7 via the eighth diode D8, and the anode of the eighth diode D8 is connected to the anode of the seventh diode D7.
The LC filter circuit comprises a fourth capacitor C and a second inductor I0The upper end of a fourth capacitor C is an LC filter circuit upper end (3) and is connected with the upper end of a secondary side n2 of the transformer B, and the lower end of the fourth capacitor C is connected with the lower end (2) of the output end of the bridge rectifier circuit; second inductor I0And a resistor R connected in series with the both ends of the fourth capacitor C, the both ends of the resistor R are the rectifying circuit using the saturable mutual inductorAnd (4) an output end.
Compared with the prior art, the beneficial effects of the utility model are that:
1) the utility model discloses a rectifier circuit commonly used in to UPS improves, because MOS-FET's restraint relation, can the effective control current transformer's the output condition, makes on-off control fast, and output current is big, and system response sensitivity is higher, and the output waveform is more stable.
2) The utility model discloses rectifier circuit that obtains not only can regard as the rectifier of two port equipment to use, also can be applied to in a lot of rectifier circuits, for equipment such as buck-boost converter, for rectifier device provides convenient in the UPS, and engineering practice has positive guiding meaning.
Drawings
Fig. 1 is a circuit diagram of a rectification circuit using a saturable transformer according to the present invention.
In the figure: 1-the upper end of the output end of the bridge rectifier circuit 2-the lower end of the output end of the bridge rectifier circuit 3-the upper end of the LC filter circuit 4-the middle point where the secondary side n2 of the transformer B is connected with the seventh diode D7.
Detailed Description
The following detailed description of the embodiments of the present invention will be made with reference to the accompanying drawings.
As shown in fig. 1, a rectifying circuit using a saturable transformer includes a bridge-type rectifying circuit, a saturable transformer circuit, and an LC filter circuit, which are connected in sequence from an input terminal to an output terminal;
the bridge rectifier circuit is formed by connecting a first diode D1, a second diode D2, a third diode D3 and a fourth diode D4.
The components of the saturable transformer circuit include a first triode Q and a first inductor LSThe transformer B, MOS-the FET Q1, the second triode Q2, and further including a first capacitor C1, a second capacitor C2, a third capacitor C3, a fifth diode D5, a sixth diode D6, a seventh diode D7, and an eighth diode D8; the circuit connection relationship is as follows:
1) is transmitted by a bridge rectifier circuitThe upper end (1) of the output end is sequentially connected with a first triode Q and a first inductor L in seriesSThe lower end of the MOS-FET pipe Q1 is connected with the lower end (2) of the output end of the bridge rectifier circuit;
2) the upper end of a primary side n1 of the transformer B is connected with the base electrode of the first triode Q, and the lower end is connected with the first inductor LSA lower end; the upper end of the secondary side n2 of the transformer B is connected with the upper end (3) of the LC filter circuit, and the lower end of the secondary side n2 of the transformer B is connected to the gate of the MOS-FET tube Q1 after passing through a seventh diode D7; the fifth diode D5 and the sixth diode D6 are connected in series in an inverted manner and then connected in parallel to two ends of the secondary side n2 of the transformer B;
3) the first capacitor C1 is connected between the source and the drain of the MOS-FET Q1, the second capacitor C2 is connected between the source and the gate of the MOS-FET Q1, and the third capacitor C3 is connected between the gate and the drain of the MOS-FET Q1;
4) the collector and emitter of the second transistor Q2 are connected to the gate and drain of the MOS-FET Q1, respectively, the base of the second transistor Q2 is connected to the intermediate point (4) where the secondary side n2 of the transformer B is connected to the seventh diode D7 via the eighth diode D8, and the anode of the eighth diode D8 is connected to the anode of the seventh diode D7.
The LC filter circuit comprises a fourth capacitor C and a second inductor I0The upper end of a fourth capacitor C is an LC filter circuit upper end (3) and is connected with the upper end of a secondary side n2 of the transformer B, and the lower end of the fourth capacitor C is connected with the lower end (2) of the output end of the bridge rectifier circuit; second inductor I0And the resistor R is connected with two ends of the fourth capacitor C after being connected in series, and two ends of the resistor R are output ends of the rectifying circuit utilizing the saturable mutual inductor.
The utility model discloses a circuit principle analysis as follows:
the utility model provides a bridge rectifier circuit and LC filter circuit are conventional circuit, and its circuit principle does not describe here, and the following circuit principle to the saturable mutual-inductor circuit only explains as follows:
the saturable mutual inductor circuit consists of an ideal current converter and a saturable inductor LSComposition is carried out; c1, C2 and C3 are capacitances of the MOS-FET Q1, and the following formulas are shown: v1、V2、V3The voltages at the capacitors C1, C2, C3, respectively, I1、I2、I3Currents at capacitances C1, C2, C3, respectively1、C2、C3The capacitances of the capacitances C1, C2, C3, respectively.
1) In a first stage (t0-t1), when current flows through the rectifier circuit, it flows from the upper end (1) of the bridge rectifier circuit, through the inductor LSAnd a primary side n1 of the transformer B, wherein the first transistor Q is conducted, the MOS-FET transistor Q1 is conducted, and the inductor LSTo be unsaturated, and thus charge the capacitors C1 and C2, the induced current Ig at the secondary side n2 of the transformer B will flow through n2, and pass through the diode D7 to charge the capacitor C3. The starting voltage of the capacitor C3 is Vs, and the starting voltage V of the capacitor C3 is V3When the diodes D5, D6, and D7 are turned on at 0, V1、V3The dynamic voltage can be expressed as:
v1(t)＝vs-I1(t-t0)/c1
v3(t)＝I3(t-t0)/c3
Ig＝I2+I3
V1＝V2+V3
2) in a second phase (t1-t2) when the voltage V of the capacitor C3 is lower3To an excitation voltage VthThen, the current will continue to flow through the secondary side n2 of the transformer B, and the voltage Vg across n2 rises. Vg can be expressed as:
Vg＝Vth+Ig(t1-t2)/(c2+c3)
in the formula: vg is the induced voltage at the end n2, VthIs the excitation voltage of the capacitor C3.
3) The third stage (t2-t3) LSThe saturation gradually increases, at which time:
Vg＝VzD5
iLS(t)＝((VzD5/n)(t-t3)/LS
in the formula: vzD5Is the breakdown voltage of the diode D5,iLSis LSThe dynamic current of (2).
4) The fourth stage (t3-t4) when i isLSTo achieve IthWhen L isSSaturation, i since the current in the inductor cannot change abruptlyLSWill continue to increase dramatically. At this time:
iLS＝Ith
iLs＝Ith+(t-t4)(vzD5/n)/Ls
in the formula: ith is LSThe excitation current of (1).
5) A fifth stage (t4-t5) in which Vg becomes 0 due to reverse bias of diode D5, no current flows in the secondary side n2 of transformer B, and voltage V of C3 is connected due to connection of D7 to the gate of MOSFET Q13Will not drop sharply.
v3(t)＝VzD5[1-exp-(t-t3)/C3]
6) A sixth phase (t5-t6) during which time the inductance L is due toSIn an oversaturated state, the triode switch Q will be switched off, iLSThe voltage gradually decreases in the primary side n1 of the transformer B, and the transistor switch Q2 is turned on to start discharging the capacitor C3. At this time:
Vg(t)＝VzD6exp[(t-t6)/(C1+C2)n2]
in the formula: vD6Voltage of diode D6, VZD6Is the breakdown voltage of diode D6.
7) A seventh stage (t6-t7) of iLSContinuously decrease, LSSaturation is not reached.
8) An eighth stage (t7-t8) of iLSThe voltage continues to drop until it becomes 0, at which time the MOSFET Q1 is turned off and the rectifier circuit is in the off state.
The above embodiments are implemented on the premise of the technical solution of the present invention, and detailed implementation and specific operation processes are given, but the protection scope of the present invention is not limited to the above embodiments. The methods used in the above examples are conventional methods unless otherwise specified.
Claims (3)
1. A rectifying circuit utilizing a saturable transformer is characterized by comprising a bridge type rectifying circuit, a saturable transformer circuit and an LC filter circuit which are sequentially connected from an input end to an output end;
the components of the saturable transformer circuit include a first triode Q and a first inductor LSThe transformer B, MOS-the FET Q1, the second triode Q2, and further including a first capacitor C1, a second capacitor C2, a third capacitor C3, a fifth diode D5, a sixth diode D6, a seventh diode D7, and an eighth diode D8; the circuit connection relationship is as follows:
1) the upper end (1) of the output end of the bridge rectifier circuit is sequentially connected with a first triode Q and a first inductor L in seriesSThe lower end of the MOS-FET pipe Q1 is connected with the lower end (2) of the output end of the bridge rectifier circuit;
2) the upper end of a primary side n1 of the transformer B is connected with the base electrode of the first triode Q, and the lower end is connected with the first inductor LSA lower end; the upper end of the secondary side n2 of the transformer B is connected with the upper end (3) of the LC filter circuit, and the lower end of the secondary side n2 of the transformer B is connected to the gate of the MOS-FET tube Q1 after passing through a seventh diode D7; the fifth diode D5 and the sixth diode D6 are connected in series in an inverted manner and then connected in parallel to two ends of the secondary side n2 of the transformer B;
3) the first capacitor C1 is connected between the source and the drain of the MOS-FET Q1, the second capacitor C2 is connected between the source and the gate of the MOS-FET Q1, and the third capacitor C3 is connected between the gate and the drain of the MOS-FET Q1;
4) the collector and emitter of the second transistor Q2 are connected to the gate and drain of the MOS-FET Q1, respectively, the base of the second transistor Q2 is connected to the intermediate point (4) where the secondary side n2 of the transformer B is connected to the seventh diode D7 via the eighth diode D8, and the anode of the eighth diode D8 is connected to the anode of the seventh diode D7.
2. The rectifier circuit using a saturable transformer according to claim 1, wherein the bridge rectifier circuit is a bridge rectifier circuit formed by connecting a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4.
3. The rectifier circuit with a saturable transformer as claimed in claim 1, wherein the LC filter circuit comprises a fourth capacitor C and a second inductor I0The upper end of a fourth capacitor C is an LC filter circuit upper end (3) and is connected with the upper end of a secondary side n2 of the transformer B, and the lower end of the fourth capacitor C is connected with the lower end (2) of the output end of the bridge rectifier circuit; second inductor I0And the resistor R is connected with two ends of the fourth capacitor C after being connected in series, and two ends of the resistor R are output ends of the rectifying circuit utilizing the saturable mutual inductor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921911239.9U CN210839384U (en) | 2019-11-07 | 2019-11-07 | Rectifying circuit utilizing saturable mutual inductor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921911239.9U CN210839384U (en) | 2019-11-07 | 2019-11-07 | Rectifying circuit utilizing saturable mutual inductor |
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| CN210839384U true CN210839384U (en) | 2020-06-23 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110768547A (en) * | 2019-11-07 | 2020-02-07 | 国网辽宁省电力有限公司朝阳供电公司 | Rectifying circuit utilizing saturable mutual inductor |
| CN110768547B (en) * | 2019-11-07 | 2024-08-27 | 国网辽宁省电力有限公司朝阳供电公司 | Rectifier circuit utilizing saturable transformer |
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2019
- 2019-11-07 CN CN201921911239.9U patent/CN210839384U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110768547A (en) * | 2019-11-07 | 2020-02-07 | 国网辽宁省电力有限公司朝阳供电公司 | Rectifying circuit utilizing saturable mutual inductor |
| CN110768547B (en) * | 2019-11-07 | 2024-08-27 | 国网辽宁省电力有限公司朝阳供电公司 | Rectifier circuit utilizing saturable transformer |
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