CN210578469U - Comparator circuit and electronic device - Google Patents
Comparator circuit and electronic device Download PDFInfo
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- CN210578469U CN210578469U CN201921460361.9U CN201921460361U CN210578469U CN 210578469 U CN210578469 U CN 210578469U CN 201921460361 U CN201921460361 U CN 201921460361U CN 210578469 U CN210578469 U CN 210578469U
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Abstract
The utility model discloses a comparator circuit and electronic equipment, the comparator circuit includes first signal input end, second signal input end, signal output end, first divider circuit, second divider circuit and comparator; the input end of the first voltage dividing circuit is connected to the first signal input end, the first output end of the first voltage dividing circuit is connected to the positive input end of the comparator, and the second output end of the first voltage dividing circuit is connected to the first input end of the second voltage dividing circuit; a second input end of the second voltage division circuit is connected to the second signal input end, and an output end of the second voltage division circuit is connected to a negative input end of the comparator; and the positive input end of the comparator is connected to the signal output end. The technical scheme of the utility model, can improve the accuracy of comparator output result, enlarge the range of application of comparator.
Description
Technical Field
The utility model relates to the field of electronic technology, in particular to comparator circuit and electronic equipment.
Background
The comparator is a chip, which takes an analog voltage signal and a reference voltage signal as input, takes a binary digital signal with high and low levels as output, and can be used as an interface circuit of an analog circuit and a digital circuit. The performance of the comparator is characterized by several performance criteria that require special attention during use, such as the operating voltage, the delay time of the input and output, the rise and fall time of the output signal, the input and output voltage characteristics, and the duty cycle that determines the stability of the output of the comparator.
In some comparators, there is no definition of the hysteresis interval, because such comparators are used in applications where the input signals differ more greatly, there is no output stability problem, such as the comparison of "1" with "0". In some comparison application scenarios, the comparator is required to have a hysteresis interval, and the hysteresis interval of the comparator is beneficial to the comparison and output of the input signal, however, because the input signal is often accompanied by noise, if the noise amplitude exceeds the hysteresis interval of the comparator, the erroneous judgment and output of the comparator will be caused.
SUMMERY OF THE UTILITY MODEL
The utility model provides a comparator circuit and electronic equipment aims at improving the accuracy of the output result of comparator, enlarges the range of application of comparator.
To achieve the above object, the present invention provides a comparator circuit, which includes:
the comparator circuit comprises a first signal input end, a second signal input end, a signal output end, a first voltage division circuit, a second voltage division circuit and a comparator;
the input end of the first voltage dividing circuit is connected to the first signal input end, the first output end of the first voltage dividing circuit is connected to the positive input end of the comparator, and the second output end of the first voltage dividing circuit is connected to the first input end of the second voltage dividing circuit; a second input end of the second voltage division circuit is connected to the second signal input end, and an output end of the second voltage division circuit is connected to a negative input end of the comparator; and the positive input end of the comparator is connected to the signal output end.
Optionally, the second voltage dividing circuit includes a first resistor and a second resistor;
a first end of the first resistor is connected to the second signal input end, a second end of the first resistor is connected to the second output end of the first voltage division circuit, the negative input end of the comparator and the first end of the second resistor; and the second end of the second resistor is grounded.
Optionally, the first voltage dividing circuit includes a third resistor and a fourth resistor;
a first end of the third resistor is connected to the first signal input end, and a second end of the third resistor is connected to the positive input end of the comparator and to a first end of the fourth resistor; a second end of the fourth resistor is connected to the first input end of the second voltage division circuit.
Optionally, the resistance of the third resistor is greater than the resistance of the fourth resistor.
Optionally, the comparator is a hysteresis comparator.
Optionally, a value of the voltage signal at the negative input end of the comparator is in a direct proportion with a value of the voltage signal at the positive input end of the comparator.
Optionally, the comparator circuit further includes a digital-to-analog converter, and an output end of the digital-to-analog converter is connected to the second signal input end.
Optionally, the comparator circuit further includes a controller, and an output end of the controller is connected to an input end of the digital-to-analog converter.
To achieve the above object, the present invention further provides an electronic device, which includes the comparator circuit as described in any one of the above.
In the technical scheme of this embodiment, the positive input end and the negative input end of the comparator are associated by arranging the first voltage dividing circuit, so that when the voltage signal input by the first signal input end is increased, the voltage signal input by the second signal input end is pulled high accordingly. Therefore, under the condition that the indexes of the comparator are not changed, the accuracy of the output result of the comparator is improved, and the application range of the comparator is expanded.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a block diagram of an embodiment of a comparator circuit of the present invention;
fig. 2 is a schematic circuit diagram of an embodiment of a comparator circuit of the present invention;
fig. 3 is a block diagram of another embodiment of the comparator circuit of the present invention.
The reference numbers illustrate:
| 10 | a first |
20 | Second |
| 30 | Comparator with a |
40 | Digital-to- |
| 50 | Controller | A | A first signal input terminal |
| B | Second signal input terminal | OUT | Signal output terminal |
| R1 | A first resistor | R2 | Second resistance |
| R3 | Third resistance | R4 | Fourth resistor |
| U1 | Comparator with a comparator circuit |
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that, if directional indications (such as upper, lower, left, right, front and rear … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides a comparator circuit.
Referring to fig. 1, the comparator circuit includes a first signal input terminal a, a second signal input terminal B, a signal output terminal OUT, a first voltage dividing circuit 10, a second voltage dividing circuit 20, and a comparator 30;
an input terminal of the first voltage dividing circuit 10 is connected to the first signal input terminal a, a first output terminal of the first voltage dividing circuit 10 is connected to the positive input terminal of the comparator 30, and a second output terminal of the first voltage dividing circuit 10 is connected to a first input terminal of the second voltage dividing circuit 20; a second input terminal of the second voltage-dividing circuit 20 is connected to the second signal input terminal B, and an output terminal of the second voltage-dividing circuit 20 is connected to a negative input terminal of the comparator 30; a positive input terminal of the comparator 30 is connected to the signal output terminal OUT.
The first voltage dividing circuit 10 may be implemented by connecting a plurality of resistors in series. The first voltage dividing circuit 10 is configured to receive a voltage signal input by the first signal input terminal a, output a first voltage signal to the positive input terminal of the comparator 30, and output a second voltage signal to the second voltage dividing circuit 20.
The second voltage dividing circuit 20 may be implemented by connecting a plurality of resistors in series. The second voltage dividing circuit 20 is configured to receive the voltage signal input by the second signal input terminal B and the second voltage signal output by the first voltage dividing circuit 10, and output a third voltage signal to the negative input terminal of the comparator 30.
The comparator 30 may be a hysteresis comparator, and the comparator 30 is configured to generate a control signal according to the first voltage signal and the third voltage signal and output the control signal to the signal output terminal OUT. The hysteresis comparator is characterized in that the hysteresis comparator has two threshold voltages. When the input changes in a single direction, the output jumps once. When the input is changed from big to small, the corresponding threshold voltage is small; when the input is changed from small to large, the corresponding threshold voltage is large. Between the two threshold voltages, the output remains the original output.
To facilitate understanding of the technical solution of the present application, Vin represents a voltage input to the first signal input terminal a, Vref represents a voltage input to the second signal input terminal B, V1 represents a voltage of the positive input terminal of the comparator 30, and V2 represents a voltage of the negative input terminal of the comparator 30.
The correlation of the positive and negative inputs of the comparator 30 is realized by the first voltage dividing circuit 10. The voltage at the positive input end of the comparator 30 is obtained by dividing the voltage signal Vin input from the first signal input end a by the first voltage dividing circuit 10; the voltage at the negative input terminal of the comparator 30 is obtained by dividing the voltage signal Vref input at the second signal input terminal B and the second voltage signal output by the first voltage dividing circuit 10 by the second voltage dividing circuit 20. Since the first voltage dividing circuit 10 is used for outputting a voltage to both the positive input terminal of the comparator 30 and the second voltage dividing circuit 20, the larger the voltage signal Vin input from the first signal input terminal a is, the larger the voltage at the positive input terminal of the comparator 30 is, and at the same time, the voltage at the negative input terminal of the comparator 30 is also increased, and the voltage at the negative input terminal of the comparator 30 is increased, which pulls up the voltage Vref at the second signal input terminal B. It can be seen that, in this embodiment, under the condition that the index of the comparator itself is not changed, in order to make the comparator 30 generate level inversion, the voltage signal Vin input by the first signal input end a needs to be increased, and the voltage signal Vin input by the first signal input end a is increased, which will pull up the voltage of the voltage signal Vref input by the second signal input end B, so that the hysteresis interval between the positive and negative input ends of the comparator 30 is increased virtually, and the accuracy of the output result of the comparator 30 is improved. For example, if the first voltage divider circuit 10 is not provided, the positive input terminal of the comparator 30 is directly connected to the first signal input terminal a, and the positive input terminal of the comparator 30 is not associated with the negative input terminal thereof. At this time, the voltage difference between the voltage Vin at the first signal input terminal a and the voltage Vref at the second signal input terminal B is greater than 0.1V, so that the comparator 30 generates level inversion. After the first voltage divider 10 is provided, under the condition that the index of the comparator 30 itself is not changed, the voltage difference between the voltage Vin of the first signal input terminal a and the voltage Vref of the second signal input terminal B needs to be greater than 1V, so that the comparator 30 can generate level inversion. With such an arrangement, the hysteresis interval of the comparator 30 is increased, and the influence of the interference signal on the output result of the comparator 30 is small, so that the accuracy of the output result of the comparator 30 is improved. In addition, the first voltage dividing circuit 10 may further divide the voltage of the noise signal input by the first signal input terminal a and output the divided voltage to the positive input terminal of the comparator 30, so as to further reduce the influence of the noise on the output result of the comparator 30, and improve the stability of the output result of the comparator 30.
In the technical solution of this embodiment, the positive input terminal and the negative input terminal of the comparator 30 are associated by the first voltage dividing circuit 10, so that when the voltage signal Vin input by the first signal input terminal a increases, the voltage signal Vref input by the second signal input terminal B is pulled up accordingly. Therefore, under the condition that the indexes of the comparator are not changed, the accuracy of the output result of the comparator 30 is improved, and the application range of the comparator is expanded. The first voltage dividing circuit 10 may further divide the voltage of the noise signal input by the first signal input terminal a and output the divided voltage to the positive input terminal of the comparator 30, so as to further reduce the influence of the noise on the output result of the comparator 30, and improve the stability of the output result of the comparator 30.
In one embodiment, the first voltage divider circuit 10 includes a third resistor R3 and a fourth resistor R4; a first end of the third resistor R3 is connected to the first signal input terminal a, a second end of the third resistor R3 is connected to the positive input terminal of the comparator 30 and to a first end of the fourth resistor R4; a second terminal of the fourth resistor R4 is connected to a first input terminal of the second voltage divider circuit 20.
In this embodiment, the third resistor R3 and the fourth resistor R4 are used for dividing the voltage signal Vin input from the first signal input terminal a and outputting the divided voltage signal Vin to the positive input terminal of the comparator 30, and the second voltage dividing circuit 20. In order to make the comparator 30 generate level inversion, the larger the third resistor R3 is, the larger the voltage signal Vin input by the first signal input terminal a is, and the more accurate the output result of the comparator 30 is. The fourth resistor R4 is connected across the positive input terminal of the comparator 30 and the negative input terminal of the comparator 30, so that when the voltage signal Vin input from the first signal input terminal a increases, the voltage signal Vref input from the second signal input terminal B is pulled high, thereby improving the accuracy of the output result of the comparator 30. Optionally, the resistance of the third resistor R3 is greater than the resistance of the fourth resistor R4, for example, if the fourth resistor is 1K ohm, the third resistor may be 10K ohm, and if the fourth resistor is 2K ohm, the third resistor may be 20K ohm.
In one embodiment, the second voltage divider circuit 20 includes a first resistor R2 and a second resistor R2; a first terminal of the first resistor R1 is connected to the second signal input terminal B, a second terminal of the first resistor R1 is connected to the second output terminal of the first voltage-dividing circuit 10 and to the negative input terminal of the comparator 30, and to a first terminal of the second resistor R2; the second end of the second resistor R2 is grounded.
The first resistor R1 and the second resistor R2 are connected in series to divide the voltage, so as to divide the voltage signal Vref input from the second signal input terminal B and the second voltage signal output from the first voltage dividing circuit 10, and output the divided voltage signal to the negative input terminal of the comparator 30. By adjusting the resistances of the first resistor R1 and the second resistor R2, the third voltage signal output to the negative input terminal of the comparator 30 after being divided by the first resistor R1 and the second resistor R2 can satisfy the requirement of the comparator 30.
For better illustration of the inventive concept of the present invention, the following description is made with reference to fig. 1 and 2 for illustrating the specific circuit principle of the present invention:
the voltage input to the first signal input terminal a is denoted by Vin, the voltage input to the second signal input terminal B is denoted by Vref, the voltage at the positive input terminal of the comparator is denoted by V1, and the voltage at the negative input terminal of the comparator is denoted by V2. Optionally, the third resistor R3 is greater than the first resistor R1, the third resistor R3 is greater than the second resistor R2, and the third resistor R3 is greater than the fourth resistor R4.
In particular, the method comprises the following steps of,
as can be seen,
while
Therefore, the temperature of the molten metal is controlled,
since the resistance of the third resistor R3 is relatively large, in order to meet the requirement of the hysteresis interval of the comparator itself, it is necessary to increase the value of the voltage signal Vin input by the first signal input terminal a, and simultaneously pull up the value of the voltage signal Vref input by the second signal input terminal B, so as to make the output result of the comparator 30 accurate. The larger the value of the voltage signal Vin input by the first signal input terminal a is, the larger the signal amplitude is, which is equivalent to enlarging the hysteresis interval of the comparator, and improving the stability of the output result of the comparator 30. For example, if the third resistor R3 and the fourth resistor R4 are not provided, the positive input terminal of the comparator 30 is directly connected to the first signal input terminal a, and the positive input terminal of the comparator 30 is connected to the first signal input terminal aThe negative inputs of which are not associated. At this time, the voltage difference between the voltage Vin at the first signal input terminal a and the voltage Vref at the second signal input terminal B is greater than 0.1V, so that the comparator 30 generates level inversion. After the third resistor R3 and the fourth resistor R4 are provided, under the condition that the index of the comparator 30 itself is not changed, the voltage difference between the voltage Vin of the first signal input terminal a and the voltage Vref of the second signal input terminal B needs to be greater than 1V, so that the comparator 30 can generate level inversion. With such an arrangement, the hysteresis interval of the comparator 30 is increased, and the accuracy of the output result of the comparator 30 is improved.
In an embodiment, the comparator circuit further comprises a digital-to-analog converter 40, and an output end of the digital-to-analog converter 40 is connected to the second signal input end B.
The dac 40 is configured to convert the digital voltage signal into an analog voltage signal and output the analog voltage signal to the second voltage dividing circuit 20, so that the voltage V2 at the negative input terminal of the comparator 30 can be adjusted by the dac 40 to determine the level-flipping point of the comparator 30. By the arrangement, the voltage V2 of the negative input end of the comparator 30 can be flexibly modified according to actual needs, and the application range of the comparator is widened.
In an embodiment, the comparator circuit further comprises a controller 50, and an output of the controller 50 is connected to an input of the digital-to-analog converter 40.
In this embodiment, the controller 50 may be a microprocessor such as a single chip, a DSP, or an FPGA. The controller 50 controls the voltage signal output by the digital-to-analog converter 40 through the IO port, and thus the voltage V2 at the negative input end of the comparator 30 can be flexibly modified according to actual needs, so as to improve the application range of the comparator.
The utility model provides an electronic equipment, electronic equipment includes the comparator circuit, the comparator circuit includes first signal input part A, second signal input part B, signal output part OUT, first divider circuit 10, second divider circuit 20 and comparator 30. An input terminal of the first voltage dividing circuit 10 is connected to the first signal input terminal a, a first output terminal of the first voltage dividing circuit 10 is connected to the positive input terminal of the comparator 30, and a second output terminal of the first voltage dividing circuit 10 is connected to a first input terminal of the second voltage dividing circuit 20; a second input terminal of the second voltage-dividing circuit 20 is connected to the second signal input terminal B, and an output terminal of the second voltage-dividing circuit 20 is connected to a negative input terminal of the comparator 30; a positive input terminal of the comparator 30 is connected to the signal output terminal OUT.
The above is only the optional embodiment of the present invention, and not the scope of the present invention is limited thereby, all the equivalent structure changes made by the contents of the specification and the drawings are utilized under the inventive concept of the present invention, or the direct/indirect application in other related technical fields is included in the patent protection scope of the present invention.
Claims (9)
1. A comparator circuit, comprising a first signal input, a second signal input, a signal output, a first voltage divider, a second voltage divider, and a comparator;
the input end of the first voltage dividing circuit is connected to the first signal input end, the first output end of the first voltage dividing circuit is connected to the positive input end of the comparator, and the second output end of the first voltage dividing circuit is connected to the first input end of the second voltage dividing circuit;
a second input end of the second voltage division circuit is connected to the second signal input end, and an output end of the second voltage division circuit is connected to a negative input end of the comparator; and the positive input end of the comparator is connected to the signal output end.
2. The comparator circuit of claim 1, wherein the second voltage divider circuit comprises a first resistor and a second resistor;
a first end of the first resistor is connected to the second signal input end, a second end of the first resistor is connected to the second output end of the first voltage division circuit, the negative input end of the comparator and the first end of the second resistor; and the second end of the second resistor is grounded.
3. The comparator circuit of claim 2, wherein the first voltage divider circuit includes a third resistor and a fourth resistor;
a first end of the third resistor is connected to the first signal input end, and a second end of the third resistor is connected to the positive input end of the comparator and to a first end of the fourth resistor; a second end of the fourth resistor is connected to the first input end of the second voltage division circuit.
4. The comparator circuit according to claim 3, wherein a resistance value of the third resistor is larger than a resistance value of the fourth resistor.
5. The comparator circuit of claim 4, wherein the comparator is a hysteresis comparator.
6. The comparator circuit according to claim 5, wherein the value of the voltage signal at the negative input of the comparator is directly proportional to the value of the voltage signal at the positive input of the comparator.
7. The comparator circuit according to any of claims 1 to 6, further comprising a digital-to-analog converter, an output of the digital-to-analog converter being connected to the second signal input.
8. The comparator circuit of claim 7, further comprising a controller, an output of the controller being connected to an input of the digital-to-analog converter.
9. An electronic device, characterized in that the electronic device comprises a comparator circuit according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921460361.9U CN210578469U (en) | 2019-09-03 | 2019-09-03 | Comparator circuit and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921460361.9U CN210578469U (en) | 2019-09-03 | 2019-09-03 | Comparator circuit and electronic device |
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| Publication Number | Publication Date |
|---|---|
| CN210578469U true CN210578469U (en) | 2020-05-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201921460361.9U Active CN210578469U (en) | 2019-09-03 | 2019-09-03 | Comparator circuit and electronic device |
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| CN (1) | CN210578469U (en) |
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- 2019-09-03 CN CN201921460361.9U patent/CN210578469U/en active Active
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