CN210405332U - Two-wire half-duplex communication circuit with power supply - Google Patents
Two-wire half-duplex communication circuit with power supply Download PDFInfo
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- CN210405332U CN210405332U CN201921697219.6U CN201921697219U CN210405332U CN 210405332 U CN210405332 U CN 210405332U CN 201921697219 U CN201921697219 U CN 201921697219U CN 210405332 U CN210405332 U CN 210405332U
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Abstract
The utility model provides a two-line half-duplex communication circuit with power supply, which comprises a main communication unit, a plurality of sub-communication units and an I/O bus; the main communication unit is respectively connected with the plurality of communication units through an I/O bus; the I/O bus is powered by an input voltage Vcc; therefore, the number of networking lines is reduced, and the cost is saved.
Description
Technical Field
The utility model relates to the field of communication, especially, relate to a two-line half-duplex communication circuit of area power supply.
Background
In many existing networking lines, a power supply line and a communication line are often separated, for example, in some temperature detection systems, a signal of a temperature sensor is communicated with an upper computer through a serial port, and power supply of the temperature sensor is carried out by another line, so that in a circuit with many elements, wide distribution and long line, complicated wiring and cost are required.
SUMMERY OF THE UTILITY MODEL
The utility model provides a two-wire half-duplex communication circuit and communication method of area power supply realizes power supply and communication through the IO bus, reduces network deployment circuit quantity, saves the cost.
The utility model discloses a following mode realizes:
a two-wire half-duplex communication circuit with power supply comprises a main communication unit, a plurality of sub-communication units and an I/O bus; the main communication unit is respectively connected with the plurality of communication units through an I/O bus; the I/O bus is powered by an input voltage Vcc.
Further, the master communication unit includes a master data transmission circuit; the main data transmitting circuit comprises an MCU-TXD interface, an NMOS tube N2 and a load resistor R3; the grid electrode of the NMOS tube N2 is connected with an MCU-TXD interface; the source electrode of the NMOS transistor N2 is connected in series to the ground through a resistor R1; the drain electrode of the NMOS tube N2 is connected with the R3 in series to an input voltage Vcc; the sub communication unit comprises a sub data receiving circuit communicated with the main data sending circuit; the sub data receiving circuit comprises an RXD interface, a resistor R01 and a resistor R02; the resistor R01 is connected with the resistor R02 in series; the RXD interface is connected between a resistor R01 and a resistor R02; the resistor R01 is connected with an input voltage Vcc; the resistor R02 is connected to the I/O bus and connected between the load resistor R3 and the NMOS transistor N2.
Further, the master communication unit further comprises a master data receiving circuit; the main data receiving circuit comprises an MCU-RXD interface, a triode N1 and a resistor R1; the MCU-RXD is connected with a collector of a triode N1; the emitter of the triode N1 is grounded; the base electrode of the triode N1 is connected with the source electrode of an NMOS tube N2; two ends of the resistor R1 are respectively connected with the base electrode and the emitter electrode of the triode N1; the sub communication unit comprises a sub data sending circuit communicated with the main data receiving circuit; the sub data transmitting circuit comprises a TXD interface and an NMOS tube G3; the TXD interface is connected with the grid electrode of an NMOS tube G3; the source electrode of the NMOS tube is connected to the I/O bus and is connected between the load resistor R3 and the NMOS tube N2; and the drain electrode of the NMOS tube is connected with an input voltage Vcc.
Furthermore, the collector of the triode N1 is connected with a resistor R2; the resistor R2 is connected with a boosting voltage MCU-V.
Further, the NMOS transistor N2 and the NMOS transistor G3 are both provided with a protection diode.
Furthermore, the triode adopts an NPN tube.
Furthermore, an energy storage capacitor is arranged in the sub-communication unit.
The utility model has the advantages that: the host sends 0\1 signals to the communication unit through the change of current and voltage of the control circuit and the power supply circuit to form data communication, and the communication unit feeds back 0\1 signals to the host through the power supply circuit, so that power supply and communication are realized through an I/O bus, the number of networking lines is reduced, and the cost is saved.
Drawings
FIG. 1 is a circuit diagram of the present invention;
FIG. 2 is a circuit diagram of embodiment 2.
Detailed Description
A two-wire half-duplex communication circuit with power supply comprises a main communication unit, a plurality of sub-communication units and an I/O bus; the main communication unit is respectively connected with the plurality of communication units through an I/O bus; the I/O bus is powered by an input voltage Vcc.
The master communication unit comprises a master data transmission circuit; the main data transmitting circuit comprises an MCU-TXD interface, an NMOS tube N2 and a load resistor R3; the grid electrode of the NMOS tube N2 is connected with an MCU-TXD interface; the source electrode of the NMOS transistor N2 is connected in series to the ground through a resistor R1; the drain electrode of the NMOS tube N2 is connected with the R3 in series to an input voltage Vcc; the sub communication unit comprises a sub data receiving circuit communicated with the main data sending circuit; the sub data receiving circuit comprises an RXD interface, a resistor R01 and a resistor R02; the resistor R01 is connected with the resistor R02 in series; the RXD interface is connected between a resistor R01 and a resistor R02; the resistor R01 is connected with an input voltage Vcc; the resistor R02 is connected to the I/O bus and connected between the load resistor R3 and the NMOS transistor N2.
The main communication unit also comprises a main data receiving circuit; the main data receiving circuit comprises an MCU-RXD interface, a triode N1 and a resistor R1; the MCU-RXD is connected with a collector of a triode N1; the emitter of the triode N1 is grounded; the base electrode of the triode N1 is connected with the source electrode of an NMOS tube N2; two ends of the resistor R1 are respectively connected with the base electrode and the emitter electrode of the triode N1; the sub communication unit comprises a sub data sending circuit communicated with the main data receiving circuit; the sub data transmitting circuit comprises a TXD interface and an NMOS tube G3; the TXD interface is connected with the grid electrode of an NMOS tube G3; the source electrode of the NMOS tube is connected to the I/O bus and is connected between the load resistor R3 and the NMOS tube N2; and the drain electrode of the NMOS tube is connected with an input voltage Vcc.
The collector of the triode N1 is connected with a resistor R2; the resistor R2 is connected with a boosting voltage MCU-V.
And the NMOS tube N2 and the NMOS tube G3 are both provided with protection diodes.
The triode adopts an NPN tube.
And an energy storage capacitor is arranged in the sub-communication unit.
When the communication device is used, the TXD end and the RXD end of the sub communication unit are connected with a sensor or communication equipment. The circuit communication may be conveyed via digital signal 0/1.
When the MCU-TXD end gives a high level and sends out a 1, the N2 is conducted, the RXD voltage is pulled down and receives a 0, when the MCU-TXD end gives a low level and sends out a 0, the N2 is cut off, the RXD voltage is pulled up and receives a 1; when the communication unit receives and identifies data, feedback is sent out through the TXD end, when the TXD end gives a high level and sends out a 1, G3 is conducted, the base voltage of the triode N1 is pulled high, the triode N1 is conducted, the voltage of the MCU-RXD end is pulled low and receives 0, when the TXD end gives a low level, G3 is cut off, N1 is cut off, and the voltage of the MCU-RXD end is pulled high by the MCU-V to obtain a signal 1.
In a normal state, the MCU-TXD and the MCU-RXD are in a high level state, namely, a signal is 1.
N1, R1, R2 are conventional cascode circuits that require current to generate a voltage across R1 in the quiescent state.
Example 2
This embodiment provides the actual application of circuit in the communication of electron detonator exploder is illustrated.
In the embodiment, Vcc adopts 9-18V voltage, the electronic detonator is connected in a sub-communication mode, the working current of the electronic detonator is 20-40 muA, the load resistor R3 is 3k resistor, the NMOS tube N2 adopts AO3400 tube, the triode N1 adopts 9013 triode, the R2 adopts 30k resistor, and the R1 adopts 6.8k resistor. The communication is as described in the previous embodiments.
Claims (8)
1. A two-wire half-duplex communication circuit with power supply is characterized by comprising a main communication unit, a plurality of sub-communication units and an I/O bus; the main communication unit is respectively connected with the plurality of communication units through an I/O bus; the I/O bus is powered by an input voltage Vcc.
2. The circuit of claim 1, wherein the primary communication unit comprises a primary data transmission circuit; the main data transmitting circuit comprises an MCU-TXD interface, an NMOS tube N2 and a load resistor R3; the grid electrode of the NMOS tube N2 is connected with an MCU-TXD interface; the source electrode of the NMOS transistor N2 is connected in series to the ground through a resistor R1; the drain electrode of the NMOS tube N2 is connected with the R3 in series to an input voltage Vcc; the sub communication unit comprises a sub data receiving circuit communicated with the main data sending circuit; the sub data receiving circuit comprises an RXD interface, a resistor R01 and a resistor R02; the resistor R01 is connected with the resistor R02 in series; the RXD interface is connected between a resistor R01 and a resistor R02; the resistor R01 is connected with an input voltage Vcc; the resistor R02 is connected to the I/O bus and connected between the load resistor R3 and the NMOS transistor N2.
3. The circuit of claim 1, wherein the primary communication unit further comprises a primary data receiving circuit; the main data receiving circuit comprises an MCU-RXD interface, a triode N1 and a resistor R1; the MCU-RXD is connected with a collector of a triode N1; the emitter of the triode N1 is grounded; the base electrode of the triode N1 is connected with the source electrode of an NMOS tube N2; two ends of the resistor R1 are respectively connected with the base electrode and the emitter electrode of the triode N1; the sub communication unit comprises a sub data sending circuit communicated with the main data receiving circuit; the sub data transmitting circuit comprises a TXD interface and an NMOS tube G3; the TXD interface is connected with the grid electrode of an NMOS tube G3; the source electrode of the NMOS tube is connected to the I/O bus and is connected between the load resistor R3 and the NMOS tube N2; and the drain electrode of the NMOS tube is connected with an input voltage Vcc.
4. The circuit as claimed in claim 3, wherein the collector of the transistor N1 is connected to a resistor R2; the resistor R2 is connected with a boosting voltage MCU-V.
5. The circuit of claim 3, wherein the NMOS transistor N2 and the NMOS transistor G3 are both provided with a protection diode.
6. The circuit of claim 3, wherein the transistor is an NPN transistor.
7. The circuit of claim 1, wherein an energy storage capacitor is disposed in the sub-communication unit.
8. The circuit of claim 1, wherein Vcc is 9-18V, the sub-communication unit is an electronic detonator, the electronic detonator has an operating current of 20-40 μ a, the load resistor R3 is a 3k resistor, the NMOS transistor N2 is AO3400, the transistor N1 is 9013, the R2 is a 30k resistor, and the R1 is a 6.8k resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921697219.6U CN210405332U (en) | 2019-10-11 | 2019-10-11 | Two-wire half-duplex communication circuit with power supply |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921697219.6U CN210405332U (en) | 2019-10-11 | 2019-10-11 | Two-wire half-duplex communication circuit with power supply |
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| CN210405332U true CN210405332U (en) | 2020-04-24 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110535618A (en) * | 2019-10-11 | 2019-12-03 | 深圳市中安利业科技技术有限公司 | Two wires half duplex communication circuit and its means of communication with power supply |
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2019
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110535618A (en) * | 2019-10-11 | 2019-12-03 | 深圳市中安利业科技技术有限公司 | Two wires half duplex communication circuit and its means of communication with power supply |
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