CN210041780U - Jitter-free ring oscillator - Google Patents
Jitter-free ring oscillator Download PDFInfo
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- CN210041780U CN210041780U CN201921228193.0U CN201921228193U CN210041780U CN 210041780 U CN210041780 U CN 210041780U CN 201921228193 U CN201921228193 U CN 201921228193U CN 210041780 U CN210041780 U CN 210041780U
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Abstract
The utility model relates to the field of ring oscillators, in particular to a jitter-free ring oscillator, which comprises a power supply, a first oscillator link, a second oscillator link, a third oscillator link and a fourth oscillator link which are connected in a ring structure, wherein the first oscillator link is connected with the second oscillator link in series, the second oscillator link is connected with the third oscillator link in cross, the third oscillator link is connected with the fourth oscillator link in series, the fourth oscillator link is connected with the first oscillator link in series, each oscillator link comprises a first inverter, second dc-to-ac converter, third dc-to-ac converter and fourth inverter, first oscillator link, second oscillator link, third oscillator link and fourth oscillator link all are equipped with differential delay unit and start the circuit that shakes, the utility model provides a level four difference ring oscillator just is equipped with the oscillator of start-oscillation structure.
Description
Technical Field
The utility model relates to a ring oscillator field, concretely relates to no shake ring oscillator.
Background
In recent years, electronic products are required to satisfy handheld multi-terminal communication, and almost all communication systems require a stable periodic signal, i.e., a clock, to provide a basic timing basis. These clock signals are typically generated by frequency synthesis techniques. The core in frequency synthesis technology is the oscillator circuit design. There are two common oscillator circuit configurations: a ring oscillator and an LC oscillator. The ring oscillator has the most extensive application in a system on a chip because of simple circuit structure, low process requirement and convenient integration, and the ring oscillator is divided into a single-ended circuit structure and a differential circuit structure by connecting a plurality of basic differential delay unit circuits. Because the differential structure has better noise immunity, the differential structure is more applied to high-speed PLL.
In the prior art, a good four-stage differential ring oscillator and a good oscillation starting structure of the ring oscillator are not provided, so that the use is not very convenient, and the practicability is not good.
To the above problem, the utility model designs a no shake ring oscillator.
SUMMERY OF THE UTILITY MODEL
Not enough to prior art, the utility model provides a no shake ring oscillator. The problem is solved as much as possible, and the four-stage differential ring oscillator provided with the oscillation starting structure is provided.
The utility model discloses a following technical scheme realizes:
a jitter-free ring oscillator comprises a power supply, a first oscillator link, a second oscillator link, a third oscillator link and a fourth oscillator link which are connected in a ring structure, wherein the first oscillator link is connected with the second oscillator link in series, the second oscillator link is connected with the third oscillator link in a cross mode, the third oscillator link is connected with the fourth oscillator link in series, the fourth oscillator link is connected with the first oscillator link in series, each oscillator link comprises a first inverter, a second inverter, a third inverter and a fourth inverter, the first oscillator link, the second oscillator link, the third oscillator link and the fourth oscillator link are respectively provided with a differential delay unit and a vibration starting circuit, and the first inverter, the second inverter, the third inverter and the fourth inverter are respectively coupled with the power supply voltage through the power supply.
Preferably, the first oscillator link, the second oscillator link and the fourth oscillator link include a first input terminal and a second input terminal; a first output terminal and a second output terminal; the first inverter and the second inverter receive input signals from a first input terminal and a second input terminal, respectively, and provide output signals at a first output terminal and a second output terminal, respectively, the third inverter and the fourth inverter each have an input terminal and an output terminal, the input terminal of the third inverter and the input terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively, and the output terminal of the third inverter and the output terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively.
Preferably, the third oscillator element comprises a first input terminal and a second input terminal; a first output terminal and a second output terminal; the first inverter and the second inverter receive input signals from the second input terminal and the first input terminal, respectively, and provide output signals at the second output terminal and the first output terminal, respectively, the third inverter and the fourth inverter each have an input terminal and an output terminal, the input terminal of the third inverter and the input terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively, and the output terminal of the third inverter and the output terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively.
Preferably, the first inverter and the second inverter are each larger than the third inverter and the fourth inverter.
Preferably, the phase shifts generated by the first oscillator element, the second oscillator element, the third oscillator element and the fourth oscillator element are all 45 °.
The utility model has the advantages that: the ring oscillator is designed into a differential form, so that the symmetry of a domain is ensured, a multi-phase clock is output at the same time, the designed differential delay unit can well control the ring oscillator, and the designed oscillation starting circuit can pull down the input end of one stage of delay unit when the oscillator does not work, so that the input end deviates from a balanced state, and at the moment, the oscillator has a large differential mode signal, and can quickly enter a large-signal working state when the oscillator starts to work; after the oscillator is stably oscillated, the oscillation starting circuit is in a closed state, and the power consumption is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a linear model diagram of the present invention;
fig. 2 is a schematic structural diagram of the present invention;
fig. 3 is a schematic diagram of the structure of the differential delay unit of the present invention;
fig. 4 is a circuit diagram of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1 to 4, a ring oscillator without jitter includes a power supply 105, a first oscillator link 101, a second oscillator link 102, a third oscillator link 103 and a fourth oscillator link 104 connected in a ring structure, the first oscillator link 101 is connected in series with the second oscillator link 102, the second oscillator link 102 is connected in cross with the third oscillator link 103, the third oscillator link 103 is connected in series with the fourth oscillator link 104, the fourth oscillator link 104 is connected in series with the first oscillator link 101, each oscillator link includes a first inverter a, a second inverter b, a third inverter c and a fourth inverter d, each of the first oscillator link 101, the second oscillator link 102, the third oscillator link 103 and the fourth oscillator link 104 is provided with a differential delay unit and a start-up circuit, the first inverter a, the second inverter b, the third oscillator link 103 and the fourth oscillator link 104 are provided with a differential delay unit and a start-up circuit, and the first inverter a, the second inverter b, the third oscillator link 103 and the fourth oscillator link 104 are provided with a differential delay unit and a start-, The third inverter c and the fourth inverter d are both coupled to the supply voltage via a power supply 105.
Specifically, the first oscillator link 101, the second oscillator link 102, and the fourth oscillator link 104 include a first input terminal and a second input terminal; a first output terminal and a second output terminal; a first inverter a and a second inverter b respectively receive input signals from a first input terminal and a second input terminal and respectively provide output signals at a first output terminal and a second output terminal, a third inverter c and a fourth inverter d are respectively provided with an input terminal and an output terminal, the input terminal of the third inverter c and the input terminal of the fourth inverter d are respectively coupled to the first output terminal and the second output terminal of the oscillator link, the output terminal of the third inverter c and the output terminal of the fourth inverter d are respectively coupled with the first output terminal and the second output terminal of the oscillator link, and the third oscillator link comprises the first input terminal and the second input terminal; a first output terminal and a second output terminal; the first inverter a and the second inverter b receive input signals from the second input terminal and the first input terminal respectively, and providing output signals at a second output terminal and a first output terminal, respectively, a third inverter c and a fourth inverter d each having an input terminal and an output terminal, the input terminal of the third inverter c and the input terminal of the fourth inverter d being coupled to the first output terminal and the second output terminal of the oscillator element, respectively, the output terminal of the third inverter c and the output terminal of the fourth inverter d being coupled to the first output terminal and the second output terminal of the oscillator element, respectively, the first inverter a and the second inverter b each being larger than the third inverter c and the fourth inverter d, the phase shifts of the first oscillator element 101, the second oscillator element 102, the third oscillator element 103 and the fourth oscillator element 104 are all 45 °.
The utility model discloses in, through the first inverter a input terminal who connects third oscillator link 103 with third inverter c output terminal of second oscillator link 102, connect second inverter b input terminal of third oscillator link 103 with fourth inverter d output terminal of second oscillator link 102, realize the difference transformation to ring oscillator, make it no longer be limited by odd number level, and realized the good symmetry of territory, provide quadrature clock signal simultaneously, the control ring oscillator that the differential delay unit of design can be fine, 2 NMOS pipe N1 and N2 are as the input geminate transistors; PMOS tubes P1-P4 form a controllable load pair of the delay unit; the P5 and the P6 are connected in a diode mode, and are always in a saturation region when the circuit is conducted, so that the circuit plays a role of a resistor, the linear adjustment degree of the circuit is improved, the designed oscillation starting circuit can pull down the input end of one stage of delay unit when the oscillator does not work, so that the input end deviates from a balanced state, the oscillator has a large differential mode signal, and the oscillator can quickly enter a large-signal working state when the oscillator starts to work; after the oscillator is stably oscillated, the oscillation starting circuit is in a closed state, so that the power consumption is reduced, and VNVBSControlling the voltage, V, for the tail current sourceOP45Is connected to the input end of one of the stages. At initial state, VNVBSVery small, N5 is in off state, and the gate voltage of N4 is pulled to high level by P7, and N4 is turned on to turn VOP45And the voltage of the two ends of the input signal of the delay unit is unequal, a stable balanced state does not exist, and the large-signal working state can be immediately entered. Once the oscillator enters a stable oscillation state, VNVBSRising to turn on the N5 transistor, pulling the gate voltage of N4 low, turning the N4 transistor to off state, and pulling downThe circuit does not work, and power consumption can be effectively saved.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (5)
1. A jitter-free ring oscillator, comprising: the system comprises a power supply, a first oscillator link, a second oscillator link, a third oscillator link and a fourth oscillator link which are connected in a ring structure, wherein the first oscillator link is connected with the second oscillator link in series, the second oscillator link is connected with the third oscillator link in a cross mode, the third oscillator link is connected with the fourth oscillator link in series, the fourth oscillator link is connected with the first oscillator link in series, each oscillator link comprises a first inverter, a second inverter, a third inverter and a fourth inverter, the first oscillator link, the second oscillator link, the third oscillator link and the fourth oscillator link are respectively provided with a differential delay unit and a vibration starting circuit, and the first inverter, the second inverter, the third inverter and the fourth inverter are respectively coupled with power supply voltage through the power supply.
2. A jitter-free ring oscillator as claimed in claim 1, wherein: the first oscillator link, the second oscillator link and the fourth oscillator link comprise a first input terminal and a second input terminal; a first output terminal and a second output terminal; the first inverter and the second inverter receive input signals from a first input terminal and a second input terminal, respectively, and provide output signals at a first output terminal and a second output terminal, respectively, the third inverter and the fourth inverter each have an input terminal and an output terminal, the input terminal of the third inverter and the input terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively, and the output terminal of the third inverter and the output terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively.
3. A jitter-free ring oscillator as claimed in claim 1, wherein: the third oscillator stage comprises a first input terminal and a second input terminal; a first output terminal and a second output terminal; the first inverter and the second inverter receive input signals from the second input terminal and the first input terminal, respectively, and provide output signals at the second output terminal and the first output terminal, respectively, the third inverter and the fourth inverter each have an input terminal and an output terminal, the input terminal of the third inverter and the input terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively, and the output terminal of the third inverter and the output terminal of the fourth inverter are coupled to the first output terminal and the second output terminal of the oscillator section, respectively.
4. A jitter-free ring oscillator as claimed in claim 2 or 3, wherein: the first and second inverters are each larger than the third and fourth inverters.
5. A jitter-free ring oscillator as claimed in claim 1, wherein: the phase shift generated by the first oscillator link, the second oscillator link, the third oscillator link and the fourth oscillator link is 45 degrees.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921228193.0U CN210041780U (en) | 2019-07-31 | 2019-07-31 | Jitter-free ring oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921228193.0U CN210041780U (en) | 2019-07-31 | 2019-07-31 | Jitter-free ring oscillator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210041780U true CN210041780U (en) | 2020-02-07 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921228193.0U Expired - Fee Related CN210041780U (en) | 2019-07-31 | 2019-07-31 | Jitter-free ring oscillator |
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| CN (1) | CN210041780U (en) |
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2019
- 2019-07-31 CN CN201921228193.0U patent/CN210041780U/en not_active Expired - Fee Related
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