CN210040189U - Resistance-capacitance integrated chip device - Google Patents

Resistance-capacitance integrated chip device Download PDF

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Publication number
CN210040189U
CN210040189U CN201920994732.5U CN201920994732U CN210040189U CN 210040189 U CN210040189 U CN 210040189U CN 201920994732 U CN201920994732 U CN 201920994732U CN 210040189 U CN210040189 U CN 210040189U
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CN
China
Prior art keywords
electrode
resistance
film resistor
thin film
capacitance
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Active
Application number
CN201920994732.5U
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Chinese (zh)
Inventor
曹志学
彭小丽
常乐
唐涛
朱兰芳
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Chengdu Hongke Electronic Technology Co Ltd
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Chengdu Hongke Electronic Technology Co Ltd
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Priority to CN201920994732.5U priority Critical patent/CN210040189U/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

The utility model relates to an electronic components technical field discloses an integrative chip device of resistance-capacitance, include the ceramic medium body, set up in the first electrode of ceramic medium body lower surface and set up in the resistance-capacitance layer of ceramic medium body upper surface, the resistance-capacitance layer includes second electrode, sheet resistance and third electrode, the second electrode with sheet resistance's first end is connected, sheet resistance's second end with the third electrode is connected, be provided with the passageway between second electrode and the third electrode, the passageway is kept apart second electrode and third electrode. The utility model discloses integrate film resistor and chip condenser on a chip and make its series connection, reduce the welding number of times in the installation, improve performance and uniformity after the product installation, reduce installation area to in realize microelectronic device's miniaturization, integrate.

Description

Resistance-capacitance integrated chip device
Technical Field
The utility model relates to an electronic components technical field particularly, relates to an integrative chip device of resistance-capacitance.
Background
A ceramic chip capacitor is generally composed of a ceramic layer 1, a metal bottom electrode 2 and a metal top electrode 3, and its structure is shown in fig. 1 and 2.
The thin film resistor is made of a thin film resistive layer material on a ceramic material and a metal electrode material, and has a structure as shown in fig. 3 and 4, including a ceramic layer 1, a bottom electrode 4 for soldering, a resistive layer 5, and a pair of electrodes 6 covering the resistive layer.
In microelectronic circuit applications, it is often necessary to connect a capacitor in parallel with a resistor string to perform a particular function. For example, in the design of microwave electronic devices, a chip capacitor with high reliability and high quality is connected in series and parallel with a film resistor, so as to achieve the purposes of resistance and capacitance regulation. As shown in fig. 5, the series mounting is performed by soldering a separate chip capacitor and the bottom electrode of the thin film resistor to a metal substrate 7, and then connecting the top electrode 3 of the chip capacitor to one electrode 6 of the thin film resistor through a gold wire or strip 8, and connecting the other electrode 6 of the thin film resistor to the circuit. The equivalent circuit diagram of the circuit mounted in the above manner is shown in fig. 6.
The above installation method mainly has the following defects: firstly, the performance loss of the capacitor and the resistor, such as the increase of the insertion loss of the capacitor, is caused by the existence of multiple welding processes and the like in the mounting process; two products are installed in series, the installation area of the products is large, miniaturization of microelectronic devices is not facilitated, the consistency problem exists after installation, and small differences in installation procedures can cause performance changes among the products, so that the performance differences of the installed products are large.
SUMMERY OF THE UTILITY MODEL
The utility model provides a resistance-capacitance integrated chip device integrates condenser and resistor to a chip to overcome above-mentioned defect.
The utility model adopts the technical proposal that: the utility model provides an integrative chip device of resistance-capacitance, includes the ceramic dielectric body, sets up in the first electrode of ceramic dielectric body lower surface and sets up in the resistance-capacitance layer of ceramic dielectric body upper surface, the resistance-capacitance layer includes second electrode, sheet resistance and third electrode, the second electrode with sheet resistance's first end is connected, sheet resistance's second end with the third electrode is connected, be provided with the passageway between second electrode and the third electrode, the passageway keeps apart second electrode and third electrode.
Further, the second electrode includes a bent extension portion, and the extension portion is connected to the thin film resistor.
Further, one side of the channel is adjacent to the second electrode, and the other side of the channel is adjacent to the extension portion, the thin film resistor and the third electrode.
Further, the channel is rectangular.
Further, the material of the thin film resistor is TaN or RuO2
Further, the material of the first electrode, the second electrode and the third electrode is gold.
The utility model has the advantages that:
the utility model discloses integrate film resistor and chip condenser on a chip and make its series connection, in the installation, with first electrode and circuit board welding, the third electrode access circuit can. The welding times in the installation process are reduced, the extra performance loss caused by the repeated welding process is reduced, the performance of the product after installation is improved, and the consistency of the product after installation is improved; and the mounting area is reduced, so that the miniaturization and integration of the microelectronic device are realized.
Drawings
FIG. 1 is a front view of a conventional chip capacitor;
FIG. 2 is a top view of a conventional chip capacitor;
fig. 3 is a front view of a conventional thin film resistor;
fig. 4 is a top view of a conventional thin film resistor;
FIG. 5 is a schematic diagram of a prior art series connection of a chip capacitor and a thin film resistor;
FIG. 6 is an equivalent circuit diagram of the connection shown in FIG. 5;
fig. 7 is a front view of the present invention;
fig. 8 is a top view of the present invention.
Reference numerals: 10-ceramic dielectric body, 11-first electrode, 20-resistance-capacitance layer, 21-second electrode, 22-thin film resistor, 23-third electrode, 24-channel, 25-extension part.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the accompanying drawings.
Referring to fig. 7 and 8, a resistance-capacitance integrated chip device includes a ceramic dielectric body 10, a first electrode 11 disposed on a lower surface of the ceramic dielectric body 10, and a resistance-capacitance layer 20 disposed on an upper surface of the ceramic dielectric body 10, where the resistance-capacitance layer 20 includes a second electrode 21, a thin film resistor 22, and a third electrode 23, the second electrode 21 is connected to a first end of the thin film resistor 22, a second end of the thin film resistor 22 is connected to the third electrode 23, a channel 24 is disposed between the second electrode 21 and the third electrode 23, and the channel 24 isolates the second electrode 21 from the third electrode 23, so as to implement series connection between the second electrode 21 and the thin film resistor 22. The second electrode 21 includes a bent extension portion 25, and the extension portion 25 is connected to the thin film resistor 22. For the convenience of manufacturing, the channel 24 is configured to be rectangular, one side of the channel 24 is adjacent to the second electrode 21, and the other side of the channel 24 is adjacent to the extension portion 25, the thin film resistor 22, and the third electrode 23.
The preparation process of the resistance-capacitance integrated chip device comprises the following steps: firstly, preparing a thin film resistor on the upper surface of a ceramic dielectric body by a sputtering or printing process, and preparing a material of the thin film resistorUsing TaN or RuO2. And secondly, depositing metal conductive electrode layers on the upper surface and the lower surface of the ceramic dielectric body, wherein the preparation process of the metal electrode layers can adopt film preparation methods such as sputtering, electroplating, printing and the like, and the metal conductive electrode layers are made of gold. And thirdly, photoetching the upper surface of the ceramic dielectric body by adopting a photoetching process to pattern the upper surface of the ceramic dielectric body, immediately etching off the gold layer in a set area of the ceramic dielectric body to form a non-conducting channel, and etching off the gold layer covering the surface of the thin film resistor to form a second electrode and a third electrode.
The utility model discloses integrate film resistor and chip condenser on a chip and make its series connection, in the installation, with first electrode and circuit board welding, the third electrode access circuit can. The welding times in the installation process are reduced, the extra performance loss caused by the repeated welding process is reduced, the performance of the product after installation is improved, and the consistency of the product is ensured; and the mounting area is reduced, so that the miniaturization and integration of the microelectronic device are realized.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (6)

1. A resistance-capacitance integrated chip device is characterized in that: the resistance-capacitance type capacitor comprises a ceramic dielectric body, a first electrode arranged on the lower surface of the ceramic dielectric body and a resistance-capacitance layer arranged on the upper surface of the ceramic dielectric body, wherein the resistance-capacitance layer comprises a second electrode, a thin film resistor and a third electrode, the second electrode is connected with the first end of the thin film resistor, the second end of the thin film resistor is connected with the third electrode, a channel is arranged between the second electrode and the third electrode, and the second electrode and the third electrode are isolated by the channel.
2. The rc-integrated chip device according to claim 1, wherein: the second electrode comprises a bent extension part, and the extension part is connected with the thin film resistor.
3. The rc-integrated chip device according to claim 2, wherein: one side of the channel is adjacent to the second electrode, and the other side of the channel is adjacent to the extension portion, the thin film resistor and the third electrode.
4. The rc-integrated chip device according to claim 3, wherein: the channel is rectangular.
5. The rc-integrated chip device according to claim 1, wherein: the thin film resistor is made of TaN or RuO2
6. The rc-integrated chip device according to claim 1, wherein: the first electrode, the second electrode and the third electrode are made of gold.
CN201920994732.5U 2019-06-28 2019-06-28 Resistance-capacitance integrated chip device Active CN210040189U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920994732.5U CN210040189U (en) 2019-06-28 2019-06-28 Resistance-capacitance integrated chip device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920994732.5U CN210040189U (en) 2019-06-28 2019-06-28 Resistance-capacitance integrated chip device

Publications (1)

Publication Number Publication Date
CN210040189U true CN210040189U (en) 2020-02-07

Family

ID=69349093

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201920994732.5U Active CN210040189U (en) 2019-06-28 2019-06-28 Resistance-capacitance integrated chip device

Country Status (1)

Country Link
CN (1) CN210040189U (en)

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