CN209784454U - PD + QC two-in-one test protocol board - Google Patents

PD + QC two-in-one test protocol board Download PDF

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Publication number
CN209784454U
CN209784454U CN201920163313.7U CN201920163313U CN209784454U CN 209784454 U CN209784454 U CN 209784454U CN 201920163313 U CN201920163313 U CN 201920163313U CN 209784454 U CN209784454 U CN 209784454U
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China
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control chip
protocol
function key
model
vcc
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CN201920163313.7U
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Chinese (zh)
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屈花甲
付仕伦
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DONGGUAN LIDE ELECTRONIC Co Ltd
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DONGGUAN LIDE ELECTRONIC Co Ltd
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Abstract

The utility model provides a two unification test protocol boards of PD + QC, includes the circuit board and designs Tpye-C interface, control chip, a plurality of function key and control switch on the circuit board, control chip and Tpye-C interface, a plurality of function key and control switch circuit connect, control chip includes VCC control chip U1, QC protocol control chip U2, QC protocol control chip U3 and PD protocol control chip U4, VCC control chip U1 and QC protocol control chip U3 and PD protocol control chip U4 electricity are connected, QC protocol control chip U2 and VCC control chip U1 and QC protocol control chip U3 circuit connection. The utility model discloses a design the mutual control cooperation of a plurality of control chip and control switch and a plurality of function key, can realize switching and the test to PD PPS or QC2.0 QC3.0 different modals.

Description

PD + QC two-in-one test protocol board
Technical Field
The utility model belongs to the technical field of the test technique and specifically relates to a two unification test protocol boards of PD + QC.
Background
the output end of the charger product is provided with a PD (Power Delivery) or QC (QuickCharge) quick charging port, which is a charging protocol with quick charging.
SUMMERY OF THE UTILITY MODEL
The utility model provides a to prior art not enough, the utility model provides a can be simultaneously to PD and QC test a two unification test protocol boards.
The technical scheme of the utility model is that: the utility model provides a two unification test protocol boards of PD + QC, includes the circuit board and designs Tpye-C interface, control chip, a plurality of function key and control switch on the circuit board, control chip and Tpye-C interface, a plurality of function key and control switch circuit connect, control chip includes VCC control chip U1, QC protocol control chip U2, QC protocol control chip U3 and PD protocol control chip U4, VCC control chip U1 and QC protocol control chip U3 and PD protocol control chip U4 electricity are connected, QC protocol control chip U2 and VCC control chip U1 and QC protocol control chip U3 circuit connection.
The control switches include a power switch SW1 and a mode switch SW2, the SW1 is switchable to a 5V or VBUS power mode, and the SW2 is switchable to a QC2/3 or PD/PPS mode.
There are 14 function keys on the circuit board.
The model of the VCC control chip U1 is LD6902, the model of the QC protocol control chip U2 is LD6902, the model of the QC protocol control chip U3 is OPO7CP, and the model of the PD protocol control chip U4 is LD 6710.
The utility model has the advantages that: the utility model discloses a design VCC control chip U1, VCC control chip U1, QC protocol control chip U2, QC protocol control chip U3 and PD protocol control chip U4 and the mutual control cooperation of control switch and a plurality of function key, can realize switching and testing to PD/PPS or QC2.0 QC3.0 different modals.
Drawings
Fig. 1 is a schematic structural diagram of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made with reference to the accompanying drawings:
As shown in fig. 1, a PD + QC two-in-one test protocol board includes a circuit board, and a Tpye-C interface, a control chip, a plurality of function keys and a control switch, which are designed on the circuit board, the control chip is connected to the Tpye-C interface, the plurality of function keys and the control switch through circuits, the control chip includes a VCC control chip U1, a QC protocol control chip U2, a QC protocol control chip U3 and a PD protocol control chip U4, the VCC control chip U1, the QC protocol control chip U3 and the PD protocol control chip U4 are electrically connected, and the QC protocol control chip U2, the VCC control chip U1 and the QC protocol control chip U3 are electrically connected.
The control switches include a power switch SW1 and a mode switch SW2, the SW1 is switchable to a 5V or VBUS power mode, and the SW2 is switchable to a QC2/3 or PD/PPS mode.
the circuit board is provided with 14 function keys which are respectively ~ function key 1, ~ function key 2, ~ function key 3, ~ function key 4, ~ function key 5, ~ function key 6, ~ function key 7, ~ function key 8, ~ function key 9, ~ function key 10, ~ function key 11, ~ function key 12, ~ function key 13 and ~ function key 14, when SW2 is switched to ~ PD/PPS mode, the function keys 1-7 are used for the PD mode, respectively represent PDO1, PDO2, PDO3, PDO4, PDO5, PDO6 and PDO7, the function keys 8-14 are used for the PPS mode, the function key 8 is PPS (V-20mV), the function key 9 is PPS (V +20mV), the function key 10 is the interconversion of PPS (3.3V and 11V), the function key 11 is ~ hardware reset key, the function key 11 is PPS (I +50 mV) and the function key 11 is ~ PPS (I-50 mA), the function key 11 is ~ function key 2, when the function key is switched to ~ QC (QC) 3V and 11, the function key is ~ QC 3V 2, the function key 26 is ~ function key 0.3V 3 mV, and the function key 0.3 is ~ QC 0.3 mV 0.3V 2, and the function key 2 is ~ QC3 mV 0.10 is ~ function key 2, and ~ QC3 mV 0.3 mV 2, and ~ function key 2, and ~.
The model of the VCC control chip U1 is LD6902, the model of the QC protocol control chip U2 is LD6902, the model of the QC protocol control chip U3 is OPO7CP, and the model of the PD protocol control chip U4 is LD 6710.
in embodiment 1, the PD3.0 mode is implemented by switching SW2 to the PD/PPS position, and pressing function keys 1-7 according to the expected VBUS value (e.g. 5V, 9V, 12V, 15V or 20V), so as to switch to the PD3.0 mode.
In embodiment 2, the PPS mode is switched to the PPS mode by switching SW2 to the PD/PPS position and sequentially pressing function key 8, function key 9, function key 12, function key 13, and function key 10.
in the embodiment 3, the QC2.0 mode is implemented by switching the SW2 ~ the QC2/3 position, pressing the function key 8 once ~ initialize, waiting 1 ~ 1.5 seconds, and then pressing the function key 1, the function key 2, the function key 3, and the function key 4 in sequence, so as ~ convert the mode into the QC2.0 mode.
in the embodiment 4, in the QC3.0 mode, the SW2 is first switched to the QC2/3 position, the function key 8 is pressed once to initialize, 1 to 1.5 seconds is waited, the function key 5 is pressed to enter the continuous mode, and the function key 7 and the function key 6 are sequentially pressed, so that the mode can be converted into the QC3.0 mode.
The foregoing embodiments and description have been provided to illustrate the principles and preferred embodiments of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which fall within the scope of the invention as claimed.

Claims (4)

1. A PD + QC two unification test protocol board which characterized in that: including the circuit board and design Tpye-C interface, control chip, a plurality of function key and control switch on the circuit board, control chip and Tpye-C interface, a plurality of function key and control switch circuit connect, control chip includes VCC control chip U1, QC protocol control chip U2, QC protocol control chip U3 and PD protocol control chip U4, VCC control chip U1 and QC protocol control chip U3 and PD protocol control chip U4 electricity are connected, QC protocol control chip U2 and VCC control chip U1 and QC protocol control chip U3 circuit connect.
2. The PD + QC in-one test protocol plate according to claim 1, wherein: the control switches include a power switch SW1 and a mode switch SW2, the SW1 is switchable to a 5V or VBUS power mode, and the SW2 is switchable to a QC2/3 or PD/PPS mode.
3. The PD + QC in-one test protocol plate according to claim 1, wherein: there are 14 function keys on the circuit board.
4. The PD + QC in-one test protocol plate according to claim 1, wherein: the model of the VCC control chip U1 is LD6902, the model of the QC protocol control chip U2 is LD6902, the model of the QC protocol control chip U3 is OPO7CP, and the model of the PD protocol control chip U4 is LD 6710.
CN201920163313.7U 2019-01-29 2019-01-29 PD + QC two-in-one test protocol board Active CN209784454U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920163313.7U CN209784454U (en) 2019-01-29 2019-01-29 PD + QC two-in-one test protocol board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920163313.7U CN209784454U (en) 2019-01-29 2019-01-29 PD + QC two-in-one test protocol board

Publications (1)

Publication Number Publication Date
CN209784454U true CN209784454U (en) 2019-12-13

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Family Applications (1)

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CN201920163313.7U Active CN209784454U (en) 2019-01-29 2019-01-29 PD + QC two-in-one test protocol board

Country Status (1)

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CN (1) CN209784454U (en)

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