CN209767567U - Multi-master RS485 bus system - Google Patents
Multi-master RS485 bus system Download PDFInfo
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- CN209767567U CN209767567U CN201921075916.8U CN201921075916U CN209767567U CN 209767567 U CN209767567 U CN 209767567U CN 201921075916 U CN201921075916 U CN 201921075916U CN 209767567 U CN209767567 U CN 209767567U
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Abstract
The utility model discloses a many owners RS485 bus system, including an at least communications facilities, communications facilities includes controller, RS485 communication chip, reverse circuit, and the input of reverse circuit is connected to the output of controller, and the input of RS485 communication chip is connected to the output of reverse circuit, and the RE end of RS485 communication chip, DI end ground connection. The DI end and the RE end of the RS485 chip are grounded, and data are sent through the sending enabling end, so that the function of sending and receiving data on the bus at any time is realized on the basis of not increasing the bus; and the interrupt end of the controller is connected to the data receiving end of the RS485 chip, the data is received at any time when the bus has data transmission, and when the bus is empty, the equipment sends data to the bus. The circuit has simple structure, reduces the failure probability and reduces the cost.
Description
Technical Field
The utility model belongs to the technical field of the RS485 communication technique and specifically relates to a many owners RS485 bus system is related to.
Background
when the RS485 communication chip is used, half-duplex and duplex communication is generally used, data cannot be received when the data are sent, otherwise, the data cannot be sent when the data are received, when multi-machine communication exists, one device is set as a host, other devices are set as slaves, the host can communicate with the slaves at any time, but the communication between the slaves and the host is controlled by the host; there is also a method in which devices are alternately master-slave connected to each other, so that each device cannot receive data on the bus at any time and cannot transmit data when the bus is empty, thereby reducing efficiency.
Therefore, how to implement that the device can send and receive data at any time is a problem to be solved urgently at present.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a many owners RS485 bus system is connected to the transmission enable end of RS485 chip through the transmission data end with the controller after backward, realizes sending at any time, receiving data.
The above technical scheme of the utility model can be realized through following technical scheme to the purpose:
The utility model provides a many owners RS485 bus system, includes an at least communications facilities, communications facilities includes controller, RS485 communication chip, reverse circuit, and the input of reverse circuit is connected to the output of controller, and the input of RS485 communication chip is connected to the output of reverse circuit.
The utility model discloses further set up to: the Tx end of the controller is connected with a reverse circuit, and the output of the reverse circuit is connected with the DE end of the RS485 communication chip.
The utility model discloses further set up to: the RE end and the DI end of the RS485 communication chip are grounded.
The utility model discloses further set up to: the inverter circuit includes an inverter.
The utility model discloses further set up to: and the Rx end of the control circuit is connected with the RO end of the RS485 communication chip.
The utility model discloses further set up to: one interrupt end of the control circuit is connected with the RO end of the RS485 communication chip.
The utility model discloses further set up to: the A end of the RS485 communication chip is connected with the pull-up resistor, and the B end of the RS485 communication chip is connected with the pull-down resistor.
Compared with the prior art, the utility model has the beneficial technical effects that:
1. The DI end and the RE end of the RS485 chip are grounded, and data are sent through the sending enabling end, so that the function of sending and receiving data on the bus at any time is realized on the basis of not increasing the bus;
2. Furthermore, an interrupt end of the controller is connected to a data receiving end of the RS485 chip, the data is received at any time when data is transmitted on the bus, and when the bus is empty, the equipment sends data to the bus.
3. Furthermore, each device can be used as a host at any time by one RS485 chip, and the efficiency is improved.
4. Furthermore, the circuit is simple in structure, fault probability is reduced, and cost is reduced.
Drawings
Fig. 1 is a schematic circuit diagram of an embodiment of the present invention;
Fig. 2 is a schematic circuit diagram of another embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
Detailed description of the invention
The utility model discloses a many owners RS485 bus system, including an at least communications facilities, communications facilities includes controller, RS485 communication chip, reverse circuit, and the input of reverse circuit is connected to the output of controller, and the input of RS485 communication chip is connected to the output of reverse circuit.
The Tx end of the controller is connected with a reverse circuit, and the output of the reverse circuit is connected with the DE end of the RS485 communication chip. The RE end and the DI end of the RS485 communication chip are grounded. And the Rx end of the control circuit is connected with the RO end of the RS485 communication chip. The A end of the RS485 communication chip is connected with the pull-up resistor, and the B end of the RS485 communication chip is connected with the pull-down resistor.
The inverter circuit includes an inverter.
The working principle of the circuit is as follows: when the DE end of the RS485 chip is low, the DI end is low in potential to prevent data transmission, and the A, B end is in a high-impedance state, and because the A end pulls up a resistor and the B end pulls down the resistor, the A end voltage is larger than the B end voltage;
When the DE end of the RS485 chip is high, the low potential of the DI end is transmitted to the output end, at the moment, the voltage of the B end is larger than that of the A end, and data signals are transmitted through the DE end.
The low potential of the RE end of the RS485 chip ensures that data on the bus can be transmitted to the RO end of the RS485 chip at any time, in other words, as long as data transmission exists on the bus, the controller can receive the data through the RS485 chip. Meanwhile, the data sent by the controller can also be received by the controller. The controller can send and receive data at any time.
Detailed description of the invention
Another embodiment of the present application is the same as the first embodiment, except that the RO terminal of the RS485 chip is further connected to an interrupt terminal of the controller.
On the basis of the first specific implementation mode, the working principle is additionally provided with the following components:
When the interrupt end of the controller receives the data start bit and generates an interrupt signal, the controller judges that data transmission exists on the bus, and therefore data transmission to the bus is stopped.
When the interrupt receives a free state on the bus, for example, when a high potential of 3 bytes indicates that the bus has a free state, the controller can send data to the bus.
When the controller 1 connected to the bus sends data to the bus, the other controllers connected to the bus receive the data start bit on the bus, determine that there is data transmission on the bus, and stop sending data to the bus. Any controller can be used as a host, data can be received and sent at any time, and efficiency is improved.
The embodiment of this specific implementation mode is the preferred embodiment of the present invention, not limit according to this the utility model discloses a protection scope, so: all equivalent changes made according to the structure, shape and principle of the utility model are covered within the protection scope of the utility model.
Claims (7)
1. The utility model provides a many owners RS485 bus system which characterized in that: the communication device comprises a controller, an RS485 communication chip and a reverse circuit, wherein the output of the controller is connected with the input of the reverse circuit, and the output of the reverse circuit is connected with the input of the RS485 communication chip.
2. the multi-master RS485 bus system of claim 1, wherein: the Tx end of the controller is connected with a reverse circuit, and the output of the reverse circuit is connected with the DE end of the RS485 communication chip.
3. The multi-master RS485 bus system of claim 1, wherein: the RE end and the DI end of the RS485 communication chip are grounded.
4. The multi-master RS485 bus system of claim 1, wherein: the inverter circuit includes an inverter.
5. The multi-master RS485 bus system of claim 1, wherein: and the Rx end of the control circuit is connected with the RO end of the RS485 communication chip.
6. The multi-master RS485 bus system of claim 5, wherein: one interrupt end of the control circuit is connected with the RO end of the RS485 communication chip.
7. The multi-master RS485 bus system of claim 1, wherein: the A end of the RS485 communication chip is connected with the pull-up resistor, and the B end of the RS485 communication chip is connected with the pull-down resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921075916.8U CN209767567U (en) | 2019-07-10 | 2019-07-10 | Multi-master RS485 bus system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921075916.8U CN209767567U (en) | 2019-07-10 | 2019-07-10 | Multi-master RS485 bus system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209767567U true CN209767567U (en) | 2019-12-10 |
Family
ID=68746201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921075916.8U Active CN209767567U (en) | 2019-07-10 | 2019-07-10 | Multi-master RS485 bus system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209767567U (en) |
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2019
- 2019-07-10 CN CN201921075916.8U patent/CN209767567U/en active Active
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