CN209419481U - It is a kind of to improve efficiency circuit and chip certainly - Google Patents

Abstract

It is a kind of to improve efficiency circuit and chip certainly, including main reduction voltage circuit, the input VIN of the main reduction voltage circuit to internal logic power supply VCC, it is depressured by LDO1 module, it is characterised in that: further include the biasing decompression branch in parallel with the main reduction voltage circuit, the biased electrical presser feet BIAS to internal logic power supply VCC of the biasing decompression branch, it is depressured by LDO2 module, when input voltage VIN and small supply voltage VCC pressure difference, main reduction voltage circuit conducting, bias voltage branch turn-on deadline；When input voltage VIN and big supply voltage VCC pressure difference, the bias voltage branch conducting, main reduction voltage circuit cut-off.The utility model reduces the calorific value of system, and the stand-by time of growth system reduces costs.

Description

It is a kind of to improve efficiency circuit and chip certainly

Technical field

The utility model relates to 19V or less voltage conversion arts, more specifically a kind of to improve efficiency circuit and core certainly Piece, the voltage conversion circuit powered more particularly to 12V and 5V.

Background technique

Voltage conversion circuit is applied to the electronic product of all light current power supply, such as electronic lock, notebook, Baffle Box of Bluetooth Deng.

The usual inefficiency of common voltage conversion circuit, when causing whole system standby applied to battery powered system Length shortens, and system heat generation amount becomes larger.In addition to solving problem above, usually by reducing the impedance of built-in chip type metal-oxide-semiconductor, increase The measures such as big inductance line footpath improve power conversion efficiency.But the internal resistance due to reducing built-in chip type metal-oxide-semiconductor and increase inductance The measures such as line footpath will lead to that cost largely rises and voltage conversion circuit occupied space becomes larger.

So developing what a kind of efficiency that voltage conversion circuit can be improved was of great significance.

Utility model content

In order to improve the efficiency of voltage conversion circuit, the purpose of the utility model is to provide it is a kind of from improve efficiency circuit and Chip.

In order to achieve the above object, the technical solution adopted in the utility model is as follows:

It is a kind of from improving efficiency circuit, including main reduction voltage circuit, the input VIN of the main reduction voltage circuit to internal logic Power VCC, is depressured by LDO1 module, it is characterised in that: and it further include the biasing decompression branch in parallel with the main reduction voltage circuit, The biased electrical presser feet BIAS of the biasing decompression branch is depressured to internal logic power supply VCC by LDO2 module,

When input voltage VIN and small supply voltage VCC pressure difference, main reduction voltage circuit conducting, bias voltage branch conducting is cut Only；When input voltage VIN and big supply voltage VCC pressure difference, the bias voltage branch conducting, main reduction voltage circuit cut-off.

Preferably, further include diode D1 with the LDO2 block coupled in series.

Preferably, supply voltage VCC voltage is 5V.

A kind of chip improves efficiency circuit including such as above-mentioned certainly.

Preferably, the chip is MP1463 chip, is connected after the one capacitor C4 of pin BST series connection of the chip with pin SW It connects, is connect after a pin SW series connection one inductance L1 and resistance R1 with pin FB；The pin VCC and a capacitor of the chip It is grounded after C5 connection；The pin FREQ of the chip is grounded after connecting with a resistance R3；The pin SS and a capacitor of the chip It is grounded after C3 connection.

Preferably, the pin VIN of the chip is connected with the capacitor C1, the DC of the chip stable for maintenance voltage Output VOUT is connected with a capacitor C2 for being used to filter.

Compared with prior art, the utility model at least has the advantages that

The utility model from improving efficiency circuit and chip, cut by main reduction voltage circuit and bias voltage branch by this circuit It changes, reduces consume, calorific value is low, improves the efficiency of conversion；The stand-by time of system is increased, is reduced costs.

Detailed description of the invention

Fig. 1 is the circuit diagram of an embodiment；

Fig. 2 is the circuit connection diagram of the chip of one embodiment.

Specific embodiment

The utility model is described further with reference to the accompanying drawings and examples.

Referring to Fig.1, circuit, including main decompression electricity are improved efficiency certainly for one kind that one embodiment of the utility model provides Road and biasing decompression branch, biasing decompression branch are associated with main reduction voltage circuit, the input VIN of the main reduction voltage circuit to internal logic Power VCC, is depressured by LDO1 module；The biased electrical presser feet BIAS of biasing decompression branch passes through to internal logic power supply VCC The decompression of LDO2 module, main reduction voltage circuit and biasing decompression branch can only have a conducting simultaneously.

When input voltage VIN and big internal logic power supply VCC pressure difference, that is, input voltage VIN and internal logic supply The pressure value of electric VCC is not close (for example input voltage VIN and internal logic power supply VCC are respectively 16V and 5V), since pressure difference is big, LDO1 bears great differential pressure, causes loss big, and low efficiency, calorific value is high, and bias voltage branch is connected at this time, main reduction voltage circuit Biased electrical presser feet BIAS, is connected to output end at this time by cut-off, because being reduction voltage circuit, output end voltage is smaller, output end electricity The voltage of pressure and supply voltage VCC are closer to, and LDO2 conducting, LDO1 cut-off, pressure difference is smaller, and calorific value is low, and entire DC/DC turns It changes high-efficient.

When input voltage VIN and small supply voltage VCC pressure difference, when pressure difference is smaller, that is, input voltage VIN and power supply The pressure value of voltage VCC is close, at this time main reduction voltage circuit conducting, bias voltage branch turn-on deadline；

Wherein, further include diode D1 with the LDO2 block coupled in series, this diode D1 is to prevent LDO1 to LDO2 Power supply, supply voltage VCC voltage are 5V.

As shown in Fig. 2, the utility model also protects a kind of chip, circuit is improved efficiency certainly including above-mentioned.This chip is not It needs as existing general technical solution, is arranged by internal resistance and the increase inductance line footpath etc. that reduce the metal-oxide-semiconductor of built-in chip type It applies, not will lead to the rising of cost, reduce cost.The chip is MP1463 chip, the one capacitor C4 of pin BST series connection of chip It connect with pin SW, is connect after a pin SW series connection one inductance L1 and resistance R1 with pin FB, the one end resistance R2 and chip Pin FB connection other end ground connection；One end of one capacitor C5 and the pin VCC connection of chip, other end ground connection；One resistance R3's The connection of the pin of one end and chip, other end ground connection；One end of one capacitor C3 and the pin SS connection of chip, other end ground connection. The pin VIN of chip is connected with the capacitor C1 stable for maintenance voltage, and the DC output VOUT of the chip is connected with for filtering The capacitor C2 of wave.FB realizes that OVP is protected by the ratio of R1 and R2 resistance.

When input is much larger than 5V (such as when 16V), LDO1 module bears great differential pressure, causes loss big, low efficiency, hair Heat is high.At this time by the way that BIAS is connected to the output end VOUT, because of reduction voltage circuit, output end voltage is smaller, output end voltage It is closer to the voltage of internal logic power supply VCC, so LDO2 module is connected, the cut-off of LDO1 module.Compared with small pressure difference, cause LDO2 loss is small, and calorific value is low, entire DC/DC high conversion efficiency.

When output and input VOUT it is all very low when, such as input in 5V hereinafter, two metal-oxide-semiconductor driving voltages are low in chip body In 5V, cause metal-oxide-semiconductor fully on, the internal resistance of metal-oxide-semiconductor will become larger, and then cause transfer efficiency low, and calorific value is big, this When chip BAIS pin by external 5V, the cut-off of LDO1 module, the conducting of LDO2 module, supply voltage VCC connects by BIAS pin The 5V entered realizes that the turn-on effect of internal MOS is good, impedance becomes smaller, and efficiency is got higher.

Wherein, it is 1M Ω, R2 324K which, which is 22 μ F × 2, R1 for 4.7 μ H, C2 for 1 μ F, L1 for 10 μ F × 2, C4, Ω, C5 are that 1 μ F, R3 is 165K Ω, C3 12nF, from the DC of the pin of chip access 12V, obtain the DC that VOUT is 3.3V.

The utility model is described in detail above by specific embodiment, these detailed description are only limited to The content of the utility model is helped skilled in the art to understand, the limit to scope of protection of the utility model can not be interpreted as System.Those skilled in the art should all wrap various retouchings, the equivalent transformation etc. that above scheme carries out under the utility model design It is contained in the protection scope of the utility model.

Claims (6)

1. a kind of from circuit, including main reduction voltage circuit is improved efficiency, the input VIN of the main reduction voltage circuit powers to internal logic VCC is depressured by LDO1 module, it is characterised in that: and it further include the biasing decompression branch in parallel with the main reduction voltage circuit, it is described The biased electrical presser feet BIAS of biasing decompression branch is depressured to internal logic power supply VCC by LDO2 module,

When input voltage VIN and small supply voltage VCC pressure difference, main reduction voltage circuit conducting, bias voltage branch turn-on deadline；When When input voltage VIN and big supply voltage VCC pressure difference, the bias voltage branch conducting, main reduction voltage circuit cut-off.

2. according to claim 1 improve efficiency circuit certainly, it is characterised in that: further include and the LDO2 block coupled in series Diode D1.

3. according to claim 2 improve efficiency circuit certainly, it is characterised in that: supply voltage VCC voltage is 5V.

4. a kind of chip, it is characterised in that: improve efficiency circuit certainly including as described in any one of claims 1-3.

5. chip according to claim 4, it is characterised in that: the chip is MP1463 chip, the pin of the chip It connect after one capacitor C4 of BST series connection with pin SW, is connect after the pin SW series connection one inductance L1 and resistance R1 with pin FB；Institute State chip pin VCC connect with a capacitor C5 after be grounded；The pin FREQ of the chip is grounded after connecting with resistance R3；It is described The pin SS of chip is grounded after connecting with capacitor C3.

6. chip according to claim 5, it is characterised in that: the pin VIN of the chip is connected with for maintenance voltage The output VOUT of stable capacitor C1, the chip are connected with the capacitor C2 for filtering.