CN209357053U - A kind of spaceborne relay switch card based on PXI bus testing system - Google Patents

Abstract

The utility model discloses a kind of spaceborne relay switch card based on PXI bus testing system, comprising: power module, PXI bus interface module, FPGA control module and order-driven module；Order-driven module includes: watchdog reset circuit, monostable multi-frequency generator circuit, high speed d type flip flop circuit and darlington transistor array circuit with reset function；+ 12V power supply is converted to+28V power supply by power module, is connected to order-driven module；FPGA control module is used for control instruction drive module and FLASH memory, to realize the switching of relay and the storage of switching times.The utility model can automatically record the switching times of every channel relay, effectively prevent the relay false triggering of board electrification reset process, so as to technology for eliminating risk and improve testing efficiency.

Description

A kind of spaceborne relay switch card based on PXI bus testing system

Technical field

The utility model relates to satellite tests and field of measuring technique, are based on PXI bus test system more particularly, to one kind The spaceborne relay switch card of system.

Background technique

Equipment is tested and measured using high reliability, standardized modularized hardware product, so that defending based on PXI bus The automatization test system scalability that star tests and measures technical field is strong, and good compatibility is spaceborne so as to quickly finish Product tests and measures.

Currently, Satellite Product test is a kind of electronic product test of complexity, comprising power supply, interface, remote control, telemetering, lead to The various aspects such as letter, number biography, it is desirable that test macro has automatic flow execution, long-life and highly reliable ability.It is existing Relay switch card based on PXI bus testing system is both needed to external direct current power supply when working normally, if there is more relays It needs to switch, needs the power supply line by every relay in the external cable of board to lead to DC power supply, wiring is cumbersome；Relay Switching circuit directly uses the open-drain way of output of field effect transistor, errorless triggering protection design, electrification reset and makes The switching of false triggering relay is understood with the output state of process, therefore needs to pull out relay board connection cables when use, no Conducive to the automatic test of Satellite Product.

Summary of the invention

In view of the deficiencies of the prior art, the utility model provides a kind of spaceborne relay based on PXI bus testing system Switch card is effectively prevent in board electrification reset and use process to automatically record the switching times of every channel relay Relay false triggering, so as to technology for eliminating risk and improve testing efficiency.

The present invention is that technical solution used by solving its technical problem is:

A kind of the characteristics of spaceborne relay switch card based on PXI bus testing system of the invention is the spaceborne relay Device switch card includes: power module, PXI bus interface module, FPGA control module and order-driven module；

The power module is used to be converted to PXI case back plate+12V power supply+28V power supply, and itself is exported+ 28V power end and GND signal end are connected to VDD power end and the end GND of described instruction drive module, the journey of the power module Control end RM is connected to the I/O pin of the FPGA control module, for controlling the output and closing of the power module；

The FPGA control module generates the pulse signal of Transistor-Transistor Logic level by the I/O pin of itself and is respectively supplied to institute Switching and the FLASH memory of itself that order-driven module loads for realizing relay are stated for recording each channel Relay add up switching times；

Described instruction drive module includes: watchdog reset circuit, the monostable multi-frequency generator electricity with reset function Road, high speed d type flip flop circuit and darlington transistor array circuit；

The watchdog reset circuit generates RESET signal in power up and is connected to the FPGA control module Input pin is resetted, the RESET signal is supplied to the CLR of the monostable multi-frequency generator circuit after phase inverter is handled End, for preventing the relay false triggering of electrification reset process；

The I/O pin of the FPGA control module generates FPGA_CTR control signal and is respectively supplied to the monostable multifrequency The end CLK of the port A of pierce circuit and the high speed d type flip flop circuit；

After the monostable multi-frequency generator circuit controls signal according to the RESET signal and FPGA_CTR received, by interior Portion's high-precision RC clock circuit generates pulse signal Q, and is supplied to the end CLR of the high speed d type flip flop circuit；

Relay switch-over control signal D1~D8 that the I/O pin of the FPGA control module generates is provided to the high speed D type flip flop circuit；

The high speed d type flip flop circuit according to the FPGA_CTR signal and relay switch-over control signal D1 received~ D8 generates control wave Q1~Q7 and passes to the darlington transistor array circuit, for driving the Darlington Transistor array circuit；

1IN~7IN pin of the darlington transistor array circuit receives the control wave Q1~Q7 respectively, If in control wave Q1~Q7 any one control wave Qi be high level, by relay switching signal export to Relay Relay_i, i=1,2 ... ... corresponding to high level, 7.

Compared with the prior art, the beneficial effects of the utility model are embodied in:

It, can be total with large number of goods shelf products 1. the utility model is the 3U product based on PXI bus testing system With the spaceborne product test platform of composition, and without external direct current power supply, to simplify test platform composition, realize automatic Change test, improves testing efficiency.

2. the utility model order-driven module uses monostable multi-frequency generator circuit, high speed D with reset function to touch Hair device circuit phase and darlington transistor array circuit are combined, and board electrification reset process has used watchdog circuit to export Reset signal is enabled as output, the false triggering of relay is effectively prevented, to eliminate technical risk；

3. the utility model FPGA control module uses FLASH memory, Transistor-Transistor Logic level is generated by the I/O pin of itself Pulse signal control FLASH memory, can automatically record every channel spaceborne relay add up switching times.

4. the utility model has been used equipped with the internal darlington transistor array circuit for inhibiting diode, small in size, section Cost has been saved, the spaceborne relay of multichannel can be driven.

Detailed description of the invention

Fig. 1 is the functional block diagram of the utility model；

Fig. 2 is the hardware block diagram of the utility model；

Fig. 3 is the schematic diagram of the utility model order-driven module.

Specific embodiment

In the present embodiment, as shown in Figure 1, a kind of spaceborne relay switch card based on PXI bus testing system, this is spaceborne Relay switch card includes: power module, PXI bus interface module, FPGA control module and order-driven module；Host computer is logical It crosses PXI bus and sends control instruction to FPGA control module, FPGA control module parses the instruction received, control electricity The output of source module is enabled, and the pulse signal for sending Transistor-Transistor Logic level completes the switching of relay to order-driven module.

As shown in Fig. 2, power module is used to PXI case back plate+12V power supply passing through novel isolated high-performance DC-DC Converter is converted to+28V power supply, and+28V the power end of itself output and GND signal end are connected to order-driven module VDD power end and the end GND, the instruction power as relay reduce the use of the external cable of board, power module it is program-controlled End RM is connected to the I/O pin of FPGA control module, for controlling the output and closing of power module；

FPGA control module generates the pulse signal of Transistor-Transistor Logic level by the I/O pin of itself and is respectively supplied to instruction and drives Switching and the FLASH memory of itself that dynamic model block loads for realizing relay are used to record the relay in each channel Accumulative switching times；

As shown in figure 3, order-driven module includes: watchdog reset circuit, the monostable multifrequency vibration with reset function Swing device circuit, high speed d type flip flop circuit and darlington transistor array circuit；

Watchdog reset circuit generates RESET signal in power up and is connected to the reset input of FPGA control module Pin.RESET signal generates RESET/ signal after phase inverter is handled, and is supplied to monostable multi-frequency generator circuit D1's The end CLR makes the output end signal Q of monostable multi-frequency generator circuit D1 keep low electricity during FPGA control module electrification reset Flat, so that high speed d type flip flop circuit D2 output end signal Qi be made to keep low level, Qi is exported to darlington transistor array circuit D3, for preventing the relay false triggering of power up；I=1,2 ..., 7；

The I/O pin of FPGA control module generates FPGA_CTR control signal and is respectively supplied to monostable multi-frequency generator electricity The port A on road and the end CLK of high speed d type flip flop circuit；

After monostable multi-frequency generator circuit controls signal according to the RESET signal and FPGA_CTR received, by internal high Precision RC clock circuit generates pulse signal Q, the pulse width t of pulse signal Q_wIt is determined, and provided by resistance R1 and capacitor C1 To the end CLR of high speed d type flip flop circuit, high speed d type flip flop electricity is removed after FPGA control module completes relay switching control The output of road D2, so that signal Qi exports low level, so that the relay for preventing the I/O pin of FPGA control module from generating accidentally touches Hair, i=1,2 ... ..., 7；

Relay switch-over control signal D1~D8 that the I/O pin of FPGA control module generates is provided to high speed d type flip flop Circuit；

High speed d type flip flop circuit is produced according to the FPGA_CTR signal and relay switch-over control signal D1~D8 received Raw control wave Q1~Q7 simultaneously passes to darlington transistor array circuit, for driving darlington transistor array electric Road；

1IN~7IN pin of darlington transistor array circuit receives control wave Q1~Q7 respectively, if control arteries and veins Rushing any one control wave Qi in signal Q1~Q7 is high level, then exports relay switching signal and give high level institute Corresponding relay Relay_i, i=1,2 ... ..., 7.

Claims (1)

1. a kind of spaceborne relay switch card based on PXI bus testing system, characterized in that the spaceborne relay switch card It include: power module, PXI bus interface module, FPGA control module and order-driven module；

The power module is used to be converted to PXI case back plate+12V power supply+28V power supply, and+the 28V of itself output is electric Source and GND signal end are connected to VDD power end and the end GND of described instruction drive module, the program-controlled end of the power module RM is connected to the I/O pin of the FPGA control module, for controlling the output and closing of the power module；

The FPGA control module generates the pulse signal of Transistor-Transistor Logic level by the I/O pin of itself and is respectively supplied to the finger The switching for enabling drive module load for realizing relay and the FLASH memory of itself be used to record each channel after Electric appliance adds up switching times；

Described instruction drive module includes: watchdog reset circuit, monostable multi-frequency generator circuit, height with reset function Fast d type flip flop circuit and darlington transistor array circuit；

The watchdog reset circuit generates RESET signal in power up and is connected to the reset of the FPGA control module Input pin, the RESET signal are supplied to the end CLR of the monostable multi-frequency generator circuit after phase inverter is handled, and use In the relay false triggering for preventing electrification reset process；

The I/O pin of the FPGA control module generates FPGA_CTR control signal and is respectively supplied to the monostable multi-frequency oscillation The end CLK of the port A of device circuit and the high speed d type flip flop circuit；

After the monostable multi-frequency generator circuit controls signal according to the RESET signal and FPGA_CTR received, by internal high Precision RC clock circuit generates pulse signal Q, and is supplied to the end CLR of the high speed d type flip flop circuit；

Relay switch-over control signal D1~D8 that the I/O pin of the FPGA control module generates is provided to the high speed D touching Send out device circuit；

The high speed d type flip flop circuit is produced according to the FPGA_CTR signal and relay switch-over control signal D1~D8 received Raw control wave Q1~Q7 simultaneously passes to the darlington transistor array circuit, for driving the Darlington transistor Array circuit；

1IN~7IN pin of the darlington transistor array circuit receives the control wave Q1~Q7 respectively, if control Any one control wave Qi is high level in pulse signal Q1~Q7 processed, then exports relay switching signal to high electricity Put down corresponding relay Relay_i, i=1,2 ... ..., 7.