CN209330079U - A kind of sef-adapting filter instructional device based on DSP - Google Patents
A kind of sef-adapting filter instructional device based on DSP Download PDFInfo
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- CN209330079U CN209330079U CN201920219740.2U CN201920219740U CN209330079U CN 209330079 U CN209330079 U CN 209330079U CN 201920219740 U CN201920219740 U CN 201920219740U CN 209330079 U CN209330079 U CN 209330079U
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- 230000010363 phase shift Effects 0.000 claims abstract description 11
- 238000001914 filtration Methods 0.000 claims abstract description 8
- 239000003990 capacitor Substances 0.000 claims description 20
- 230000005611 electricity Effects 0.000 claims description 5
- 238000004088 simulation Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
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Abstract
The utility model discloses a kind of sef-adapting filter instructional device based on DSP, noise signal and useful signal input analog adder, enter phase shifter after the add operation of analog adder and carry out phase shift operation with harmonic carcellation, signal realizes filtering by operation in digital signal processor after phase shift.The utility model artificially inputs useful signal and interference signal, using the program built in digital signal processor, student is helped to understand the basic principle of filtering.This and structure are easy to use simultaneously.
Description
Technical field
The present invention relates to a kind of sef-adapting filter instructional device based on DSP, belongs to instruments used for education field.
Background technique
Filtering is a key concept in signal processing.Filtering divides classical filter and modern filtering.Classical filter is exactly
It is come out according to Fourier analysis and shift design, only the signal component within the scope of certain frequency is allowed to pass through, and prevented another
Component frequency ingredient passes through.Actually any one electronic system frequency bandwidth all with oneself, frequency characteristic reflect
This basic characteristics of electronic system.And filter, then it is the influence according to circuit parameter to circuit frequency bandwidth and designs
The engineer application circuit come.
Traffic filter is used to filter out useful signal from input signal, filters out garbage signal.Its principle is: utilizing
The range of the amplitude-frequency characteristic of circuit, passband is set as the range of useful signal, and other spectrum components are filtered out.
Summary of the invention
Goal of the invention: the utility model proposes a kind of sef-adapting filter instructional device based on DSP, structure are simply easy
With.
Technical solution: the technical solution of the utility model is a kind of sef-adapting filter instructional device based on DSP, noise
Signal inputs digital signal processor all the way, and another way inputs analog adder with useful signal together, by analog adder
Add operation after enter phase shifter carry out phase shift operation with harmonic carcellation, signal passes through in digital signal processor after phase shift
Filtering is realized in operation.
The analog adder includes the first amplifier, the inverting input terminal of the first amplifier by the 5th resistance eutral grounding, and its
Normal phase input end then two-way input signal in parallel, input signal passes sequentially through the third capacitor and the 6th resistance being serially connected all the way
Normal phase input end is accessed, and another way input signal then passes sequentially through the 4th capacitor being serially connected and the 7th resistance access positive
Input terminal is connected to the 8th resistance between the inverting input terminal and output end of the first amplifier.
The third capacitor and the 4th capacitor are 0.1 μ F, the 5th resistance, the 6th resistance, the 7th resistance and the 8th
Resistance is 51k Ω.
The phase shifter includes the second amplifier and third amplifier being serially connected, on the one hand the input signal of phase shifter passes through
First resistor accesses the inverting input terminal of the second amplifier, and the positive on the other hand also accessing the second amplifier by slide rheostat is defeated
Enter end, the normal phase input end of the second amplifier is by the 5th capacity earth, between the second amplifier inverting input terminal and output end also
3rd resistor is connected to as feedback loop, the reverse phase that the output signal of the second amplifier accesses third amplifier by second resistance is defeated
Enter end, the normal phase input end of third amplifier is on the other hand also accessed by slide rheostat, the normal phase input end of third amplifier is logical
The second capacity earth is crossed, the 4th resistance is also connected between third amplifier inverting input terminal and output end as feedback loop.
The first resistor, second resistance, 3rd resistor and the 4th resistance are 51k Ω, and the 5th capacitor is 47 μ F,
Second capacitor is 0.01 μ F.
The digital signal processor includes that dsp chip and the clock circuit connecting with dsp chip and power supply are multiple again
Position circuit.
The utility model has the advantages that the utility model artificially inputs useful signal and interference signal, using in digital signal processor
The program set helps student to understand the basic principle of filtering.This and structure are easy to use simultaneously.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the present apparatus；
Fig. 2 is analog adder circuit diagram；
Fig. 3 is phase shifter circuit figure.
Specific embodiment
In the following with reference to the drawings and specific embodiments, the utility model is furtherd elucidate, it should be understood that these embodiments are only used for
Illustrate the present invention rather than limit the scope of the invention, after the present invention has been read, those skilled in the art are to the present invention
The modifications of various equivalent forms fall within the application range as defined in the appended claims.
As shown in Figure 1, the present embodiment is the instructional device of the sef-adapting filter based on DSP, including the mould being sequentially connected in series
Quasi- adder, phase shifter and digital signal processor.Wherein digital signal processor include again dsp chip and with DSP core
The clock circuit and power reset circuit of piece connection.
Main design thought is: useful signal and interference signal input analog adder together, after adder operation
An output signal is exported, which is the sum of useful signal and interference signal.Then the output signal is inputted into phase shift
Device, each point frequency all passes through 0 ° of -180 ° of manual Continuous phase shifting in phase shifter, obtains signal after phase shift, then will believe after phase shift again
Number and interference signal input digital signal processor.Adder can introduce many harmonic signals in operation, therefore pass through shifting
The phase shift operation of phase device reduces the influence of these harmonic signals.As digital signal processor least mean square algorithm built in it
(LMS) program filters the interference signal after phase shift in signal, exports the waveform of useful signal.
The main component of the analog adder is the inverting input terminal of the first amplifier OP1, the first amplifier OP1 by the 5th
Resistance R5 ground connection, and its normal phase input end then two-way input signal in parallel, input signal passes sequentially through the be serially connected all the way
Three capacitor C3 and the 6th resistance R6 access normal phase input end, and another way input signal then passes sequentially through the 4th electricity being serially connected
Hold C4 and the 7th resistance R7 and accesses normal phase input end.Is connected between the inverting input terminal and output end of the first amplifier OP1
Eight resistance R8.The third capacitor C3 and the 4th capacitor C4 is 0.1 μ F, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7
It is 51k Ω with the 8th resistance R8.
The phase shifter includes the second amplifier OP2 and third amplifier OP3 being serially connected.One side of input signal of phase shifter
The inverting input terminal of the second amplifier OP2 is accessed in face by first resistor R1, on the other hand also passes through slide rheostat access second
The normal phase input end of amplifier OP2.The normal phase input end of second amplifier OP2 is grounded by the 5th capacitor C5.It is anti-in the second amplifier OP2
3rd resistor R3 is also connected between phase input terminal and output end as feedback loop.The output signal of second amplifier OP2 passes through
Second resistance R2 accesses the inverting input terminal of third amplifier OP3, on the other hand also accesses third amplifier OP3 by slide rheostat
Normal phase input end.The normal phase input end of third amplifier OP3 is grounded by the second capacitor C2.In third amplifier OP3 anti-phase input
The 4th resistance R4 is also connected with as feedback loop between end and output end.The output signal of third amplifier OP3 is as phase shifter
Output.The first resistor R1, second resistance R2,3rd resistor R3 and the 4th resistance R4 are 51k Ω.5th capacitor
C5 is that 47 μ F, the second capacitor C2 are 0.01 μ F.
As previously mentioned, digital signal processor includes dsp chip and the clock circuit and electricity that connect with dsp chip again
Source reset circuit.The dsp chip uses TMS320F28335, and surrounding auxiliary circuit includes clock circuit and power reset
Circuit is built according to method in the prior art.
Claims (6)
1. a kind of sef-adapting filter instructional device based on DSP, it is characterised in that: noise signal inputs at digital signal all the way
Device is managed, another way inputs analog adder with useful signal together, and phase shifter is entered after the add operation of analog adder
Phase shift operation is carried out with harmonic carcellation, signal realizes filtering by operation in digital signal processor after phase shift.
2. the sef-adapting filter instructional device according to claim 1 based on DSP, it is characterised in that: the simulation adds
Musical instruments used in a Buddhist or Taoist mass includes the first amplifier (OP1), and the inverting input terminal of the first amplifier (OP1) is grounded by the 5th resistance (R5), and its positive
Input terminal then two-way input signal in parallel, input signal passes sequentially through the third capacitor (C3) and the 6th resistance being serially connected all the way
(R6) normal phase input end is accessed, and another way input signal then passes sequentially through the 4th capacitor (C4) and the 7th resistance being serially connected
(R7) normal phase input end is accessed, the 8th resistance (R8) is connected between the inverting input terminal and output end of the first amplifier (OP1).
3. the sef-adapting filter instructional device according to claim 2 based on DSP, it is characterised in that: the third electricity
Hold (C3) and the 4th capacitor (C4) is 0.1 μ F, the 5th resistance (R5), the 6th resistance (R6), the 7th resistance (R7) and the 8th electricity
Hindering (R8) is 51k Ω.
4. the sef-adapting filter instructional device according to claim 1 based on DSP, it is characterised in that: the phase shifter
Including the second amplifier (OP2) and third amplifier (OP3) being serially connected, on the one hand the input signal of phase shifter passes through first resistor
(R1) inverting input terminal for accessing the second amplifier (OP2), on the other hand also passes through slide rheostat access the second amplifier (OP2)
The normal phase input end of normal phase input end, the second amplifier (OP2) is grounded by the 5th capacitor (C5), in the second amplifier (OP2) reverse phase
3rd resistor (R3) is also connected between input terminal and output end as feedback loop, the output signal of the second amplifier (OP2) is logical
The inverting input terminal of second resistance (R2) access third amplifier (OP3) is crossed, third is also on the other hand accessed by slide rheostat
The normal phase input end of the normal phase input end of amplifier (OP3), third amplifier (OP3) is grounded by the second capacitor (C2), is transported in third
It puts (OP3) and is also connected with the 4th resistance (R4) between inverting input terminal and output end as feedback loop.
5. the sef-adapting filter instructional device according to claim 4 based on DSP, it is characterised in that: first electricity
Hindering (R1), second resistance (R2), 3rd resistor (R3) and the 4th resistance (R4) is 51k Ω, and the 5th capacitor (C5) is 47 μ
F, the second capacitor (C2) are 0.01 μ F.
6. the sef-adapting filter instructional device according to claim 1 based on DSP, it is characterised in that: the number letter
Number processor includes dsp chip and the clock circuit and power reset circuit that connect with dsp chip again.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920219740.2U CN209330079U (en) | 2019-02-21 | 2019-02-21 | A kind of sef-adapting filter instructional device based on DSP |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920219740.2U CN209330079U (en) | 2019-02-21 | 2019-02-21 | A kind of sef-adapting filter instructional device based on DSP |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209330079U true CN209330079U (en) | 2019-08-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920219740.2U Active CN209330079U (en) | 2019-02-21 | 2019-02-21 | A kind of sef-adapting filter instructional device based on DSP |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209330079U (en) |
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2019
- 2019-02-21 CN CN201920219740.2U patent/CN209330079U/en active Active
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