CN209150704U - A kind of controller hardware protection circuit based on rest-set flip-flop - Google Patents
A kind of controller hardware protection circuit based on rest-set flip-flop Download PDFInfo
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- CN209150704U CN209150704U CN201821931726.7U CN201821931726U CN209150704U CN 209150704 U CN209150704 U CN 209150704U CN 201821931726 U CN201821931726 U CN 201821931726U CN 209150704 U CN209150704 U CN 209150704U
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Abstract
The utility model discloses a kind of, and the controller hardware based on rest-set flip-flop protects circuit; it include power module, main control chip, the first buffer module, logic module, rest-set flip-flop module, the second buffer module, switch module and fault signal circuit, the fault signal circuit includes over current fault circuit, deadlock observation circuit, upper bridge fault secure circuit and lower bridge fault secure circuit；The technical solution carries out detection judgement processing to fault-signal using logic module, response time is short, it can be realized emergency progress hardware in electric machine controller and directly close wave operation, the response executed again by software detection, judgement is avoided to cause more serious failure or injury not in time, detection processing can be carried out to multiple fault-signals by logic judgment, maintenance cost is low.
Description
Technical field
The utility model relates to Motor Control Fields more particularly to a kind of controller hardware based on rest-set flip-flop to protect electricity
Road.
Background technique
It is right as New-energy electric vehicle development, the safe and reliable of electric machine controller are increasingly that major main engine plants are of interest
It is also gradually improved in the Preservation tactics of electric machine controller.Electric machine controller core component Master control chip MCU and power module
IGBT especially needs to guarantee the operation that its is safe and reliable.Its crash situation that happens suddenly is prevented in MCU chip operation, need to feed dog monitoring；
And IGBT opens shutdown in continuous high frequency in control operation, the detection circuit of periphery is even more to directly affect it to protect plan
Implementation slightly, different detection failures carry out different safeguard measures.
Chinese patent, publication number: publication date: 104779882 A of CN discloses a kind of logic guarantor on July 15th, 2015
Protection circuit and electric machine controller, including MCU system, AND gate circuit, latch cicuit and fault clearance circuit, the MCU system
System input terminal is connected with the latch cicuit output end, the MCU system output and the fault clearance circuit input end
It is connected, the latch cicuit input terminal is connected with the AND gate circuit output end and the fault clearance circuit output end respectively,
The MCU system control exports PWM signal and simultaneously determines whether to provide fault clearance signal, restores the latch cicuit function
Energy.The technical solution is swift in response to fault-signal, securely and reliably, but detection processing can only be carried out to independent failure, using model
It encloses small.
Utility model content
The mesh of the utility model is to solve electric machine controller to detect fault-signal operation response time length, fault-signal
Single and at high cost problem proposes a kind of controller hardware protection circuit based on rest-set flip-flop, can be realized motor
Emergency carries out hardware and directly closes wave operation in controller, avoid by software detection, judge the response that executes again not in time and
More serious failure or injury are caused, detection processing, maintenance cost can be carried out to multiple fault-signals by logic judgment
It is low.
To realize the above-mentioned technical purpose, a kind of technical solution provided by the utility model is, a kind of based on rest-set flip-flop
Controller hardware protects circuit, includes power module, main control chip, the first buffer module, logic module, rest-set flip-flop module
Module, the second buffer module and switch module, the power output end of the power module and the power supply of the main control chip draw
Foot electrical connection, the input terminal of first buffer module are electrically connected with the signal output pin of main control chip, first buffering
The signal output end of module is electrically connected with logic module, the enable end of first buffer module and the control terminal electricity of main control chip
Connection, the logic module signal output end are electrically connected with rest-set flip-flop module input, the output of the rest-set flip-flop module
End is electrically connected with the control terminal of second buffer module, and the control of the reset terminal and main control chip of the rest-set flip-flop module is drawn
Foot electrical connection, the output end of the rest-set flip-flop module are electrically connected with the test side of main control chip, second buffer module
Input terminal is electrically connected with the control pin of main control chip, the control of the output end and the switch module of second buffer module
End electrical connection.
Further, a kind of controller hardware protection circuit based on rest-set flip-flop further includes faulty signal electricity
Road, the fault signal circuit include over current fault protection circuit, deadlock observation circuit, upper bridge fault secure circuit with
And lower bridge fault secure circuit, the input terminal of the over current fault protection circuit are electrically connected with main control chip, the over current fault
The output end of circuit is protected to be electrically connected with the first buffer module control pin, the upper bridge fault secure circuit and lower bridge failure are protected
The driving end of protection circuit is electrically connected with main control chip, the output end of the upper bridge fault secure circuit and lower bridge fault secure circuit
It is electrically connected with logic module, the input terminal of the deadlock observation circuit is electrically connected with main control chip, the deadlock prison
The output end of slowdown monitoring circuit is electrically connected with logic module.In the present solution, main control chip output pwm signal control switch module run into
The conversion of row power exports lasting feeding-dog signal to carry out crash monitoring, and output makes to can control signal Enable control hardware mistake
Failure OC is flowed, rest-set flip-flop module clear signal Reset is exported；Crash monitoring signals, driving malfunction and hardware over current fault into
The operation of row logical AND latches fault-signal by rest-set flip-flop module after triggering one of them failure, latches output and believes
Number one routing MCU chip is detected, and is controlled the second buffer module all the way and then is directly turned off pwm signal output.
The over current fault protection circuit includes the output port Fault-T and lower bridge of the upper bridge fault secure circuit
The output port Fault-D of fault secure circuit, the output port Fault-T are electrically connected with the anode tap of diode D23, institute
The cathode terminal for stating diode D23 is electrically connected with the cathode terminal of diode D24, the anode tap of the diode D24 and the output
Port Fault-D electrical connection, the cathode terminal of the diode D24 are electrically connected with the first end of the R81 of resistance, the resistance
The second end of R81 is electrically connected with the B1 pin of electrical level transferring chip U43, the VCCB pin and 5V of the electrical level transferring chip U43
Power electric connection, the VCCA pin and 3.3V power electric connection of the electrical level transferring chip U43, the electrical level transferring chip U43
A1 pin be electrically connected with the electric foot A of logic module U44C, the B1 pin of the electrical level transferring chip U43 and logic module U44C
Electric foot B electrical connection, the A1 pin is electrically connected with the first end of capacitor C85 and resistance R97, the second end of the capacitor C85
Ground connection, the second end of the resistance R97 are electrically connected 3.3V power supply, the first end electricity of the B1 pin and capacitor C86 and resistance R98
Connection, the second end ground connection of the capacitor C86, the second end of the resistance R98 are electrically connected with the second end of the resistance R97,
The electric foot Y of the logic module U44C is electrically connected with the first end of resistance R82, and the second end of the resistance R82 is with resistance R83's
First end electrical connection, the second end ground connection of the resistance R83, the first end of the resistance R83 and the first end of capacitor C86 are electrically connected
It connects, the second end ground connection of the capacitor C86, the first end of the capacitor C86 is electrically connected with the base stage of triode Q2, three pole
The collector of pipe Q2 is electrically connected with the first end of resistance R79, the first end and 3.3V power electric connection of the resistance R79, described
The emitter of triode Q2 is grounded.In the present solution, the function of the over current fault protection circuit is transported mainly for motor high speed
The lower active three-phase shortcircuit operation carried out to avoid over-voltage breakdown IGBT of row, when high speed operation of motor, carry out active three-phase shortcircuit
Operation, three-phase circuit circuit can generate instantaneous large-current (being determined by motor body counter electromotive force and d axle inductance amount size), at this time
Over current fault can be triggered, is not shielded and be will cause hardware and directly open a way IGBT, active three-phase shortcircuit is lost and releases energy and anti-
The only initial purpose of IGBT over-voltage breakdown.
The deadlock observation circuit includes capacitor C182, the first end of the capacitor C182 and the control of main control chip
Pin electrical connection, the second end of the capacitor C182 is electrically connected with the first end of resistance R88, the second end of the resistance R88 and
The first end of resistance R90 is electrically connected, and the second end ground connection of the resistance R90, the first end of the resistance R90 is with triode Q4's
Base stage electrical connection, the emitter ground connection of the triode Q4, the first end of the collector and resistance R86 of the triode are electrically connected
It connects, the second end and 3.3V power electric connection of the resistance R86, the first end of the resistance R86 and the first end of capacitor C178
Electrical connection, the second end ground connection of the capacitor C178, the first end of the capacitor C178 and the anode tap of diode D22 are electrically connected
It connects, the cathode terminal of the diode D22 is electrically connected with the first end of resistance R87, the second end and resistance R89 of the resistance R87
First end electrical connection, the second end ground connection of the resistance R89, the first end electricity of the first end of the resistance R89 and capacitor C90
Connection, the second end ground connection of the capacitor C90, the first end of the capacitor C90 are electrically connected with the base stage of triode Q3, and described three
The emitter of pole pipe Q3 is electrically connected, and the collector of the triode Q3 is electrically connected with the first end of resistance R84, the resistance R84
Second end and 3.3V power electric connection, the first end of the resistance R84 is electrically connected with the anode tap of diode D21, described two
The cathode terminal of pole pipe is electrically connected with the collector of the triode Q2.In the present solution, being held in main control chip operation by an I/O port
Continuous output frequency believes square wave through capacitance C182, linear divider resistance R88, R90 not less than the square-wave signal of particular value
Number it is converted into pulse signal, pulse high level turn-on transistor Q4, discharged C178 capacitor, VCC is through R86 pairs when Q4 is turned off
C178 charges, and calculates R86, C178 parameter according to time demand, when guaranteeing that square-wave signal is greater than certain frequency, C178
Voltage is no more than 0.7V, and diode D22 tube voltage drop guarantees that rear class triode Q3 is not in conducting.When main control chip circuit occurs
When crash, square-wave signal becomes single high level or low level, and capacitance C182 and pull down resistor R90 make Q4 be in lasting
Situation is turned off, C178 persistently charges, and to will lead to rear class triode Q3 open-minded.
The rest-set flip-flop module includes, logic module U44A, logic module U44B, logic module U44D and outer
Portion's control circuit, the external control circuit include resistance R94, the first end of the resistance R94 and the control of control chip
Pin electrical connection processed, the second end of the resistance R94 are electrically connected with the electric foot B of logic module U44D, the A electricity of logic module U44D
Foot is electrically connected with the first end of resistance R92, the second end and 3.3V power electric connection of the resistance R92, the Y of logic module U44D
Electric foot is electrically connected with the first end of resistance R96, the second end ground connection of the resistance R96, the first end and resistance of the resistance R96
The first end of R95 is electrically connected, and the second end of the resistance R95 is electrically connected with the first end of capacitor C94, and the of the capacitor C94
Two ends ground connection, the first end of the capacitor C94 are electrically connected with the base stage of triode Q5, the emitter ground connection of the triode Q5,
The collector of the triode Q5 is electrically connected with the first end of resistance R93, and the of the second end of the resistance R93 and capacitor C179
One end electrical connection, the second end ground connection of the capacitor C179, the first end of the capacitor C179 and the first end of capacitor C93 are electrically connected
It connects, the second end ground connection of the capacitor C93, the first end of the capacitor C93 is electrically connected with the B electricity foot of logic module U44A, institute
The B electricity foot for stating logic module U44A is electrically connected with the first end of resistance R91, second end and 3.3V the power supply electricity of the resistance R92
Connection, the Y electricity foot of logic module U44A are electrically connected electrical connection, the A electricity foot of logic module U44A with the B electricity foot of logic module U44B
It is electrically connected with the Y electricity foot of logic module U44B, the A electricity foot of the logic module U44A and the collector of the triode Q3 are electrically connected
It connects, the Y electricity foot of the logic module U44B is electrically connected with the first end of the first end of resistance R157 and resistance R85 respectively, described
Resistance R157 second end is grounded by LED, the second end and 3.3V power electric connection of the resistance R85, the resistance R85's
First end is electrically connected with the first end of capacitor C87, the second end ground connection of the capacitor C87, the first end of the capacitor C87 and institute
State the control terminal electrical connection of the second buffer module.In the present solution, being attached the rest-set flip-flop mould of building by two NAND gates
Block avoids the problem that not capturing due to end pulse-triggered software using the characteristic that output is latched in the triggering of its S end signal.
The utility model has the beneficial effects that carrying out detection judgement processing, response time to fault-signal using logic module
It is short, it can be realized emergency progress hardware in electric machine controller and directly close wave operation, avoid being executed again by software detection, judgement
Response cause more serious failure or injury not in time, multiple fault-signals can be detected by logic judgment
Processing, maintenance cost are low.
Detailed description of the invention
Fig. 1 is the electrical block diagram of the utility model.
Fig. 2 is that the over current fault of the utility model protects circuit diagram.
Fig. 3 is the deadlock observation circuit figure of the utility model.
Fig. 4 is the rest-set flip-flop circuit diagram of the utility model.
Description of symbols in figure: 1- power module, 2- main control chip, the first buffer module of 3-, 4- logic module, 5-RS triggering
Device module, the second buffer module of 6-, 7- switch module, 11- over current fault protect circuit, the upper bridge fault secure circuit of 12-, 13-
Deadlock observation circuit, bridge fault secure circuit under 14-.
Specific embodiment
For the purpose of this utility model, technical solution and advantage is more clearly understood, with reference to the accompanying drawing and implement
Example is described in further detail the utility model, it should be appreciated that the specific embodiments described herein are only this realities
The protection scope of the utility model, ability are not limited only to explain the utility model with a kind of novel most preferred embodiment
It is practical new to belong to this for domain those of ordinary skill every other embodiment obtained without making creative work
The range of type protection.
Embodiment 1: as shown in Figure 1, a kind of controller hardware based on rest-set flip-flop protects circuit, it include power module
1, main control chip 2, the first buffer module 3, logic module 4, rest-set flip-flop module 5, the second buffer module 6 and switch module 7,
The power output end of the power module 1 is electrically connected with the power pins of the main control chip 2, first buffer module 3
Input terminal is electrically connected with the signal output pin of main control chip 2, the signal output end and logic module of first buffer module 3
4 electrical connections, the enable end of first buffer module 3 are electrically connected with the control terminal of main control chip 2,4 signal of logic module
Output end is electrically connected with 5 input terminal of rest-set flip-flop module, the output end of the rest-set flip-flop module 5 and second buffer module
6 control terminal electrical connection, the reset terminal of the rest-set flip-flop module 5 are electrically connected with the control pin of main control chip 2, the RS touching
The output end of hair device module 5 is electrically connected with the test side of main control chip 2, the input terminal and master control core of second buffer module 6
The control pin of piece 2 is electrically connected, and the output end of second buffer module 6 is electrically connected with the control terminal of the switch module 7.
Further, a kind of controller hardware protection circuit based on rest-set flip-flop further includes faulty signal electricity
Road, the fault signal circuit include over current fault protection circuit 11, deadlock observation circuit 13, upper bridge error protection electricity
The input terminal of road 12 and lower bridge fault secure circuit 14, the over current fault protection circuit 11 is electrically connected with main control chip 2, institute
The output end for stating over current fault protection circuit 11 is electrically connected with the first buffer module 3 control pin, the mountain bridge error protection electricity
Road and the driving end of lower bridge fault secure circuit 14 are electrically connected with main control chip 2, the upper bridge fault secure circuit 12 and lower bridge
The output end of fault secure circuit 14 is electrically connected with logic module 4, the input terminal of the deadlock observation circuit 13 and master control
Chip 2 is electrically connected, and the output end of the deadlock observation circuit 13 is electrically connected with logic module 4.In the present embodiment, master control core
The operation of 2 output pwm signal control switch module 7 of piece carries out power conversion, exports lasting feeding-dog signal to carry out crash monitoring,
Output makes to can control signal Enable control hardware over current fault OC, exports 5 clear signal Reset of rest-set flip-flop module；It crashes
Monitoring signals, driving malfunction and hardware over current fault carry out logical AND operation, pass through after one of them failure of triggering by rest-set flip-flop
Module 5 latches fault-signal, and latch output signal one routes MCU chip and detected, and controls the second buffering mould all the way
Block 6 directly turns off pwm signal output in turn.
As shown in Fig. 2, the over current fault protection circuit 11 includes the output end of the upper bridge fault secure circuit 12
The output port Fault-D, the output port Fault-T and diode D23 of mouth Fault-T and lower bridge fault secure circuit 14
Anode tap electrical connection, the cathode terminal of the diode D23 is electrically connected with the cathode terminal of diode D24, the diode D24's
Anode tap is electrically connected with the output port Fault-D, the first end electricity of the R81 of the cathode terminal and resistance of the diode D24
Connection, the second end of the R81 of the resistance are electrically connected with the B1 pin of electrical level transferring chip U43, the electrical level transferring chip U43
VCCB pin and 5V power electric connection, the VCCA pin of the electrical level transferring chip U43 and 3.3V power electric connection, the electricity
The A1 pin of flat conversion chip U43 is electrically connected with the electric foot A of logic module U44C, the B1 pin of the electrical level transferring chip U43
It is electrically connected with the electric foot B of logic module U44C, the A1 pin is electrically connected with the first end of capacitor C85 and resistance R97, the electricity
Hold the second end ground connection of C85, the second end of the resistance R97 is electrically connected 3.3V power supply, the B1 pin and capacitor C86 and resistance
The first end of R98 is electrically connected, and the second end ground connection of the capacitor C86, the second end of the resistance R98 is with the resistance R97's
Second end electrical connection, the electric foot Y of the logic module U44C are electrically connected with the first end of resistance R82, and the second of the resistance R82
End is electrically connected with the first end of resistance R83, the second end ground connection of the resistance R83, the first end and capacitor of the resistance R83
The first end of C86 is electrically connected, the second end ground connection of the capacitor C86, the first end of the capacitor C86 and the base stage of triode Q2
Electrical connection, the collector of the triode Q2 are electrically connected with the first end of resistance R79, the first end and 3.3V of the resistance R79
Power electric connection, the emitter ground connection of the triode Q2.In the present embodiment, the function of the over current fault protection circuit 11
Mainly for the active three-phase shortcircuit operation carried out under high speed operation of motor to avoid over-voltage breakdown IGBT, high speed operation of motor
The operation of Shi Jinhang active three-phase shortcircuit, three-phase circuit circuit can generate instantaneous large-current (by motor body counter electromotive force and d axis electricity
Sensibility reciprocal size determines), over current fault can be triggered at this time, shield and be will cause hardware and directly open a way IGBT, and active three is lost
The mutually short-circuit initial purpose released energy and prevent IGBT over-voltage breakdown.
As shown in figure 3, the deadlock observation circuit 13 includes capacitor C182, the first end of the capacitor C182 and master
The control pin electrical connection of chip 2 is controlled, the second end of the capacitor C182 is electrically connected with the first end of resistance R88, the resistance
The second end of R88 is electrically connected with the first end of resistance R90, the second end ground connection of the resistance R90, and the first of the resistance R90
End is electrically connected with the base stage of triode Q4, the emitter ground connection of the triode Q4, the collector and resistance R86 of the triode
First end electrical connection, the second end of the resistance R86 and 3.3V power electric connection, the first end and capacitor of the resistance R86
The first end of C178 is electrically connected, and the second end ground connection of the capacitor C178, the first end of the capacitor C178 is with diode D22's
Anode tap electrical connection, the cathode terminal of the diode D22 are electrically connected with the first end of resistance R87, the second end of the resistance R87
It is electrically connected with the first end of resistance R89, the second end ground connection of the resistance R89, the first end and capacitor C90 of the resistance R89
First end electrical connection, the second end ground connection of the capacitor C90, the base stage electricity of the first end of the capacitor C90 and triode Q3
Connection, the emitter electrical connection of the triode Q3, the collector of the triode Q3 are electrically connected with the first end of resistance R84,
The second end and 3.3V power electric connection of the resistance R84, the first end of the resistance R84 and the anode tap electricity of diode D21
Connection, the cathode terminal of the diode are electrically connected with the collector of the triode Q2.In the present embodiment, main control chip 2 is run
In by an I/O port continue output frequency not less than particular value square-wave signal, through capacitance C182, linear divider resistance
Square-wave signal is converted into pulse signal, pulse high level turn-on transistor Q4, discharged C178 capacitor by R88, R90, Q4
VCC charges to C178 through R86 when shutdown, R86, C178 parameter is calculated according to time demand, to guarantee that square-wave signal is greater than
When certain frequency, the voltage of C178 be no more than 0.7V, diode D22 tube voltage drop guarantee rear class triode Q3 be not in conducting.
When 2 circuit of main control chip crashes, square-wave signal becomes single high level or low level, capacitance C182 and drop-down
Resistance R90 is in Q4 persistently to turn off situation, and C178 persistently charges, and to will lead to rear class triode Q3 open-minded.
As shown in figure 3, the rest-set flip-flop module 5 includes, logic module U44A, logic module U44B, logic mould
Block U44D and external control circuit, the external control circuit include resistance R94, the first end of the resistance R94 with
The control pin electrical connection of chip is controlled, the second end of the resistance R94 is electrically connected with the electric foot B of logic module U44D, logic
The A electricity foot of module U44D is electrically connected with the first end of resistance R92, and the second end and 3.3V power electric connection of the resistance R92 are patrolled
The Y electricity foot for collecting module U44D is electrically connected with the first end of resistance R96, the second end ground connection of the resistance R96, the resistance R96
First end be electrically connected with the first end of resistance R95, the second end of the resistance R95 is electrically connected with the first end of capacitor C94, institute
The second end ground connection of capacitor C94 is stated, the first end of the capacitor C94 is electrically connected with the base stage of triode Q5, the triode Q5
Emitter ground connection, the collector of the triode Q5 is electrically connected with the first end of resistance R93, the second end of the resistance R93
It is electrically connected with the first end of capacitor C179, the second end ground connection of the capacitor C179, the first end and capacitor of the capacitor C179
The first end of C93 is electrically connected, and the second end ground connection of the capacitor C93, the first end of the capacitor C93 is with logic module U44A's
The electrical connection of B electricity foot, the B electricity foot of the logic module U44A are electrically connected with the first end of resistance R91, and the second of the resistance R92
End and 3.3V power electric connection, the Y electricity foot of logic module U44A are electrically connected electrical connection, logic with the B electricity foot of logic module U44B
The A electricity foot of module U44A is electrically connected with the Y electricity foot of logic module U44B, the A electricity foot of the logic module U44A and three pole
The collector of pipe Q3 is electrically connected, the Y electricity foot of the logic module U44B respectively with the first end of resistance R157 and resistance R85 the
One end electrical connection, the resistance R157 second end are grounded by LED, and second end and the 3.3V power supply of the resistance R85 is electrically connected
It connects, the first end of the resistance R85 is electrically connected with the first end of capacitor C87, the second end ground connection of the capacitor C87, the electricity
The first end for holding C87 is electrically connected with the control terminal of second buffer module 6.In the present embodiment, carried out by two NAND gates
The rest-set flip-flop module 5 for connecting building is avoided using the characteristic that output is latched in the triggering of its S end signal since end pulse-triggered is soft
The problem of part can not capture.
The specific embodiment of the above is that a kind of controller hardware based on rest-set flip-flop of the utility model protects electricity
The better embodiment on road, limits the specific implementation range of the utility model not with this, and the scope of the utility model includes simultaneously
It is not limited to present embodiment, equivalence changes made by all shape, structures according to the utility model are in the utility model
Protection scope in.
Claims (5)
1. a kind of controller hardware based on rest-set flip-flop protects circuit, it is characterised in that: include power module (1), master control
It chip (2), the first buffer module (3), logic module (4), rest-set flip-flop module (5) module, the second buffer module (6) and opens
It closing module (7), the power output end of the power module (1) is electrically connected with the power pins of the main control chip (2), and described the
The input terminal of one buffer module (3) is electrically connected with the signal output pin of main control chip (2), first buffer module (3)
Signal output end is electrically connected with logic module (4), the control of the enable end and main control chip (2) of first buffer module (3)
End electrical connection, logic module (4) signal output end are electrically connected with rest-set flip-flop module (5) input terminal, the rest-set flip-flop
The output end of module (5) is electrically connected with the control terminal of second buffer module (6), the reset of the rest-set flip-flop module (5)
End is electrically connected with the control pin of main control chip (2), the output end of the rest-set flip-flop module (5) and the inspection of main control chip (2)
End electrical connection is surveyed, the input terminal of second buffer module (6) is electrically connected with the control pin of main control chip (2), and described second
The output end of buffer module (6) is electrically connected with the control terminal of the switch module (7).
2. a kind of controller hardware based on rest-set flip-flop according to claim 1 protects circuit, it is characterised in that: also wrap
Faulty signal circuit is included, the fault signal circuit includes over current fault protection circuit (11), deadlock observation circuit
(13), upper bridge fault secure circuit (12) and lower bridge fault secure circuit (14), over current fault protection circuit (11)
Input terminal is electrically connected with main control chip (2), and the output end and the first buffer module (3) of over current fault protection circuit (11) are controlled
Pin electrical connection processed, the driving end of upper bridge fault secure circuit (12) the He Xiaqiao fault secure circuit (14) and main control chip
(2) it is electrically connected, the output end of upper bridge fault secure circuit (12) the He Xiaqiao fault secure circuit (14) and logic module (4)
Electrical connection, the input terminal of the deadlock observation circuit (13) are electrically connected with main control chip (2), the deadlock monitoring electricity
The output end on road (13) is electrically connected with logic module (4).
3. a kind of controller hardware based on rest-set flip-flop according to claim 2 protects circuit, it is characterised in that: described
Over current fault protection circuit include the upper bridge fault secure circuit (12) output port Fault-T and lower bridge error protection
The output port Fault-D of circuit (14), the output port Fault-T are electrically connected with the anode tap of diode D23, and described two
The cathode terminal of pole pipe D23 is electrically connected with the cathode terminal of diode D24, the anode tap and the output port of the diode D24
Fault-D electrical connection, the cathode terminal of the diode D24 are electrically connected with the first end of the R81 of resistance, the R81's of the resistance
Second end is electrically connected with the B1 pin of electrical level transferring chip U43, VCCB pin and 5V the power supply electricity of the electrical level transferring chip U43
Connection, the VCCA pin and 3.3V power electric connection of the electrical level transferring chip U43, the A1 of the electrical level transferring chip U43 draw
Foot is electrically connected with the electric foot A of logic module U44C, the B1 pin of the electrical level transferring chip U43 and the electric foot of logic module U44C
B electrical connection, the A1 pin are electrically connected with the first end of capacitor C85 and resistance R97, the second end ground connection of the capacitor C85, institute
The second end electrical connection 3.3V power supply of resistance R97 is stated, the B1 pin is electrically connected with the first end of capacitor C86 and resistance R98, institute
The second end ground connection of capacitor C86 is stated, the second end of the resistance R98 is electrically connected with the second end of the resistance R97, the logic
The electric foot Y of module U44C is electrically connected with the first end of resistance R82, the second end of the resistance R82 and the first end electricity of resistance R83
Connection, the second end ground connection of the resistance R83, the first end of the resistance R83 is electrically connected with the first end of capacitor C86, described
The second end of capacitor C86 is grounded, and the first end of the capacitor C86 is electrically connected with the base stage of triode Q2, the triode Q2's
Collector is electrically connected with the first end of resistance R79, the first end and 3.3V power electric connection of the resistance R79, the triode
The emitter of Q2 is grounded.
4. a kind of controller hardware based on rest-set flip-flop according to claim 3 protects circuit, it is characterised in that: described
Deadlock observation circuit (13) includes capacitor C182, the first end of the capacitor C182 and the control pin of main control chip (2)
Electrical connection, the second end of the capacitor C182 are electrically connected with the first end of resistance R88, the second end and resistance of the resistance R88
The first end of R90 is electrically connected, the second end ground connection of the resistance R90, the first end of the resistance R90 and the base stage of triode Q4
Electrical connection, the emitter ground connection of the triode Q4, the collector of the triode are electrically connected with the first end of resistance R86, institute
The second end and 3.3V power electric connection of resistance R86 are stated, the first end of the resistance R86 and the first end of capacitor C178 are electrically connected
It connects, the second end ground connection of the capacitor C178, the first end of the capacitor C178 is electrically connected with the anode tap of diode D22, institute
The cathode terminal for stating diode D22 is electrically connected with the first end of resistance R87, the second end of the resistance R87 and the first of resistance R89
End electrical connection, the second end ground connection of the resistance R89, the first end of the resistance R89 are electrically connected with the first end of capacitor C90,
The second end of the capacitor C90 is grounded, and the first end of the capacitor C90 is electrically connected with the base stage of triode Q3, the triode
The emitter of Q3 is electrically connected, and the collector of the triode Q3 is electrically connected with the first end of resistance R84, and the of the resistance R84
Two ends and 3.3V power electric connection, the first end of the resistance R84 are electrically connected with the anode tap of diode D21, the diode
Cathode terminal be electrically connected with the collector of the triode Q2.
5. a kind of controller hardware based on rest-set flip-flop according to claim 4 protects circuit, it is characterised in that: described
Rest-set flip-flop module include logic module U44A, logic module U44B, logic module U44D and external control circuit,
The external control circuit includes resistance R94, and the first end of the resistance R94 and the control pin of control chip are electrically connected
It connects, the second end of the resistance R94 is electrically connected with the electric foot B of logic module U44D, the A electricity foot and resistance of logic module U44D
The first end of R92 is electrically connected, the second end and 3.3V power electric connection of the resistance R92, the Y electricity foot and electricity of logic module U44D
Hinder the first end electrical connection of R96, the second end ground connection of the resistance R96, the of the first end of the resistance R96 and resistance R95
One end electrical connection, the second end of the resistance R95 are electrically connected with the first end of capacitor C94, the second termination of the capacitor C94
The first end on ground, the capacitor C94 is electrically connected with the base stage of triode Q5, the emitter ground connection of the triode Q5, and described three
The collector of pole pipe Q5 is electrically connected with the first end of resistance R93, the second end of the resistance R93 and the first end electricity of capacitor C179
Connection, the second end ground connection of the capacitor C179, the first end of the capacitor C179 are electrically connected with the first end of capacitor C93, institute
The second end ground connection of capacitor C93 is stated, the first end of the capacitor C93 is electrically connected with the B electricity foot of logic module U44A, the logic
The B electricity foot of module U44A is electrically connected with the first end of resistance R91, and the second end and 3.3V power electric connection of the resistance R92 are patrolled
The Y electricity foot for collecting module U44A is electrically connected electrical connection, the A electricity foot and logic of logic module U44A with the B electricity foot of logic module U44B
The Y electricity foot of module U44B is electrically connected, and the A electricity foot of the logic module U44A is electrically connected with the collector of the triode Q3, institute
The Y electricity foot for stating logic module U44B is electrically connected with the first end of the first end of resistance R157 and resistance R85 respectively, the resistance
R157 second end is grounded by LED, the second end and 3.3V power electric connection of the resistance R85, and the first of the resistance R85
End be electrically connected with the first end of capacitor C87, and the second end of the capacitor C87 is grounded, the first end of the capacitor C87 and described the
The control terminal of two buffer modules (6) is electrically connected.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821931726.7U CN209150704U (en) | 2018-11-22 | 2018-11-22 | A kind of controller hardware protection circuit based on rest-set flip-flop |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821931726.7U CN209150704U (en) | 2018-11-22 | 2018-11-22 | A kind of controller hardware protection circuit based on rest-set flip-flop |
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| CN209150704U true CN209150704U (en) | 2019-07-23 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201821931726.7U Active CN209150704U (en) | 2018-11-22 | 2018-11-22 | A kind of controller hardware protection circuit based on rest-set flip-flop |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111585246A (en) * | 2020-05-07 | 2020-08-25 | 辽宁瑞华实业集团高新科技有限公司 | Guard grating circuit, power supply and electronic equipment |
| CN114123102A (en) * | 2021-11-29 | 2022-03-01 | 珠海格力电器股份有限公司 | Overcurrent delay protection circuit and method and frequency converter |
-
2018
- 2018-11-22 CN CN201821931726.7U patent/CN209150704U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111585246A (en) * | 2020-05-07 | 2020-08-25 | 辽宁瑞华实业集团高新科技有限公司 | Guard grating circuit, power supply and electronic equipment |
| CN111585246B (en) * | 2020-05-07 | 2022-08-02 | 辽宁瑞华实业集团高新科技有限公司 | Guard grating circuit, power supply and electronic equipment |
| CN114123102A (en) * | 2021-11-29 | 2022-03-01 | 珠海格力电器股份有限公司 | Overcurrent delay protection circuit and method and frequency converter |
| CN114123102B (en) * | 2021-11-29 | 2023-03-17 | 珠海格力电器股份有限公司 | Overcurrent delay protection circuit and method and frequency converter |
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