CN209119551U - A kind of high-frequency narrow-pulse semiconductor laser device driving circuit - Google Patents
A kind of high-frequency narrow-pulse semiconductor laser device driving circuit Download PDFInfo
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- CN209119551U CN209119551U CN201821911365.XU CN201821911365U CN209119551U CN 209119551 U CN209119551 U CN 209119551U CN 201821911365 U CN201821911365 U CN 201821911365U CN 209119551 U CN209119551 U CN 209119551U
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 43
- 238000007493 shaping process Methods 0.000 claims abstract description 147
- 230000005540 biological transmission Effects 0.000 claims abstract description 45
- 238000007688 edging Methods 0.000 claims abstract description 9
- 239000003990 capacitor Substances 0.000 claims description 37
- 230000005611 electricity Effects 0.000 claims description 5
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- 230000008054 signal transmission Effects 0.000 abstract description 2
- 230000003321 amplification Effects 0.000 description 9
- 238000013461 design Methods 0.000 description 9
- 238000003199 nucleic acid amplification method Methods 0.000 description 9
- 230000006835 compression Effects 0.000 description 7
- 238000007906 compression Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 210000001367 artery Anatomy 0.000 description 5
- 210000003462 vein Anatomy 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000002035 prolonged effect Effects 0.000 description 3
- 108010076504 Protein Sorting Signals Proteins 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000002407 reforming Methods 0.000 description 2
- 230000001960 triggered effect Effects 0.000 description 2
- 102100040862 Dual specificity protein kinase CLK1 Human genes 0.000 description 1
- 102100040844 Dual specificity protein kinase CLK2 Human genes 0.000 description 1
- 101000749294 Homo sapiens Dual specificity protein kinase CLK1 Proteins 0.000 description 1
- 101000749291 Homo sapiens Dual specificity protein kinase CLK2 Proteins 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000007648 laser printing Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
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Abstract
The utility model relates to semiconductor laser fields, disclose a kind of high-frequency narrow-pulse semiconductor laser device driving circuit, comprising: narrow pulse signal source, for exporting a pair of of nanosecond difference narrow pulse signal；Pulse shaper is connect with the narrow pulse signal source, the shaping for the edging trigger according to the difference narrow pulse signal to the difference narrow pulse signal, exports picosecond narrow pulse signal all the way.The utility model utilizes differential signal concept, and simultaneous transmission two-way nanosecond narrow pulse signal can be such that signals transmission has strong anti-interference ability；And the pulsewidth that this two-way nanosecond narrow pulse signal is compressed in shaping is distinguished by pulse shaper, and final output picosecond narrow pulse signal all the way, meet the demand that more burst pulse is obtained in laser driving utilization, the utilization of edging trigger can prevent from being ensured the correctness of transmission data by external interference in nanosecond narrow pulse signal transmission process.
Description
Technical field
The utility model relates to semiconductor laser field more particularly to a kind of high-frequency narrow-pulse semiconductor lasers
Driving circuit.
Background technique
Semiconductor laser in many aspects gradually replace He-Ne laser, be widely used in optical-fibre communications,
Integrated optics, laser printing, laser beam flying, CD storage technique, laser ranging, laser radar, light-pumped solid state laser, arteries and veins
Rush doppler imaging, 3D rendering system, optical fiber temperature measuring sensor etc. field.In the various fields, especially know in target
Not, in laser ranging field, the performances such as recognition capability, range accuracy, anti-interference and low-power consumption of target both depend on semiconductor
The laser pulse quality of laser transmitting, and the light pulse of semiconductor laser is produced by semiconductor laser device driving circuit
Raw electric pulse, which is directly modulated, to be obtained, i.e. the fine or not determinant of laser pulse quality is semiconductor laser device driving circuit
Pulse quality, semiconductor laser device driving circuit design quality in the related art have conclusive effect.
Currently, general semiconductor laser device driving circuit mostly uses the amplification of single pulse signal Direct Power to carry out laser
Driving, thus be unable to reach pulse width less than 1ns burst pulse drive, and signal vulnerable to interference influence, output not
Stablize.
In order to which semiconductor laser driving meets the needs of high-frequency, burst pulse, high current (high power), in addition to pulse
The pulse signal that generator generates carries out pulse shaper being also set up in some driving circuits, to pulse outside power amplification
The waveform of the pulse signal of signal generator output carries out shaping, and further compression pulse width realizes the narrow arteries and veins of more high repetition frequency
Punching output, to further increase the laser pulse quality of semiconductor laser.Such as Publication No. CN101009486A
" narrow pulse driver of insulation bar power tube " that patent document is pointed out, in the design, pulse signal converted by input signal and
Drive part BQ power drive pulse transformer is shaped to burst pulse, then controls power tube T and is switched on or off, although can also be real
Now to the shaping of pulse signal, but pulse transformer is unable to satisfy the burst pulse output of requirements at the higher level, and pulse signal is connected into function
The design of the grid of rate pipe T is also easy to appear the excessive problem of rise time and fall time, and single pulse signal is vulnerable to interference, electricity
Road stability is not high, therefore above-mentioned circuit is unable to reach burst pulse of the pulse width less than 1ns always and drives；For another example notification number is
The patent document of CN103227413B discloses a kind of " semiconductor laser device driving circuit ", comprising: pulse shaper is used for
Shaping is carried out to the waveform of the narrow pulse signal of input, and further compresses its pulsewidth；And power amplification circuit, it is whole with pulse
Shape circuit is connected, and for utilizing high pressure, carries out power amplification to the narrow pulse signal of pulse shaper output, and by power
The high level output of amplified narrow pulse signal is positive to laser, low level output to laser cathode.It can be realized same
When meet two kinds of demands of high power and burst pulse, it is 20ns and repetition frequency range is that it is most narrow, which to obtain pulse width, for final debugging
The signal of 100Hz-100KHz, but it is relatively difficult less than the burst pulse of 1ns to want to adjust out pulse width.
Other than shaping pulse, the driving circuit also having looks for another way, and considers pulse from the power tube work response time
The shortening of response time, the patent document if notification number is CN106654851A disclose a kind of " semiconductor laser burst pulse
Driving circuit and its working method " passes through what narrow-pulse generation circuit generated in the semiconductor laser burst pulse driving circuit
Trigger signal directly drives the drain electrode of MOSFET driving chip field-effect tube, the voltage of the grid stable connection of field-effect tube,
With this problem excessive come signal elevating time when avoiding directly using pulse signal driving FET grid and fall time, most
Whole debugging obtains pulse width and is 538ps-10ns and continuously adjustable pulse signal.
According to the inspiration of the above-mentioned prior art, semiconductor laser device driving circuit can also have more perfect set
Meter, the pulse output of Lai Shixian more narrow pulse width.
Utility model content
In view of the above-mentioned deficiencies of the prior art, technical problem to be solved by the utility model is to provide a kind of anti-interference abilities
By force, it can be realized the high-frequency narrow-pulse semiconductor laser device driving circuit of output of pulse signal of the pulse width less than 1ns.
To achieve the goals above, the technical solution adopted in the utility model are as follows:
A kind of high-frequency narrow-pulse semiconductor laser device driving circuit, comprising:
Narrow pulse signal source, for exporting a pair of of nanosecond difference narrow pulse signal；
Pulse shaper is connect with the narrow pulse signal source, for the edge according to the difference narrow pulse signal
The shaping to the difference narrow pulse signal is triggered, picosecond narrow pulse signal all the way is exported；
The pulse shaper includes the first shaping circuit and the second shaping circuit, and the of first shaping circuit
One, second clock signal input part is respectively connected to first, second signal output end in the narrow pulse signal source, and described first
First, second output end of shaping circuit is respectively connected to the first, second clock signal input terminal of second shaping circuit,
First output end of second shaping circuit exports picosecond narrow pulse signal as the output end of the pulse shaper.
In above-mentioned design, a pair of of nanosecond difference narrow pulse signal is issued by narrow pulse signal source, then by shaping pulse
Shaping of the circuit according to the edging trigger of the difference narrow pulse signal to the difference narrow pulse signal, i.e., exportable skin all the way
Second grade narrow pulse signal；It helps laser to drive by introducing differential signal first, can effectively improve system signal noise ratio
And signal anti-interference ability, secondly pulse shaper according to edging trigger execute reforming process, i.e., by pulse front edge and/
Along the shaping of trigger signal and output after or, the external interference in signals transmission can be not only further prevented, ensures letter
The correctness of number shaping, can also keep the accuracy of signal sequence, finally make the output of picosecond narrow pulse signal more stable,
Effect is more preferable；
By the first shaping circuit as preliminary calibration circuit, the narrow pulse signal of default pulsewidth is generated, it is whole by second
Shape circuit is further calibrated the default width pulse signal of the first shaping circuit output, as secondary calibration circuit thus defeated
Stable out, the higher picosecond narrow pulse signal of pulsewidth shaping accuracy.
Further, first shaping circuit includes the first trigger and the first delay circuit；First trigger
Data input pin connect with external power supply, the first, second input end of clock of first trigger is respectively as described
The first output end connection described first of first, second clock signal input terminal of one shaping circuit, first trigger is prolonged
When circuit input terminal and the first output end as first shaping circuit, the second output terminal of first trigger make
The RESET input for the second output terminal of first shaping circuit, first trigger connects first delay circuit
Output end；
Second shaping circuit includes the second trigger and the second delay circuit；The data of second trigger input
End is connect with external power supply, and the first, second input end of clock of second trigger is respectively as second shaping circuit
The first, second clock signal input terminal, the first output end of second trigger connects the defeated of second delay circuit
Enter end and the first output end as second shaping circuit, the RESET input connection described second of second trigger
The output end of delay circuit.
Further, first trigger and second trigger are differential clocks d type flip flop.
Further, the narrow pulse signal source is FPGA or CPLD, and the first output end of first trigger is institute
The positive output end of differential clocks d type flip flop is stated, the second output terminal of first trigger is the differential clocks d type flip flop
Inverse output terminal, the first output end of second trigger is the positive output end of the differential clocks d type flip flop.
Further, first trigger and second trigger are MC100LVEL51.
Further, first delay circuit includes resistance R125 and capacitor C63, described in one end of resistance R125 is used as
The input terminal of first delay circuit is connect with the first output end of first trigger, the other end and capacitor of resistance R125
Output end after one end connection of C63 as first delay circuit is connect with the RESET input of first trigger,
The other end of capacitor C63 is grounded.
Further, second delay circuit includes resistance R124 and capacitor C64, described in one end of resistance R124 is used as
The input terminal of second delay circuit is connect with the first output end of second trigger, the other end and capacitor of resistance R124
Output end after one end connection of C64 as second delay circuit is connect with the RESET input of second trigger,
The other end of capacitor C64 is grounded.
Further, first signal output end in the narrow pulse signal source is whole by coupled capacitor C70 and described first
First clock signal input terminal of shape circuit connects, and the second signal output end in the narrow pulse signal source passes through coupled capacitor
C71 is connect with the first clock signal input terminal of first shaping circuit.
Further, further includes:
Multiple biasing circuits；
Power amplified drive circuit is connect with the output end of the pulse shaper；
Multiple biasing circuits are connected to first signal output end and described first in the narrow pulse signal source
Between first clock signal input terminal of shaping circuit, the second signal output end in the narrow pulse signal source and described first whole
Between the second clock signal input part of shape circuit, the first output end of first shaping circuit and second shaping circuit
The first clock signal input terminal between, the second output terminal of first shaping circuit and second shaping circuit second
Between clock signal input terminal and between the first output end and power amplified drive circuit of second shaping circuit.
Further, the biasing circuit includes pull-up resistor and pull down resistor, and pull-up resistor one end connection is external
First clock of power supply, the first signal output end and first shaping circuit that the other end connects the narrow pulse signal source is believed
The of the second signal output end of transmission line or the narrow pulse signal source between number input terminal and first shaping circuit
The first output end and second shaping circuit of transmission line or first shaping circuit between two clock signal input terminals
The first clock signal input terminal between transmission line or first shaping circuit second output terminal and second shaping
The first output end and the power amplification of transmission line or second shaping circuit between the second clock signal input part of circuit
Transmission line between driving circuit；
Described pull down resistor one end ground connection, the other end connect first signal output end in the narrow pulse signal source with it is described
The second signal of transmission line or the narrow pulse signal source between first clock signal input terminal of the first shaping circuit exports
First of transmission line or first shaping circuit between end and the second clock signal input part of first shaping circuit
Transmission line or first shaping circuit between output end and the first clock signal input terminal of second shaping circuit
Transmission line or second shaping electricity between second output terminal and the second clock signal input part of second shaping circuit
Transmission line between first output end and power amplified drive circuit on road.
After adopting the above technical scheme, the beneficial effects of the utility model are:
A pair of of nanosecond difference narrow pulse signal is exported as original driving pulse by setting narrow pulse signal source to input
Pulse shaper is conducive to the anti-interference ability and system signal noise ratio that improve signal, ensures the maximum transmitted of signal, compared to existing
There is the mono signal of technology, loss of signal is smaller；
By setting pulse shaper according to the edging trigger of the difference narrow pulse signal to the difference burst pulse
The shaping and output of signal can not only further prevent the external interference in signals transmission, ensure signal shaping just
True property, can also keep the accuracy of signal sequence, finally make the output of picosecond narrow pulse signal more stable, effect is more managed
Think；By the first shaping circuit of setting as preliminary calibration circuit, the narrow pulse signal of default pulsewidth is generated, setting second is passed through
Shaping circuit further calibrates the default width pulse signal of the first shaping circuit output as secondary calibration circuit, thus
Be conducive to export stable, the higher picosecond narrow pulse signal of pulsewidth shaping accuracy；
It is differential clocks d type flip flop that the first trigger and second trigger, which is arranged, may make the enough letters of circuit structure
Single clear, component maintenance replacement is more convenient；Delay circuit is set and trigger cooperates, so that the delay time of pulse signal can
Control；
Biasing circuit is set, the stability for ensureing differential signal transmission quality and accuracy and data transmission is conducive to；
Power amplified drive circuit is set, high-power output is advantageously implemented.
It to sum up designs, the utility model strong antijamming capability, it is defeated less than the pulse signal of 1ns to can be realized pulse width
Out, the laser pulse demand for meeting high power, high-frequency and picosecond burst pulse can also further be helped.
Detailed description of the invention
It is as follows in order to illustrate more clearly of the utility model embodiment or the technical solution of the prior art, attached drawing:
Fig. 1 is a kind of structure for high-frequency narrow-pulse semiconductor laser device driving circuit that the utility model embodiment 1 provides
Schematic diagram；
Fig. 2 is the schematic diagram for the MOSFET driving circuit that the utility model embodiment 1 provides；
Fig. 3 is a kind of structure for high-frequency narrow-pulse semiconductor laser device driving circuit that the utility model embodiment 2 provides
Schematic diagram；
Fig. 4 is the signal for the preferred high-frequency narrow-pulse semiconductor laser device driving circuit that the utility model embodiment 2 provides
Figure.
Specific embodiment
It is specific embodiment of the utility model and in conjunction with attached drawing below, the technical solution of the utility model is made further
Description, but the utility model is not limited to these examples.
Embodiment 1
As shown in Figure 1, the present embodiment provides a kind of high-frequency narrow-pulse semiconductor laser device driving circuits, comprising:
Narrow pulse signal source 100, for exporting a pair of of nanosecond difference narrow pulse signal, nanosecond refers to the arteries and veins of pulse signal
Width is nanosecond；Specifically, narrow pulse signal source 100 includes the first signal output end and second signal output end, is respectively corresponded to
It is connected with an output signal line, a signal line transmits the positive signal of nanosecond difference narrow pulse signal, and a signal line passes
The negative signal of second grade difference narrow pulse signal is paid, the amplitude of two signals in this two signal line is equal, phase phase difference 180
Degree, polarity on the contrary, this cabling of two signal lines on pcb board it is isometric, it is wide, in close proximity to and same level；Many institute's weeks
Know, the intrinsic advantage of differential transmission signals is exactly strong antijamming capability, can effectively inhibit electromagnetic interference (EMI), timing positioning quasi-
Really, therefore the semiconductor laser device driving circuit of the present embodiment exports a pair of of nanosecond difference narrow pulse signal and is conducive to high quality guarantor
Very, loss of signal is reduced；
Currently, utilization of the FPGA/CPLD in burst pulse control is more mature, narrow pulse signal source can be directly used as
100 output nanosecond narrow pulse signals；In addition, all included LVDS interface of the high-end FPGA/CPLD product of XLINX, ALTERA, it can
LVDS signal (low-voltage differential signal) Lai Shixian nanosecond is exported using these FPGA/CPLD as narrow pulse signal source 100
The output of difference narrow pulse signal pair be can yet be regarded as a preferably implementation；LVDS technology is to utilize low-down voltage swing
(about 350mV) carries out the transmission of data on two cablings or a pair of of balanced cable by difference, signal can be made in cabling
Or with the speed rates of several hundred Mbit/s on balanced cable, Slew Rate is smaller for high-frequency signal；LVDS technology uses low pressure
With low current driving method, therefore, not only strong antijamming capability, can also be achieved low noise and low power consumption transmission；
Pulse shaper 200 is connect with the narrow pulse signal source 100, for according to the difference narrow pulse signal
Shaping of the edging trigger to the difference narrow pulse signal, output picosecond narrow pulse signal all the way；Wherein, according to the difference
The edging trigger of narrow pulse signal is divided specifically to understand the shaping of the difference narrow pulse signal are as follows: according to the forward position (arteries and veins of pulse
Rush to liter) and/or the reforming process to the difference narrow pulse signal is triggered along (pulse decline) afterwards, thus to the difference
Narrow pulse signal carries out copped wave and Pulse Compression, i.e., just has corresponding signal level to export when signal changes,
So can be stronger to the anti-interference of outer signals, it is ensured that transmit the correctness of data, in addition the utilization of differential signal, this reality
Apply the pulse signal that example is finally exported from pulse shaper 200 error is small, reliability is higher, effect is presented can more meet and sets
Meter is expected.
The pulse shaper of edging trigger work common in the art has monostable flipflop and its periphery delay
The single-shot trigger circuit that element (capacitor, resistance) is constituted, wherein delay cell (capacitor, resistance) is used to adjust delay time,
And the time is exactly the pulsewidth of the pulse signal of single-shot trigger circuit output, physical circuit such as TTL monostable flipflop
The monostable circuit etc. that 74LS123 integrated circuit, 555 timers are constituted, but it is all only applicable to mono signal input, and the present embodiment
Using differential signal input (having two-way input), therefore the pulse shaper 200 under relatively simple embodiment is in addition to retaining
It, need to be by increasing by a Differential Input before single-shot trigger circuit outside the design of single-shot trigger circuit common in the art
Operational amplification circuit realizes the processing to difference narrow pulse signal, then connects the output end of Differential Input operational amplification circuit
Be connected to single-shot trigger circuit input terminal and carry out waveform shaping compression pulse width, but found after testing, influence circuit stability because
Plain more, circuit debugging heavy workload；It can also directly select XINLIX company Virtex7 Series FPGA as pulse shaper
200 output picosecond pulses, but it is expensive, generally in 1W+ or more；
Therefore preferably waveform shaping of the circuit of the present embodiment Jing Guo two-stage single-shot trigger circuit, not only contributes to difference
Pulse signal further compress well by stability, also helps save the cost expenditure.
Therefore the pulse shaper 200 includes the first shaping circuit 210 and the second shaping circuit 220, described first is whole
The first, second signal that first, second clock signal input terminal of shape circuit 210 is respectively connected to the narrow pulse signal source is defeated
Outlet, the first, second output end of first shaping circuit 210 be respectively connected to second shaping circuit 220 first,
Second clock signal input part, output of the first output end of second shaping circuit 220 as the pulse shaper
End output picosecond narrow pulse signal.
Specifically, first order single-shot trigger circuit is formed by the first shaping circuit 210 and carries out preliminary calibration, according to arteries and veins
Rush nanosecond difference narrow pulse signal nDS1+, nDS1- that the triggering on forward position or rear edge exports the narrow pulse signal source 100
Copped wave and compression are carried out, difference narrow pulse signal DS2+, DS2- output of a pair of default pulsewidth is generated, passes through the second shaping circuit
220 formed second level single-shot trigger circuits carry out secondary calibrations, according to pulse front edge or after along to the first shaping circuit 210
The further copped wave of difference narrow pulse signal DS2+, DS2- and compression of the default pulsewidth of output, thus be conducive to export it is stable,
The higher picosecond narrow pulse signal of pulsewidth shaping accuracy, it is emphasized that, the first shaping circuit 210 and the second shaping electricity
Specific device selected by road 220 can be different, can also be identical.
It is driven as shown in Fig. 2, can be used for controlling semiconductor laser using the picosecond narrow pulse signal that the present embodiment generates
The switch mosfet M1 conducting of common MOSFET driving circuit, makes capacitor C2 instantaneous discharge semiconductor laser in dynamic circuit
Operating voltage and electric current are provided, semiconductor laser can be driven and issue picosecond light pulse signal.In order to avoid semiconductor swashs
Light device is damaged because of High-frequency Interference, and capacitor C2 is in parallel with semiconductor laser in circuit, meanwhile, it partly leads in order to prevent
Body laser both ends are damaged by excessive backward voltage, give one backward dioded Dw1 of semiconductor laser parallel connection.
To sum up, the driving circuit strong antijamming capability of the present embodiment drives suitable for more multi-field laser, can
Output pulse width is less than the burst pulse of 1ns, has preferable practicability, is conducive to reduce laser for example, using in laser ranging
Range hole distance and raising measurement accuracy and resolution ratio.
Embodiment 2
As shown in figure 3, the present embodiment the difference from embodiment 1 is that, the semiconductor laser device driving circuit of the present embodiment
In, first shaping circuit 210 includes the first trigger 211 and the first delay circuit 212；First trigger 211
Data input pin D1 is connect with external power supply, the first, second input end of clock (CLK1, CLK1-) of first trigger 211
Respectively as the first, second clock signal input terminal of first shaping circuit 210, the first of first trigger 211
Output end Q1 connects the input terminal of first delay circuit 212 and the first output end as first shaping circuit 210,
Second output terminal of the second output terminal Q1- of first trigger 211 as first shaping circuit 210, described first
The RESET input R1 of trigger 211 connects the output end of first delay circuit 212；
Second shaping circuit 220 includes the second trigger 221 and the second delay circuit 222；Second trigger
221 data input pin D2 is connect with external power supply, the first, second input end of clock of second trigger 221 (CLK2,
CLK2-) respectively as the first, second clock signal input terminal of second shaping circuit 220, second trigger 221
The first output end Q2 connect the input terminal of second delay circuit 222 and as second shaping circuit 220 first
Output end, the RESET input R2 of second trigger 221 connect the output end of second delay circuit 222.In order to protect
Demonstrate,prove the level equalization of the data input pin D1 of the first trigger 211 and the data input pin D2 of the second trigger 221, data input
End D1 and data input pin D2, which goes out, is equipped with pull-up resistor and pull down resistor.
Specifically, the first shaping circuit 210 and the second shaping circuit 220 are selected independent with two-way input end of clock
Independent trigger with two-way output end is also delayed by the first delay circuit 212 and second to complete shaping pulse
Circuit 222 carries out compression adjustment to the width of pulse, wherein the first delay circuit 212 carries out for the first time differential pulse signal
Compression shaping, the first delay circuit 212 carries out second of shaping to differential pulse signal, when the delay of the second delay circuit 222
Between be the pulse signal that final pulse shaper 200 exports pulsewidth.
When it is implemented, it is preferred that first trigger 211 and second trigger 221 are differential clocks D triggering
Device, pulse shaper 200 constitute double D trigger circuit, since the first delay circuit 212 and the second delay circuit 222 need
Using the RESET input, therefore the d type flip flop of the selection or a differential clocks d type flip flop with reset function, specifically may be used
For MC10EP131FA, MC100LVEL51, MC10EP139, MC10EP142FA etc..It should be noted that differential clocks D touching
Sending out device has positive power source terminal VCC and negative power end VEE, positive power source terminal VCC connection external power supply, and negative power end VEE is grounded, preferably
The external power supply by being grounded again after two capacitors after parallel connection, to effectively reduce power supply ripple, reduce ESR(equivalent string
Join resistance), ensure the stability of flip-flop operation.
Preferably, as shown in figure 4, the narrow pulse signal source 100 is FPGA or CPLD, first trigger 211
First output end is the positive output end of the differential clocks d type flip flop, and the second output terminal of first trigger 211 is institute
The inverse output terminal of differential clocks d type flip flop is stated, the first output end of second trigger 221 is differential clocks D touching
Send out the positive output end of device.Since second trigger 221 is only by the pulse signal of its positive output end output as final
Picosecond narrow pulse signal, therefore the inverse output terminal of second trigger 221 passes through resistance eutral grounding.
Further, first trigger 211 and second trigger 221 are MC100LVEL51.
The operating voltage of MC100LVEL51 is -3.3V or 3.3V, and functional reliability is good.
First delay circuit 212 includes resistance R125 and capacitor C63, and one end of resistance R125 is prolonged as described first
When circuit 212 input terminal connect with the first output end Q1 of first trigger 211, the other end and capacitor of resistance R125
As the output end of first delay circuit 212 and the RESET input of first trigger 211 after one end connection of C63
S1 connection, the other end ground connection of capacitor C63.
Second delay circuit 222 includes resistance R124 and capacitor C64, and one end of resistance R124 is prolonged as described second
When circuit 222 input terminal connect with the first output end Q2 of second trigger 221, the other end and capacitor of resistance R124
As the output end of second delay circuit 222 and the RESET input of second trigger 221 after one end connection of C64
S2 connection, the other end ground connection of capacitor C64.
Adjust the parameter size of resistance R125, capacitor C63, resistance R124 and capacitor C64, adjustable first delay circuit
212 and second delay circuit 222 delay time, the size of delay time has certainly the width of the pulse signal of output
Qualitative effect, it is generally the case that since resistance R125, capacitor C63, resistance R124 and capacitor C64 value will not in this circuit
Too big, delay time can be calculated with following formula: T ≈ 1.1RC, and wherein R represents resistance, and unit is ohm, and C represents electricity
Capacitance, unit are farad, and the unit of T is the second.Reach 1ns or less to the first above-mentioned delay circuit 212 and described second to T
It is relatively easy for delay circuit 222, resistance R125 that specific pulse width output value view is selected, capacitor C63, resistance R124 and
Depending on capacitor C64 design parameter, generally, the pulse width range exported after above-mentioned two-stage shaping is in 560ps ~ 800ps.
First signal output end in the narrow pulse signal source 100 passes through coupled capacitor C70 and first shaping circuit
210 the first clock signal input terminal connection, the second signal output end in the narrow pulse signal source 100 pass through coupled capacitor
C71 is connect with the first clock signal input terminal of first shaping circuit 210.Capacitor C70 and capacitor C71 circulates with blocking
The effect of exchange.
Preferably, further includes:
Multiple biasing circuits；Individual pull-up resistor, individual pull down resistor can be used as independent biasing circuit setting
In the transmission line of the present embodiment.
Power amplified drive circuit is connect with the output end of the pulse shaper 200；Power amplified drive circuit
Internal circuit design not reinflated explanation herein, it is only necessary to have the function of power amplification and driving, can as being arranged in Fig. 2,
The power amplification circuit design that can also be pointed out in the patent document of CN103227413B such as notification number.
Multiple biasing circuits are connected to first signal output end and described the in the narrow pulse signal source 100
Between first clock signal input terminal of one shaping circuit 210, the second signal output end in the narrow pulse signal source 100 and institute
It states between the second clock signal input part of the first shaping circuit 210, the first output end of first shaping circuit 210 and institute
It states between the first clock signal input terminal of the second shaping circuit 220, the second output terminal of first shaping circuit 210 and institute
It states between the second clock signal input part of the second shaping circuit 220 and the first output end of second shaping circuit 220
Between power amplified drive circuit.
Preferably, the biasing circuit includes pull-up resistor and pull down resistor, to mention simultaneously for difference narrow pulse signal
For high level and low level a reference value；Described pull-up resistor one end connects external power supply, and the other end connects the burst pulse letter
Transmission line number between first signal output end in source 100 and the first clock signal input terminal of first shaping circuit 210
Or the second clock signal input of the second signal output end in the narrow pulse signal source 100 and first shaping circuit 210
First output end of transmission line or first shaping circuit 210 between end and second shaping circuit 220 first when
The second output terminal of transmission line or first shaping circuit 210 between clock signal input part and second shaping circuit
First output end of transmission line or second shaping circuit 220 between 220 second clock signal input part is put with power
Transmission line between big driving circuit；
Described pull down resistor one end ground connection, the other end connect first signal output end in the narrow pulse signal source 100 with
Of transmission line or the narrow pulse signal source 100 between first clock signal input terminal of first shaping circuit 210
Transmission line between binary signal output end and the second clock signal input part of first shaping circuit 210 is described first whole
Transmission line between first output end of shape circuit 210 and the first clock signal input terminal of second shaping circuit 220 or
Between the second output terminal of first shaping circuit 210 and the second clock signal input part of second shaping circuit 220
Transmission line or second shaping circuit 220 the first output end and power amplified drive circuit between transmission line.
It is specific as shown in figure 4, resistance R129 and resistance R139 composition the first signal for being connected to narrow pulse signal source 100 is defeated
The biasing circuit of transmission line between outlet and the first clock signal input terminal of first shaping circuit 210；Resistance R130
With resistance R140 composition be connected to narrow pulse signal source 100 second signal output end and first shaping circuit 210 the
The biasing circuit of transmission line between two clock signal input terminals；It is whole that resistance R131 and resistance R136 composition is connected to described first
Transmission line between first output end of shape circuit 210 and the first clock signal input terminal of second shaping circuit 220
Biasing circuit；Resistance R132 and resistance R137 composition is connected to the second output terminal and described the of first shaping circuit 210
The biasing circuit of transmission line between the second clock signal input part of two shaping circuits 220；Resistance R128 and resistance R134 group
At the biased electrical for the transmission line being connected between the first output end and power amplified drive circuit of second shaping circuit 220
Road advantageously ensures that the impedance matching of signal processing whole process.
The specific embodiments described herein are merely examples of the spirit of the present invention.The utility model institute
Belonging to those skilled in the art can make various modifications or additions to the described embodiments or using similar
Mode substitute, but without departing from the spirit of the present application or beyond the scope of the appended claims.
Claims (10)
1. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit characterized by comprising
Narrow pulse signal source, for exporting a pair of of nanosecond difference narrow pulse signal；
Pulse shaper is connect with the narrow pulse signal source, for the edging trigger according to the difference narrow pulse signal
Shaping to the difference narrow pulse signal exports picosecond narrow pulse signal all the way；
The pulse shaper includes the first shaping circuit and the second shaping circuit, and first, the of first shaping circuit
Two clock signal input terminals are respectively connected to first, second signal output end in the narrow pulse signal source, first shaping
First, second output end of circuit is respectively connected to the first, second clock signal input terminal of second shaping circuit, described
First output end of the second shaping circuit exports picosecond narrow pulse signal as the output end of the pulse shaper.
2. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 1, which is characterized in that described
One shaping circuit includes the first trigger and the first delay circuit；The data input pin and external power supply of first trigger connect
It connects, the first, second clock of the first, second input end of clock of first trigger respectively as first shaping circuit
Signal input part, the first output end of first trigger connect the input terminal of first delay circuit and as described
First output end of one shaping circuit, the second output terminal of first trigger are second defeated as first shaping circuit
Outlet, the RESET input of first trigger connect the output end of first delay circuit；
Second shaping circuit includes the second trigger and the second delay circuit；The data input pin of second trigger with
External power supply connection, the first, second input end of clock of second trigger respectively as second shaping circuit the
One, second clock signal input part, the first output end of second trigger connect the input terminal of second delay circuit
And the first output end as second shaping circuit, the RESET input connection of second trigger second delay
The output end of circuit.
3. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 2, which is characterized in that described
One trigger and second trigger are differential clocks d type flip flop.
4. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 3, which is characterized in that described narrow
Pulse signal source is FPGA or CPLD, and the first output end of first trigger is the forward direction of the differential clocks d type flip flop
Output end, the second output terminal of first trigger are the inverse output terminal of the differential clocks d type flip flop, second touching
The first output end for sending out device is the positive output end of the differential clocks d type flip flop.
5. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 3, which is characterized in that described
One trigger and second trigger are MC100LVEL51.
6. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 2, which is characterized in that described
One delay circuit includes resistance R125 and capacitor C63, one end of resistance R125 as first delay circuit input terminal with
First output end of first trigger connects, and the other end of resistance R125 is used as described after connecting with one end of capacitor C63
The output end of first delay circuit is connect with the RESET input of first trigger, the other end ground connection of capacitor C63.
7. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 2, which is characterized in that described
Two delay circuits include resistance R124 and capacitor C64, one end of resistance R124 as second delay circuit input terminal with
First output end of second trigger connects, and the other end of resistance R124 is used as described after connecting with one end of capacitor C64
The output end of second delay circuit is connect with the RESET input of second trigger, the other end ground connection of capacitor C64.
8. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 1, which is characterized in that described narrow
First signal output end of pulse signal source passes through the first clock signal input of coupled capacitor C70 and first shaping circuit
End connection, the second signal output end in the narrow pulse signal source pass through coupled capacitor C71 and first shaping circuit the
The connection of one clock signal input terminal.
9. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 1, which is characterized in that also wrap
It includes:
Multiple biasing circuits；
Power amplified drive circuit is connect with the output end of the pulse shaper；
Multiple biasing circuits be connected to the narrow pulse signal source the first signal output end and first shaping
Between first clock signal input terminal of circuit, the second signal output end in the narrow pulse signal source and first shaping electricity
Between the second clock signal input part on road, the first output end of first shaping circuit and second shaping circuit the
Between one clock signal input terminal, the second clock of the second output terminal of first shaping circuit and second shaping circuit
Between signal input part and between the first output end and power amplified drive circuit of second shaping circuit.
10. a kind of high-frequency narrow-pulse semiconductor laser device driving circuit according to claim 9, which is characterized in that described
Biasing circuit includes pull-up resistor and pull down resistor, and described pull-up resistor one end connects external power supply, and other end connection is described narrow
Transmission line between first signal output end of pulse signal source and the first clock signal input terminal of first shaping circuit
Or the narrow pulse signal source second signal output end and first shaping circuit second clock signal input part between
Transmission line or first shaping circuit the first output end and second shaping circuit the first clock signal input terminal
Between transmission line or the second output terminal of first shaping circuit and the second clock signal of second shaping circuit it is defeated
Enter the transmission line between the first output end and power amplified drive circuit of the transmission line or second shaping circuit between end；
Pull down resistor one end ground connection, the other end connect first signal output end and described first in the narrow pulse signal source
The second signal output end of transmission line or the narrow pulse signal source between first clock signal input terminal of shaping circuit with
First output of transmission line or first shaping circuit between the second clock signal input part of first shaping circuit
Second of transmission line or first shaping circuit between end and the first clock signal input terminal of second shaping circuit
Transmission line or second shaping circuit between output end and the second clock signal input part of second shaping circuit
Transmission line between first output end and power amplified drive circuit.
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| CN201821911365.XU CN209119551U (en) | 2018-11-20 | 2018-11-20 | A kind of high-frequency narrow-pulse semiconductor laser device driving circuit |
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| CN201821911365.XU CN209119551U (en) | 2018-11-20 | 2018-11-20 | A kind of high-frequency narrow-pulse semiconductor laser device driving circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111180998A (en) * | 2020-01-03 | 2020-05-19 | 国开启科量子技术(北京)有限公司 | Method and device for realizing narrow pulse laser driving circuit without delay chip |
| CN111200236A (en) * | 2018-11-20 | 2020-05-26 | 余姚舜宇智能光学技术有限公司 | High-frequency narrow-pulse semiconductor laser driving circuit |
-
2018
- 2018-11-20 CN CN201821911365.XU patent/CN209119551U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111200236A (en) * | 2018-11-20 | 2020-05-26 | 余姚舜宇智能光学技术有限公司 | High-frequency narrow-pulse semiconductor laser driving circuit |
| CN111180998A (en) * | 2020-01-03 | 2020-05-19 | 国开启科量子技术(北京)有限公司 | Method and device for realizing narrow pulse laser driving circuit without delay chip |
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Effective date of registration: 20240423 Address after: No. 1898, Shinan West Road, Yuyao City, Ningbo City, Zhejiang Province, 315408 Patentee after: Zhejiang Shunchuang Intelligent Optical Technology Co.,Ltd. Country or region after: China Address before: 315400 no.1918 Shinan West Road, Lanjiang street, Yuyao City, Ningbo City, Zhejiang Province Patentee before: YUYAO SUNNY INTELLIGENT OPTICAL TECHNOLOGY Co.,Ltd. Country or region before: China |