CN209056461U - Semiconductor component - Google Patents
Semiconductor component Download PDFInfo
- Publication number
- CN209056461U CN209056461U CN201790000952.0U CN201790000952U CN209056461U CN 209056461 U CN209056461 U CN 209056461U CN 201790000952 U CN201790000952 U CN 201790000952U CN 209056461 U CN209056461 U CN 209056461U
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- semiconductor substrate
- semiconductor
- insulating layer
- semiconductor component
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 246
- 239000000758 substrate Substances 0.000 claims abstract description 101
- 239000010410 layer Substances 0.000 claims description 164
- 239000011241 protective layer Substances 0.000 claims description 33
- 230000001681 protective effect Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 description 31
- 238000004519 manufacturing process Methods 0.000 description 24
- 239000004020 conductor Substances 0.000 description 18
- 230000015572 biosynthetic process Effects 0.000 description 10
- 229910052681 coesite Inorganic materials 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
- 230000011218 segmentation Effects 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052682 stishovite Inorganic materials 0.000 description 4
- 229910052905 tridymite Inorganic materials 0.000 description 4
- 239000004744 fabric Substances 0.000 description 3
- 238000009434 installation Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006355 external stress Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The utility model relates to a kind of semiconductor components.Semiconductor component (10) has: semiconductor substrate (20), semiconductor element portion (21), again wiring layer (30) and insulating layer (40).Semiconductor substrate includes mutually opposed the first face (201) and the second face (202) and the side (210) orthogonal with the first face and the second face.Semiconductor element portion (21) is formed in the region of the first surface side of semiconductor substrate (20).Wiring layer is formed in the first face of semiconductor substrate again, and when observing along the direction orthogonal with the first face, then the area ratio semiconductor substrate of wiring layer is big.Insulating layer connects with the side of semiconductor substrate.Insulating layer is configured as being covered throughout the end (301) of wiring layer and the side of semiconductor substrate again, which is again a part in the face of the semiconductor substrate side of wiring layer and does not connect with the first face of semiconductor substrate.
Description
Technical field
The utility model relates to have the semiconductor substrate for being formed with semiconductor element portion and the again semiconductor portion of wiring layer
The manufacturing method of part and semiconductor component.
Background technique
With the miniaturization of electronic component, the semiconductor component of mount type is also gradually being minimized.As one of side
Method has chip size packages, by extensive practical.
In the semiconductor component of chip size packages, then wiring layer is formed in the one side of semiconductor substrate.Therefore, it partly leads
The side of structure base board is exposed in outside, and an important factor for reliability reduces can be become.Make structure to solve this problem, patent text
Offering the semiconductor component recorded in 1,2, the side of wiring layer has insulating film in semiconductor substrate and again.
The semiconductor component recorded in patent document 1,2 forms side after semiconductor substrate forms wiring layer again
Insulating film.In the case where the semiconductor component recorded in manufacturing patent document 1,2, after forming wiring layer again, it is being routed again
Layer and semiconductor substrate form slot or recess portion.The insulating film of side is by the fill insulant in the slot or recess portion
And formed.
Patent document 1: Japanese Unexamined Patent Publication 2015-72943 bulletin
Patent document 2: Japanese Unexamined Patent Publication 2001-144213 bulletin
However, forming slot or the process of recess portion, the fill insulant in slot or recess portion after forming wiring layer again
Process in, vibration and heat can be applied to wiring layer again.Therefore, it is possible to which physical shock and thermal shock can be applied to cloth again
Line layer causes again the deterioration of wiring layer.
In addition, the size (area of vertical view) of wiring layer can not be made again than semiconductor-based in the structure of patent document 1,2
The size (area of vertical view) of plate is big.Therefore, then the design freedom of wiring layer reduces.
In addition, insulating layer reaches the bottom surface of semiconductor component in the structure of patent document 1,2.Therefore, it is partly led in installation
When body component, to confess that the impact of mounting surface of circuit board of semiconductor component installation is applied directly to insulating layer, it is possible to produce
Raw insulating layer falls off.
Utility model content
Therefore, the purpose of this utility model is to provide improve the half of the design freedom of wiring layer again and high reliablity
Conductor part.
The semiconductor component of the utility model has: semiconductor substrate, semiconductor element portion, again wiring layer and insulation
Layer.Semiconductor substrate includes mutually opposed the first face and the second face and the side orthogonal with the first face and the second face.Half
Conductor element portion is formed in the region of the first surface side of semiconductor substrate.Wiring layer is formed in the first face of semiconductor substrate again,
When being observed along the direction orthogonal with the first face, then wiring layer area ratio semiconductor substrate area it is big.Insulating layer with partly lead
The side of structure base board connects.Also, insulating layer be configured as throughout the end of wiring layer and the side of semiconductor substrate again and
Covered, the end of the wiring layer again is again a part in the face of the semiconductor substrate side of wiring layer, and with it is semiconductor-based
First face of plate does not connect.
In this configuration, by dielectric protection layer, and again, wiring layer is bigger than semiconductor substrate for the side of semiconductor substrate.And
And insulating layer also connects with the face of the semiconductor substrate side of wiring layer again, it is not easy to generate falling off for insulating layer.
Additionally, it is preferred that the semiconductor component of the utility model is following structure.Semiconductor component has protective layer.Exhausted
Edge layer has protective layer with the face of the side opposite side of semiconductor substrate.Protective layer connects with the end of wiring layer again.
In this configuration, by using insulating layer and protective layer, and further suppress semiconductor substrate with it is external short
Road, it is more difficult to generate falling off for insulating layer.
Additionally, it is preferred that the semiconductor component of the utility model is following structure.The side of semiconductor substrate is along with the
On one side in the indent and convex shape of tool when the observation of orthogonal direction.Insulating layer is configured in the concave surface of the bumps.
In this configuration, side is the same as area elongated, the semiconductor compared with the linearly situation in side that connects of insulating layer
The side of substrate and the bond strength of insulating layer improve.
In addition, preferably insulating layer is in the shape for being cross over the second face from the first face in the semiconductor component of the utility model.
In this configuration, the insulating properties relative to the side of semiconductor substrate further increases, and bond strength is also mentioned
It is high.
In addition, being preferably formed with top surface in the semiconductor component of the utility model in the second face of semiconductor substrate and protecting
Cuticula.
In this configuration, not only the insulating properties of the side of semiconductor substrate improves, and the insulating properties of top surface is also improved.
In addition, semiconductor element portion is also possible to that two poles of pn-junction are utilized in the semiconductor component of the utility model
Pipe.
In this configuration, as semiconductor component, it can be realized ESD guard block.Moreover, the side phase of semiconductor substrate
For outside by insulation protection, therefore realize the ESD protection device of high reliablity.
In the manufacturing method of the semiconductor component of the utility model, there is following each process.The manufacturing method has
The process for forming the semiconductor element portion in the region of the first surface side of semiconductor substrate.The manufacturing method has encirclement semiconductor-based
The semiconductor element portion of plate and the process for forming recess portion.The manufacturing method has the process for forming insulating layer in the wall surface of recess portion.
The manufacturing method has the semiconductor substrate when observing along the direction orthogonal with the first face, in the region comprising being formed with recess portion
The first surface side process for forming wiring layer again.The manufacturing method has when observing along the direction orthogonal with the first face and recess portion
Alignment ground by semiconductor substrate and again wiring layer segmentation process.
In this manufacturing method, following semiconductor component is to easily and reliably produced, that is, in the side of semiconductor substrate
Face is configured with insulating layer, and has the again wiring layer bigger than semiconductor substrate.
In addition, preferably also there is following process in the manufacturing method of the semiconductor component of the utility model.The manufacture
Method has the process for forming protective layer in insulating layer area encompassed.
In this manufacturing method, it to easily and reliably produces and is also configured with the half of protective layer in the side of semiconductor substrate
Conductor part.
In addition, preferably recess portion is along orthogonal with the first face in the manufacturing method of the semiconductor component of the utility model
When direction is observed, in the shape of multiple semi-circulars.
In this manufacturing method, the bond strength of the side and insulating layer that are easily manufactured by semiconductor substrate higher half
Conductor part.
It can be improved cloth again in having semiconductor substrate and the again semiconductor component of wiring layer according to the utility model
The design freedom and reliability of line layer.
Detailed description of the invention
Fig. 1 is to show the side of the primary structure of semiconductor component involved in the first embodiment of the utility model to cut open
View.
(A) of Fig. 2 is the stereoscopic figure of semiconductor component involved in the first embodiment of the utility model, Fig. 2
(B) be semiconductor component top plane view.
Fig. 3 is the process for showing the manufacturing method of semiconductor component involved in the first embodiment of the utility model
Figure.
(A) of Fig. 4 is the formation process for showing semiconductor element portion involved in the first embodiment of the utility model
Side sectional view, (B) of Fig. 4 is the side for showing the formation process of recess portion involved in the first embodiment of the utility model
Face cross-sectional view, (C) of Fig. 4 are the sides for showing the formation process of insulating layer involved in the first embodiment of the utility model
Cross-sectional view, (D) of Fig. 4 are the sides for showing the formation process of protective layer involved in the first embodiment of the utility model
Cross-sectional view.
(A) of Fig. 5 is to show involved in the first embodiment of the utility model the side of the formation process of wiring layer again
Face cross-sectional view, (B) of Fig. 5 are the side, sectionals for showing the process of filming involved in the first embodiment of the utility model
Figure, (C) of Fig. 5 are to show the side of the segmentation process for being divided into monolithic involved in the first embodiment of the utility model to cut open
View.
Fig. 6 is to be formed with the top view of the state of insulating layer and protective layer in the recess portion for being formed in semiconductor substrate.
Fig. 7 is to show the side of the primary structure of semiconductor component involved in the second embodiment of the utility model to cut open
View.
Fig. 8 is to show the side of the primary structure of semiconductor component involved in the third embodiment of the utility model to cut open
View.
Fig. 9 is to show the side of the primary structure of semiconductor component involved in the 4th embodiment of the utility model to cut open
View.
Figure 10 is the side for showing the primary structure of semiconductor component involved in the 5th embodiment of the utility model
Cross-sectional view.
The explanation of appended drawing reference
10,10A, 10B, 10C, 10D... semiconductor component；20... semiconductor substrate；21... semiconductor element portion；
30... wiring layer again；31,32... insulating layer；40,40A, 40B... insulating layer；50,50B... protective layer；60... top surface is protected
Cuticula；200... semiconductor substrate；201... the first face；202... the second face；210... side；220... recess portion；301...
End；341,342... wiring conductor again.
Specific embodiment
The semiconductor component referring to involved in first embodiment of the attached drawing to the utility model and semiconductor component
Manufacturing method is illustrated.Fig. 1 is the main knot for showing semiconductor component involved in the first embodiment of the utility model
The side sectional view of structure.(A) of Fig. 2 is the stereoscopic of semiconductor component involved in the first embodiment of the utility model
Figure.(B) of Fig. 2 is the top plane view of semiconductor component involved in the first embodiment of the utility model.
Shown in (A) as shown in Figure 1, Figure 2, semiconductor component 10 have semiconductor substrate 20, again wiring layer 30, insulating layer 40,
And protective layer 50.
Semiconductor substrate 20 is such as Si substrate.As shown in (B) of Fig. 2, the schematic shape of semiconductor substrate 20 is square
Shape.Semiconductor substrate 20 has the first face 201, the second face 202 and side 210.First face 201 and the second face 202 are mutually right
It sets.Side 210 is the face orthogonal with the first face 201 and the second face 202, by each of each side in the first face 201 and the second face 202
Side connection.
Semiconductor element portion 21 is formed in the region of 201 side of the first face of semiconductor substrate 20.Semiconductor element portion 21
It with defined depth, and is flat shape.Semiconductor element portion 21 is formed using known semiconductor technology.Example
Such as, in mode shown in Fig. 1, the n-type semiconductor layer of defined depth is formed in 201 side of the first face of semiconductor substrate 20
(N-shaped trap).2 p-type semiconductor portions have been formed separately in n type semiconductor layer.2 p-type semiconductor portions expose in the first face
201.The exposed division in 2 p-type semiconductor portions is the input/output terminal of the semiconductor element formed by semiconductor element portion 21
Son.With this configuration, it is formed with that cathode is connected to each other and anode exposes diode in 2 pn-junctions in the first face 201 respectively.
Semiconductor component 10 can be used as ESD protection device as a result,.
Wiring layer 30 is rectangle when looking down again, and the area of area ratio semiconductor substrate 20 is big.Again in wiring layer 30
The part of centre connects and engages with the first face 201 of semiconductor substrate 20.In other words, being connect with end edge when overlooking wiring layer 30 again
Close end 301 does not connect with semiconductor substrate 20.That is, end 301 is again the face of 20 side of semiconductor substrate of wiring layer 30
A part, and be the part not connected with semiconductor substrate 20.The end 301 corresponds to the " wiring layer again of the utility model
End ".
Wiring layer 30 has insulating layer 31,32 and again wiring conductor 341,342 again.More specifically, 31 He of insulating layer
Insulating layer 32 is laminated from 201 side of the first face according to the sequence.Insulating layer 31 is for example by SiO2It constitutes.It can also will be semiconductor-based
The passivation layer of plate 20 is as insulating layer 31.Insulating layer 32 is for example made of insulative resin.Insulating layer 32 is preferably and semiconductor
The low material of 20 resilience in comparison modulus of substrate.
Wiring conductor 341,342 is for example made of Al again.One of one end of wiring conductor 341 and semiconductor substrate 20 again
The part connection that p-type semiconductor portion exposes.The other end configuration of wiring conductor 341 is leaned in one end than wiring conductor 341 again again
The position of the side of semiconductor component 10.The other end of wiring conductor 341 is exposed to by being formed in the hole of insulating layer 32 again
It is external.One end of wiring conductor 342 is connect with the part that another p-type semiconductor portion of semiconductor substrate 20 exposes again.Cloth again
The other end configuration of line conductor 342 is in one end than wiring conductor 342 again by the position of the side of semiconductor component 10.Again
The other end of wiring conductor 342 is exposed to outside by being formed in the hole of insulating layer 32.Wiring conductor 341,342 exposes again for these
Part be semiconductor component 10 external connection terminals.In addition it is also possible to implement plating processing to the exposed surface.As plating
It applies, is able to use using Ni as Au plating of substrate etc..
Insulating layer 40 is made of the material with insulating properties, such as by SiN or SiO2Deng composition.Insulating layer 40 with partly lead
The side 210 of structure base board 20 connects and engages with the side 210.Insulating layer 40 is entire with the side 210 of semiconductor substrate 20
Face connects and engages.In other words, insulating layer 40 is to connect from the end of 201 side of the first face on the side of semiconductor substrate 20 210
To the shape at the end in the second face 202.Also, insulating layer 40 connects and engages with the end 301 of wiring layer 30 again.At this point, insulation
Layer 40 is comprising by the side 210 of semiconductor substrate 20 and the end 301 of wiring layer 30 is constituted again corner, being to spread semiconductor
The shape of the end 301 of the side 210 of substrate 20 and again wiring layer 30.That is, insulating layer 40 is throughout the side of semiconductor substrate 20
The end 301 of face 210 and again wiring layer 30 and the shape configuration for covering side 210 and end 301.In addition, here, insulating layer
40 are configured as directly connecting with side 210 and end 301, but can also via adhesive layer etc. and with side 210 and end 301
Engagement.
Protective layer 50 is constituted such as the polysilicon by electric conductivity.Protective layer 50 and insulating layer 40 with semiconductor substrate 20
The entire surface of face opposite side that connects of side 210 connect and engage.Also, the end 301 of protective layer 50 and wiring layer 30 again
Connect and engages.
By adopting such structure, the side 210 of semiconductor substrate 20 is covered by insulating layer 40.Therefore, it can prevent
The side 210 of the semiconductor substrate 20 of semiconductor component 10 and the short circuit of external conductor.The electricity of semiconductor component 10 is reliable as a result,
Property is got higher.
In addition, insulating layer 40 is not only engaged with the side 210 of semiconductor substrate 20, it is also semiconductor-based with wiring layer 30 again
The end 301 of 20 side of plate engages.Insulating layer 40 is in two orthogonal face bondings as a result, with the only engagement compared with side 210 engages
Area becomes larger.Therefore, insulating layer 40 is not easy due to from external stress, for example semiconductor component 10 being installed on outside
Circuit board when fall off from the impact that the mounting surface of circuit board is subject to from side 210.In this way, the physics of semiconductor component 10
Reliability is also improved.
Also, insulating layer 40 does not reach the back side (mounting surface) of semiconductor component 10.Insulating layer 40 will not be direct as a result,
By the impact from above-mentioned mounting surface, the falling off from side 210 of insulating layer 40 can be further suppressed.In addition, being routed again
The elasticity modulus of the insulating layer 32 of layer 30 is lower, thus mitigates the impact from above-mentioned mounting surface by wiring layer 30 again.
Effectively further inhibit the falling off from side 210 of insulating layer 40 as a result,.
In addition, semiconductor component 10 is also equipped with the side 210 to semiconductor substrate 20 in the structure of present embodiment
The protective layer 50 that is covered of insulating layer 40.The reliability of semiconductor component 10 improves as a result,.At this point, due to protective layer 50
Also it is engaged with the end 301 of wiring layer 30 again, so effectively further inhibiting falling off for insulating layer 40 and protective layer 50.
In addition, making again the area of the area ratio semiconductor substrate 20 of wiring layer 30 by the structure for having present embodiment
Greatly.The design freedom of wiring layer 30 improves again as a result,.
In addition, the side 210 of semiconductor substrate 20 is when looking down (orthogonal with the first face 201 as shown in (B) of Fig. 2
When being observed on direction (Z-direction of (A) of Fig. 2)), the continuous shape of the recess portion of semicircular in shape.That is, the side of semiconductor substrate 20
210 on the direction (Z-direction of (A) of Fig. 2) orthogonal with the first face 201 when looking down (when observing), in having indent and convex shape
Shape.The side 210 of semiconductor substrate 20 and the bonding area of insulating layer 40 become larger as a result, the side 210 of semiconductor substrate 20 with
The bond strength of insulating layer 40 improves.Therefore, the reliability of semiconductor component 10 further increases.
In addition, insulating layer 40 and protective layer 50 are configured as filling when looking down semicircular as shown in (B) of Fig. 2
Recess portion (concave-convex recess portion).Therefore, it even if the side 210 of semiconductor substrate 20 and the joint surface of insulating layer 40 are convex-concave, partly leads
Body component 10 is when looking down also in the rectangle almost without convex-concave.Thus it is not easy to lack insulating layer 40 or protective layer 50, it can
It is easy to operate as general installing component.
In addition, in the above description, showing and forming the mode of diode in semiconductor element portion 21.However, even if
It is to form the mode of other semiconductor elements such as transistor in semiconductor element portion 21, semiconductor component 10 can also play above-mentioned
Function and effect.
The semiconductor component 10 that such structure is constituted is manufactured by manufacturing method as follows.Fig. 3 is
The flow chart of the manufacturing method of semiconductor component involved in the first embodiment of the utility model is shown.Fig. 4 and Fig. 5 is to show
The side sectional view of the structure of the manufacturing process of semiconductor component involved in the first embodiment of the utility model out.Fig. 4
(A) formation process in semiconductor element portion is shown, (B) of Fig. 4 shows the formation process of recess portion.(C) of Fig. 4 shows insulating layer
Formation process, (D) of Fig. 4 shows the formation process of protective layer.(A) of Fig. 5 shows again the formation process of wiring layer, Fig. 5's
(B) process for showing filming, (C) of Fig. 5 show the segmentation process for being divided into monolithic.
Hereinafter, being said referring to each figure of Fig. 4, Fig. 5 to the manufacturing method of semiconductor component 10 according to the flow chart of Fig. 3
It is bright.
Firstly, preparing as shown in (A) of Fig. 4 by SiO2Etc. compositions female semiconductor substrate 200, it is semiconductor-based in the mother
201 side of the first face of plate 200 forms multiple semiconductor element portions 21 (S101).It is partly led relative to mother in multiple semiconductor element portions 21
Structure base board 200 is spaced one from compartment of terrain and arranges to be formed.
Next, forming recess portion 220 (S102) between adjacent semiconductor element portion 21 as shown in (B) of Fig. 4.This
When, when looking down (when the side orthogonal with the first face 201 of semiconductor substrate 200 looks up), recess portion 220 is that encirclement is fifty-fifty
The shape in conductor element portion 21.Fig. 6 is to be formed with the state of insulating layer and protective layer in the recess portion for being formed in semiconductor substrate
Top view.As shown in Fig. 6, recess portion 220 is multiple columnar holes (being circular hole when vertical view) by being arranged as rectangle
It is formed, to surround semiconductor element portion 21.Multiple columnar holes are connected along the side of rectangle.
Next, forming insulating layer 40 (S103) in the wall surface of recess portion 220 as shown in (C) of Fig. 4.More specifically, such as
Shown in Fig. 6, the wall surface in multiple columnar holes is respectively formed insulating layer 40.Insulating layer 40 can pass through the wall in recess portion 220
It is deposited, sputtered in face of insulating materials, is coated with to realize.Such as it is able to use SiN.
In addition, insulating layer 40 is also possible to form SiO and the wall surface to recess portion 220 is fired2Layer is realized.
In this case, the diameter for forming each hole of recess portion 220 reduces insulation compared with the mode that insulating layer 40 is formed in recess portion 220
The thickness of layer 40.
Next, in being partly embedded into of being surrounded of insulating layer 40 and forming protective layer 50 (S104) as shown in (D) of Fig. 4.
Next, forming wiring layer 30 again in the first face 201 of semiconductor substrate 200 as shown in (A) of Fig. 5.It is routed again
The forming method of layer 30 uses known wiring technique again.
Next, as shown in (B) of Fig. 5, to the second face (face opposed with the first face 201) side of semiconductor substrate 200
It is ground, makes 200 filming of semiconductor substrate (S106).At this point, making 200 filming of semiconductor substrate, so as to insulating layer 40
And protective layer 50 exposes.
Next, as shown in (C) of Fig. 5, be aligned with recess portion 220 will wiring layer 30, insulating layer 40 and protective layer again
50 segmentations, by 10 singualtion of semiconductor component.More specifically, it will be routed again along the double dot dash line of (C) of Fig. 5 and Fig. 6
Layer 30, insulating layer 40 and protective layer 50 are divided.
By using such manufacturing method, it is high that above-mentioned electric reliability and physical reliability can be easily manufactured
Semiconductor component 10.In addition, before forming wiring layer 30 again, being formed for insulating in the manufacturing method of present embodiment
The recess portion 220 of layer 40 and protective layer 50.Impact when forming recess portion 220 will not be applied to wiring layer 30 again as a result,.Therefore,
It can prevent again the deterioration of wiring layer 30.
In addition, as shown in fig. 6, by constituting recess portion 220, the side of semiconductor substrate 20 using multiple columnar holes
210 become convex-concave along the shape in semicircular hole when looking down.As a result, as described above, the side 210 of semiconductor substrate 20
Become larger with the bonding area of insulating layer 40, the side 210 of semiconductor substrate 20 and the bond strength of insulating layer 40 improve.Therefore,
The reliability of semiconductor component 10 further increases.In addition, in the present embodiment, showing the side using columnar hole
Formula.It may, however, also be flat shape is the hole of polygon or ellipse.
Next, the semiconductor component referring to involved in second embodiment of the attached drawing to the utility model is illustrated.
Fig. 7 is the side sectional view for showing the primary structure of semiconductor component involved in the second embodiment of the utility model.
As shown in fig. 7, semiconductor component 10A involved in present embodiment is having insulating layer 40A and is not having protection
On this point of layer 50, is different from semiconductor component 10 involved in first embodiment.The other structures of semiconductor component 10 and the
Semiconductor component 10 involved in one embodiment is identical, and omits the explanation mutually to exist together.
Semiconductor component 10A has insulating layer 40A.The insulating layer 40A of semiconductor component 10A is formed in first embodiment
The insulating layer 40 of related semiconductor component 10 and the forming region of protective layer 50.That is, insulating layer 40A's and semiconductor substrate
The side of the opposed face in the face of 20 210 side of side and again wiring layer 30 is on the same face.
The semiconductor component 10A of such structure also functions to identical as semiconductor component 10 involved in first embodiment
Function and effect.
Next, the semiconductor component referring to involved in third embodiment of the attached drawing to the utility model is illustrated.
Fig. 8 is the side sectional view for showing the primary structure of semiconductor component involved in the third embodiment of the utility model.
As shown in figure 8, knot of the semiconductor component 10B in insulating layer 40B and protective layer 50B involved in present embodiment
It is different from semiconductor component 10 involved in first embodiment on structure.The other structures of semiconductor component 10B are implemented with first
Semiconductor component 10 involved in mode is identical, and omits the explanation mutually to exist together.
Insulating layer 40B and protective layer 50B does not reach the end of 202 side of the second face in the side of semiconductor substrate 20 210
Portion.
In the semiconductor component 10B of such structure, a part of side 210 is exposed, but insulating layer 40B and protection
Layer 50B connects with wiring layer 30 again, that is, is configured to the end of 201 side of the first face of side 210.Therefore, semiconductor component 10B rises
To the function and effect substantially same with semiconductor component 10 involved in first embodiment.
Next, the semiconductor component referring to involved in fourth embodiment of the attached drawing to the utility model is illustrated.
Fig. 9 is the side sectional view for showing the primary structure of semiconductor component involved in the 4th embodiment of the utility model.
As shown in figure 9, semiconductor component 10C involved in present embodiment is having on this point of top surface protective film 60
It is different from semiconductor component 10 involved in first embodiment.The other structures and first embodiment of semiconductor component 10C
Related semiconductor component 10 is identical, and omits the explanation mutually to exist together.
Entire surface, insulating layer 40 and protective layer 50 of the top surface protective film 60 throughout the second face 202 of semiconductor substrate 20
Formed with end face of second face 202 on the same face.Top surface protective film 60 is for example made of insulative resin.
The side 210 of the semiconductor substrate 20 of the semiconductor component 10C of such structure and the second face 202 are by insulant
Covering.The reliability of semiconductor component 10C further increases as a result,.In addition, passing through the springform for reducing top surface protective film 60
Amount, is able to suppress impact caused by absorption chuck when installation, the reliability of semiconductor component 10C further increases.
In addition, top surface protective film 60 at least covers the second face 202 of semiconductor substrate 20.
Next, the semiconductor component referring to involved in fiveth embodiment of the attached drawing to the utility model is illustrated.
Figure 10 is the side sectional view for showing the primary structure of semiconductor component involved in the 5th embodiment of the utility model.
As shown in Figure 10, semiconductor component 10D involved in present embodiment is relative to involved in third embodiment
Semiconductor component 10B is different on this point of omitting protective layer 50B.The other structures of semiconductor component 10D and third embodiment party
Semiconductor component 10B involved in formula is identical.
The semiconductor component 10D of such structure is also functioned to and semiconductor component 10B phase involved in third embodiment
Same function and effect.In addition, correspondingly, semiconductor component 10B can be made cheap, and can due to not forming protective layer 50B
Semiconductor component 10B is manufactured with less process.
In addition, semiconductor component 10A involved in second embodiment shown in Fig. 7 and the shown in Fig. 10 5th
Following structure can be applied in the structure of the semiconductor component 10C of embodiment.Wiring layer again is being realized using passivation layer
In the case where 30 insulating layer 31, insulating layer 31 can be made identical as insulating layer 40A, 40B.Thereby, it is possible to form insulating layer
Insulating layer 40A, 40B are formed while 31, can manufacture semiconductor component 10A, 10C with less manufacturing process.
Claims (6)
1. a kind of semiconductor component, which is characterized in that have:
Semiconductor substrate has the first mutually opposed face and the second face and orthogonal with first face and second face
Side；
Semiconductor element portion is formed in the region of first surface side of the semiconductor substrate；
Wiring layer again is formed in first face of the semiconductor substrate, and along the direction orthogonal with first face
When observation, the area of semiconductor substrate described in the area ratio of the wiring layer again is big；And
Insulating layer connects with the side of the semiconductor substrate,
The insulating layer be configured as throughout the end of wiring layer and the side of the semiconductor substrate again and into
Row covering, the end of the wiring layer again is a part in the face of the semiconductor substrate side of the wiring layer again, and
And do not connect with first face of the semiconductor substrate.
2. semiconductor component according to claim 1, which is characterized in that
Have protective layer in the insulating layer and the face of the side opposite side of the semiconductor substrate,
The protective layer connects with the end of the wiring layer again.
3. semiconductor component according to claim 1 or 2, which is characterized in that
When observing along the direction orthogonal with first face, the side of the semiconductor substrate is in the indent and convex shape of tool
Shape,
The insulating layer is configured in the concave surface of the bumps.
4. semiconductor component according to claim 1 or 2, which is characterized in that
The insulating layer is the shape that second face is cross over from first face.
5. semiconductor component according to claim 1 or 2, which is characterized in that
Top surface protective film is formed in second face of the semiconductor substrate.
6. semiconductor component according to claim 1 or 2, which is characterized in that
The semiconductor element portion is the diode that pn-junction is utilized.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016-119318 | 2016-06-15 | ||
| JP2016119318 | 2016-06-15 | ||
| PCT/JP2017/021252 WO2017217306A1 (en) | 2016-06-15 | 2017-06-08 | Semiconductor component and semiconductor component production method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209056461U true CN209056461U (en) | 2019-07-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201790000952.0U Active CN209056461U (en) | 2016-06-15 | 2017-06-08 | Semiconductor component |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP6311849B1 (en) |
| CN (1) | CN209056461U (en) |
| WO (1) | WO2017217306A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002289561A (en) * | 2001-03-28 | 2002-10-04 | Toshiba Corp | Semiconductor device and its manufacturing method |
| JP4495916B2 (en) * | 2003-03-31 | 2010-07-07 | 富士通マイクロエレクトロニクス株式会社 | Manufacturing method of semiconductor chip |
| JP4812525B2 (en) * | 2006-06-12 | 2011-11-09 | パナソニック株式会社 | Semiconductor device, semiconductor device mounting body, and semiconductor device manufacturing method |
| EP2075840B1 (en) * | 2007-12-28 | 2014-08-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for dicing a wafer with semiconductor elements formed thereon and corresponding device |
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- 2017-06-08 WO PCT/JP2017/021252 patent/WO2017217306A1/en active Application Filing
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|---|---|
| JP6311849B1 (en) | 2018-04-18 |
| WO2017217306A1 (en) | 2017-12-21 |
| JPWO2017217306A1 (en) | 2018-06-21 |
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