CN209028521U - Main board for notebook computer - Google Patents

Abstract

The utility model discloses a kind of main board for notebook computer, and main board for notebook computer includes ontology, EC chip and NGFF connector, and EC chip and NGFF connector are set to ontology, wherein EC chip is electrically connected NGFF connector.The utility model has the beneficial effects that the EC chip on main board for notebook computer to be connected to the NGFF connector for being used for grafting solid state hard disk, after mainboard composition, remove the solid state hard disk for being plugged on NGFF connector, external debugging device can be connected by NGFF connector, the information for reading EC chip is debugged.

Description

Notebook computer mainboard

Technical Field

The utility model relates to a notebook computer field, concretely relates to notebook computer mainboard.

Background

In the prior art, the notebook computer motherboard is provided with a debugging port, and when the notebook computer motherboard is debugged, information of the EC chip needs to be read through the debugging port so that a programmer can check bytes anywhere in the memory or modify bytes anywhere by using a debugging tool.

SUMMERY OF THE UTILITY MODEL

Not enough to prior art, the utility model provides a notebook computer mainboard.

The utility model provides a notebook computer mainboard, the notebook computer mainboard includes body, EC chip and NGFF connector, the EC chip with the NGFF connector is located the body, wherein, the NGFF connector is connected to EC chip electricity.

Further, the EC chip is an NPCE985L type EC chip.

Further, the NGFF connector is an M.2socket type interface.

Further, the input end of the M.2socket type interface is electrically connected with the output end of the NPCE985L type EC chip.

Further, the input end of the M.2socket type interface comprises a 20 th pin, a 24 th pin, a 26 th pin, a 28 th pin, a 30 th pin and a 32 th pin; the output end of the NPCE985L type EC chip comprises a 1 st pin, a 3 rd pin, a 7 th pin, a 126 th pin, a 127 th pin and a 128 th pin; wherein,

the 20 th pin of the M.2socket type interface is electrically connected with the 7 th pin of the NPCE985L type EC chip; the 24 th pin of the M.2socket type interface is electrically connected with the 3 rd pin of the NPCE985L type EC chip; the 26 th pin of the M.2socket type interface is electrically connected with the 1 st pin of the NPCE985L type EC chip; the 28 th pin of the M.2socket type interface is electrically connected with the 128 th pin of the NPCE985L type EC chip; the 30 th pin of the M.2socket type interface is electrically connected with the 127 th pin of the NPCE985L type EC chip; and the 32 th pin of the M.2socket type interface is electrically connected with the 126 th pin of the NPCE985L type EC chip.

Furthermore, the notebook computer mainboard further comprises a debugging port, and the debugging port is electrically connected with the EC chip.

The utility model has the advantages that: the EC chip on the notebook computer mainboard is connected to the NGFF connector for plugging the solid state disk, after the mainboard is formed, the solid state disk plugged in the NGFF connector is taken down, external debugging equipment can be connected through the NGFF connector, and information of the EC chip is read for debugging.

Drawings

Fig. 1 is a schematic structural diagram of a notebook computer motherboard according to an embodiment of the present invention;

fig. 2 is a circuit block diagram of a notebook computer motherboard according to an embodiment of the present invention;

fig. 3 is a circuit block diagram of a notebook computer motherboard according to another embodiment of the present invention;

fig. 4 is a specific circuit connection diagram of a notebook computer motherboard according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

It should be noted that all directional indicators (such as up, down, left, right, front, back, horizontal, vertical, etc.) in the embodiments of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. under a certain posture (as shown in the drawings), if the certain posture changes, the directional indicator changes accordingly, the "connection" may be a direct connection or an indirect connection, and the "setting", and "setting" may be directly or indirectly set.

In addition, descriptions in the present application as to "first", "second", and the like are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.

Referring to fig. 1, fig. 2 and fig. 4, an embodiment of the notebook computer motherboard of the present invention is shown, which includes a body, an EC chip and an NGFF connector, the EC chip and the NGFF connector are disposed on the body, wherein the EC chip is electrically connected to the NGFF connector.

In this embodiment, the EC chip on the notebook computer motherboard is connected to the NGFF connector for plugging the solid state disk, and after the motherboard is assembled, the solid state disk plugged in the NGFF connector is removed, so that the EC chip can be connected to an external debugging device through the NGFF connector, and information of the EC chip is read for debugging.

In this embodiment, can need not to install the debugging port in addition, reduce the structure messenger mainboard of mainboard frivolous more, increase the installation space of mainboard, increase the radiating effect, reduce the processing cost.

In this embodiment, the output terminal of the EC chip is electrically connected to the input terminal of the NGFF connector, so that the information of the EC chip is read through the NGFF connector.

In an alternative embodiment, the EC chip is an NPCE985L type EC chip.

In an alternative embodiment, the NGFF connector is an m.2socket type interface.

In an optional embodiment, the input end of the m.2socket type interface comprises a 20 th pin, a 24 th pin, a 26 th pin, a 28 th pin, a 30 th pin and a 32 th pin; the output ends of the NPCE985L type EC chip are a 1 st pin, a 3 rd pin, a 7 th pin, a 126 th pin, a 127 th pin and a 128 th pin; the 20 th pin of the M.2socket type interface is electrically connected with the 7 th pin of the NPCE985L type EC chip; the 24 th pin of the M.2socket type interface is electrically connected with the 3 rd pin of the NPCE985L type EC chip; the 26 th pin of the M.2socket type interface is electrically connected with the 1 st pin of the NPCE985L type EC chip; the 28 th pin of the M.2socket type interface is electrically connected with the 128 th pin of the NPCE985L type EC chip; the 30 th pin of the M.2socket type interface is electrically connected with the 127 th pin of the NPCE985L type EC chip; the 32 th pin of the M.2socket type interface is electrically connected with the 126 th pin of the NPCE985L type EC chip.

In an alternative embodiment, pins 4, 19, 46, 76, 88 and 115 of the model EC chip NPCE985L are connected to 3.3V voltage; the 2 nd pin, the 4 th pin, the 70 th pin, the 72 th pin and the 74 th pin of the M.2socket type interface are connected with 3.3V voltage.

Referring to fig. 1 and fig. 3, in an alternative embodiment, a debug port may be additionally installed, the debug port is electrically connected to the EC chip, and further, an input end of the EC chip is electrically connected to an output end of the debug port. After the debugging port is arranged, the condition that the information of the EC chip needs to be read through the two ports simultaneously during debugging can be met.

The above only is the preferred embodiment of the present invention, not limiting the scope of the present invention, all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings, or directly or indirectly applied to other related technical fields, are included in the same way in the protection scope of the present invention.

Claims (6)

1. The notebook computer mainboard is characterized by comprising a body, an EC chip and an NGFF connector, wherein the EC chip and the NGFF connector are arranged on the body, and the EC chip is electrically connected with the NGFF connector.

2. The notebook computer motherboard of claim 1 wherein said EC chip is an NPCE985L type EC chip.

3. A notebook computer motherboard as recited in claim 2, wherein the NGFF connector is an m.2socket type interface.

4. The notebook computer motherboard as recited in claim 3, wherein the input terminal of the m.2socket type interface is electrically connected to the output terminal of the NPCE985L type EC chip.

5. The notebook computer motherboard of claim 4, wherein the inputs of the M.2socket type interface comprise a 20 th pin, a 24 th pin, a 26 th pin, a 28 th pin, a 30 th pin and a 32 th pin; the output end of the NPCE985L type EC chip comprises a 1 st pin, a 3 rd pin, a 7 th pin, a 126 th pin, a 127 th pin and a 128 th pin; wherein,

the 20 th pin of the M.2socket type interface is electrically connected with the 7 th pin of the NPCE985L type EC chip; the 24 th pin of the M.2socket type interface is electrically connected with the 3 rd pin of the NPCE985L type EC chip; the 26 th pin of the M.2socket type interface is electrically connected with the 1 st pin of the NPCE985L type EC chip; the 28 th pin of the M.2socket type interface is electrically connected with the 128 th pin of the NPCE985L type EC chip; the 30 th pin of the M.2socket type interface is electrically connected with the 127 th pin of the NPCE985L type EC chip; and the 32 th pin of the M.2socket type interface is electrically connected with the 126 th pin of the NPCE985L type EC chip.

6. The notebook computer motherboard of claim 1, further comprising a debug port, the debug port electrically connected to the EC chip.