CN208923119U - 一种功率半导体贴片封装结构 - Google Patents
一种功率半导体贴片封装结构 Download PDFInfo
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Abstract
本实用新型公开一种功率半导体贴片封装结构,包括基板、覆盖于基板上的导电金属层,导电金属层上一体成型有若干导电柱,功率半导体贴片封装结构还包括通过导电连接层固定在导电金属层上且固定后高度与导电柱高度一致的若干半导体芯片、将导电柱和半导体芯片封装在基板同一侧上的绝缘层;在导电柱和半导体芯片的顶端分别设有贯穿绝缘层的焊盘。本实用新型功率半导体贴片封装结构,利用导电柱将半导体芯片下面的一个或多个电极通过的电流导入到上面,使得半导体芯片封装后所有的导电电极焊盘在同一侧,工艺简单,工艺步骤少,结构设计合理,体积小,适用范围广,且封装物料用量少,产品制造成本低,能适应市场的要求。
Description
技术领域
本实用新型涉及半导体封装技术领域,特别涉及一种功率半导体贴片封装结构。
背景技术
SMT(Surface Mount Technology)是电子业界一门新兴的工业技术,它的兴起及迅猛发展是电子组装业的一次革命,它使电子组装变得越来越快速和简单,随之而来的是各种电子产品更新换代越来越快,集成度越来越高,价格越来越便宜。随着穿戴式电子设备的兴起,对贴片封装的缩小尺寸要求越来越高,现有的功率半导体器件主要分为VDMOS、BJT、二极管,都是垂直导电的功率半导体器件,功率半导体贴片封装(SMT)都是在固定框架上,通过固晶、焊线、塑封、电镀、成型五步主要工序,将功率半导体芯片封装在特定的贴片封装形式中,但现有贴片封装结构外形体积大,不适合于穿戴电力设备和移动电子设备等要求小空间的电器,难以完全适应市场的要求,其体积局限了其适用范围,而且体积大,用料多,单颗封装成本高,不利于市场推广。
因此,如何解决上述技术问题是业内亟待解决的技术问题。
实用新型内容
本实用新型的主要目的是提供一种功率半导体贴片封装结构,旨在实现一种工艺简单、结构设计合理、体积小、用料少、成本低的功率半导体贴片封装结构。
本实用新型提出一种功率半导体贴片封装结构,包括基板、覆盖于基板上的导电金属层,导电金属层上一体成型有若干导电柱,功率半导体贴片封装结构还包括通过导电连接层固定在导电金属层上且固定后高度与导电柱高度一致的若干半导体芯片、将导电柱和半导体芯片封装在基板同一侧上的绝缘层;在导电柱和半导体芯片的顶端分别设有贯穿绝缘层的焊盘。
优选地,焊盘的厚度设置为1um至200um。
优选地,基板选用金属、硅、陶瓷、蓝宝石或玻璃材料制成。
优选地,绝缘层选用环氧树脂、硅胶、陶瓷、光刻胶或聚酰亚胺材料制成。
本实用新型功率半导体贴片封装结构,基板上覆盖有导电金属层,在导电金属层成型的过程中成型有若干凸起的导电柱,同时半导体芯片通过导电连接层固定在导电金属层上,且半导体芯片的高度与导电柱的高度一致,在导电柱和半导体芯片的顶端分别设有焊盘,焊盘设置为导电电极,最后通过绝缘层将半导体芯片和导电柱封装保护起来,而焊盘贯穿绝缘层。本实用新型半导体芯片和导电柱设于基板的同一侧上,且半导体芯片的高度与导电柱的高度一致,导电柱将半导体芯片下面的一个或多个电极通过的电流导入到上面,使得半导体芯片封装后所有的导电电极焊盘在同一侧,解决了垂直导电功率半导体电极分设于上下面到电极焊盘在同一侧的转换,采用导电柱导通电流,较传统的焊线工艺,本实用新型电流密度大,封装和焊盘工艺简单,工艺步骤少,结构设计合理,在能够实现半导体芯片垂直导电的性能的基础上,大大减小封装后的体积,功率半导体贴片封装结构封装外形尺寸只比半导体芯片略大,达到芯片级封装尺寸,体积小,封装物料用量少,大大降低原材成本以降低产品制造成本,提高产品的市场竞争力。
附图说明
图1为本实用新型的一种功率半导体贴片封装结构的一实施例的剖面结构示意图。
本实用新型目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。
具体实施方式
应当理解,此处所描述的具体实施例仅仅用以解释本实用新型,并不用于限定本实用新型。
参照图1,提出本实用新型的一种功率半导体贴片封装结构的一实施例,包括基板100、覆盖于基板100上的导电金属层200,其中基板100可选用金属、硅、陶瓷、蓝宝石或玻璃材料制成,根据具体需求合理选用。导电金属层200呈异形覆盖在基板100上,本实施例的导电金属层200可以采用蒸发、电镀、化学镀、或热压的方式覆盖在基板100上,导电金属层200起到导电的作用,在导电金属层200成型的过程中一体成型有若干凸起的导电柱201,导电柱201与导电金属层200一体成型在基板100上起到导电的作用,导电柱201比传统封装结构中焊线工艺的电流密度大。
功率半导体贴片封装结构还包括通过导电连接层300固定在导电金属层200上的半导体芯片400,半导体芯片400固定在导电金属层200上后其高度与导电柱201高度一致。在导电柱201和半导体芯片400的顶端分别设有焊盘600,焊盘600通过锡焊方式成型在导电柱201和半导体芯片400上,作为电极使用。焊盘600的厚度设置为1um至200um,厚度薄,体积小,不占空间。由此可见,导电柱201和半导体芯片400设于基板100的同一侧上,且设于导电柱201和半导体芯片400上的焊盘600也设于同一侧上,完美完成垂直导电功率半导体的焊盘600在上下两面上到焊盘600焊在同一侧的转换,采用这样的结构能大大减小封装尺寸,可将封装尺寸控制在半导体芯片400尺寸的3倍以下,甚至达到1.5倍以下,体积小,封装材料用量少,简化工序的同时,大大降低原材成本,间接降低产品制造成本,提高产品的市场竞争力。最后利用绝缘层500将导电柱201和半导体芯片400封装在基板100上,焊盘600贯穿绝缘层500。绝缘层500将导电柱201和半导体芯片400的侧边保护起到,起到绝缘保护的作用,绝缘层500选用环氧树脂、硅胶、陶瓷、光刻胶或聚酰亚胺材料制成,绝缘性能好,结构稳定可靠。
随着穿戴式电子设备的兴起,对贴片封装的缩小尺寸要求越来越高,现有的功率半导体器件主要分为VDMOS、BJT、二极管,都是垂直导电的功率半导体器件,功率半导体贴片封装(SMT)都是在固定框架上,通过固晶、焊线、塑封、电镀、成型五步主要工序,将功率半导体芯片400封装在特定的贴片封装形式中,但现有贴片封装结构外形体积大,不适合于穿戴电力设备和移动电子设备等要求小空间的电器,难以完全适应市场的要求,其体积局限了其适用范围,而且体积大,用料多,单颗封装成本高,不利于市场推广。
为解决现有技术问题,提出本实用新型的功率半导体贴片封装结构,包括基板100、呈异形设置的导电金属层200、半导体芯片400、焊盘600、绝缘层500,导电金属层200具有导电作用,且在其成型的过程中一体成型有若干导电柱201,导电柱201上通过锡焊成型有焊盘600,导电柱201将半导体芯片400下面的一个或多个电极上通过的电流导入到上面,实现垂直导电,且电流密度较传统的焊线工艺大。半导体芯片400通过导电连接层300固定在导电金属层200上,且固定后的半导体芯片400与导电柱201的高度保持一致,在半导体芯片400上通过锡焊成型有焊盘600,导电柱201和半导体芯片400设于基板100的同一侧上,且设于导电柱201上的焊盘600和设于半导体芯片400上的焊盘600位于同一侧,导电柱201将半导体芯片400下面的一个或多个电极通过的电流导入到上面,使得半导体芯片400封装后所有的导电电极锡焊在同一侧,解决了垂直导电时功率半导体电极分上下面设置到功率半导体电极电极锡焊在同一侧上的转换,在实现半导体芯片400垂直导电的基础上,减小封装后的体积,本实用新型采用绝缘层500将半导体芯片400和导电柱201侧边封装保护起来,大大减小封装后的体积,功率半导体贴片封装结构封装外形尺寸只比半导体芯片400略大,达到芯片级封装尺寸,体积小,适合于穿戴电力设备和移动电子设备等要求小空间的电器,能完全适应市场的要求,适用范围广;而且封装物料用量少,大大降低原材成本以降低产品制造成本,提高产品的市场竞争力;另外采用导电柱201导通电流,较传统的焊线工艺,本实用新型电流密度大,封装和焊盘600工艺简单,工艺步骤少,结构设计合理而实用。
因此,本实用新型实现了一种工艺简单、结构设计合理、体积小、用料少、成本低的功率半导体贴片封装结构。
以上所述仅为本实用新型的优选实施例,并非因此限制本实用新型的专利范围,凡是利用本实用新型说明书及附图内容所作的等效结构变换,或直接或间接运用在其他相关的技术领域,均同理包括在本实用新型的专利保护范围内。
Claims (4)
1.一种功率半导体贴片封装结构,包括基板、覆盖于基板上的导电金属层,其特征在于,所述导电金属层上一体成型有若干导电柱,所述功率半导体贴片封装结构还包括通过导电连接层固定在导电金属层上且固定后高度与导电柱高度一致的若干半导体芯片、将导电柱和半导体芯片封装在基板同一侧上的绝缘层;
在导电柱和半导体芯片的顶端分别设有贯穿绝缘层的焊盘。
2.根据权利要求1所述的一种功率半导体贴片封装结构,其特征在于,所述焊盘的厚度设置为1um至200um。
3.根据权利要求1或2所述的一种功率半导体贴片封装结构,其特征在于,所述基板选用金属、硅、陶瓷、蓝宝石或玻璃材料制成。
4.根据权利要求3所述的一种功率半导体贴片封装结构,其特征在于,所述绝缘层选用环氧树脂、硅胶、陶瓷、光刻胶或聚酰亚胺材料制成。
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