CN208890476U - A kind of pair delays the signal switch boards powered on - Google Patents
A kind of pair delays the signal switch boards powered on Download PDFInfo
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- CN208890476U CN208890476U CN201821737407.2U CN201821737407U CN208890476U CN 208890476 U CN208890476 U CN 208890476U CN 201821737407 U CN201821737407 U CN 201821737407U CN 208890476 U CN208890476 U CN 208890476U
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- npn triode
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Abstract
The utility model discloses a kind of double signal switch boards for delaying to power on, power input is connect with the first PMOS tube source electrode, first resistor, first capacitor are connected in parallel between the first PMOS tube source electrode, grid, power input is connect by 3rd resistor with the first NPN transistor base, first NPN triode collector is connect with the first PMOS tube grid, and the drain electrode of the first PMOS tube is connect with contact one；Reserve battery is connect with the second PMOS tube source electrode, 4th resistance, the second capacitor are connected in parallel between the second PMOS tube source electrode, grid, reserve battery is connect with the second NPN transistor base, second NPN triode collector is connect with the second PMOS tube grid, the drain electrode of second PMOS tube is connect with contact two, and switching switch is connect with contact one, contact two.The utility model has the beneficial effects that selecting different power supply excitations for load by switching switch；Voltage comparator and third NPN triode ensure that power input charges to reserve battery, further increase the safe and stable performance of entire circuit.
Description
Technical field
The utility model belongs to signal handoff technique field, and in particular to a kind of pair delays the signal switch boards powered on.
Background technique
Signal switching is two-way or the above signal input of two-way, is required, is automatically switched according to user.Due to electric power skill
The continuous development of art, there is same equipment the mode of dual power supply generally to apply in every field, to ensure equipment
It operates normally, usually two power supplys are arranged in it, and one inputs for alternating current, another is then backup power source.
Since in power supply handoff procedure, switching moment is easy to produce supply voltage shake, spike, the spike are generated
Pulse may cause late-class circuit or even load damage, and the electricity of backup power source should maintain electricity constantly, to ensure equipment just
Often work.
Utility model content
To overcome technological deficiency of the existing technology, the utility model discloses a kind of pair to delay the signal powered on to switch
Plate selects different power supplys to motivate by switching switch for load, and power input and reserve battery are provided with and delay to power on
Circuit structure makes to avoid causing to power on caused spike to load suddenly when switching the different power supply of switching, protect
The input voltage of load and each excitation.
Technical solution adopted by the utility model to solve its technical problems is a kind of double signal switch boards for delaying to power on,
Including signal switching circuit, the signal switching circuit includes reserve battery, the first voltage stabilizing chip, the second voltage stabilizing chip, first
Capacitor, the second capacitor, first resistor, second resistance, 3rd resistor, the 4th resistance, the 5th resistance, the 6th resistance, the first NPN tri-
Pole pipe, the second NPN triode, the first PMOS tube, the second PMOS tube, switching switch, contact one and contact two；
Power input is connect with the first PMOS tube source electrode, first resistor, first capacitor be connected in parallel to the first PMOS tube source electrode,
Between grid, power input is connect by the first voltage stabilizing chip with 3rd resistor one end, the 3rd resistor other end and the first NPN tri-
The connection of pole pipe base stage, the first NPN triode collector are connect with second resistance one end, the second resistance other end and the first PMOS tube
Grid connection, the drain electrode of the first PMOS tube are connect with contact one；
Reserve battery anode is connect with the second PMOS tube source electrode, and the 4th resistance, the second capacitor are connected in parallel to the second PMOS tube
Between source electrode, grid, reserve battery anode is connect by the second voltage stabilizing chip with the 5th resistance one end, the 5th resistance other end and
The connection of second NPN transistor base, the second NPN triode collector connect with the 6th resistance one end, the 6th resistance other end and
The connection of second PMOS tube grid, the drain electrode of the second PMOS tube are connect with contact two, and switching switch one end and contact one, contact two control
Connection, the switching switch other end and load connect.
Preferably, the signal switching circuit further include the 8th resistance, the 9th resistance, the tenth resistance, voltage comparator and
Third NPN triode, the drain electrode of the first PMOS tube are connect with the 8th resistance one end, the 8th resistance other end and third NPN triode
Collector connection, third NPN triode emitter are connect with reserve battery anode, and the 9th resistance one end and reserve battery anode connect
It connects, the other end is connected by the tenth resistance eutral grounding, the 9th resistance, the common end of the tenth resistance and voltage comparator inverting input terminal
It connects, the external threshold voltage of voltage comparator non-inverting input terminal, voltage comparator output end is connect with third NPN transistor base.
Preferably, the signal switching circuit further includes the 7th resistance and third capacitor, and the 7th resistance one end and power supply are defeated
Entering connection, the 7th resistance other end is connect with the first PMOS tube source electrode, and the 7th resistance other end is also connect with third capacitor one end,
Third capacitor other end ground connection.
Preferably, the signal switching circuit further includes eleventh resistor and light emitting diode, eleventh resistor one end with
The connection of second PMOS tube source electrode, the eleventh resistor other end are connect with light emitting diode anode, light emitting diode cathode ground connection.
Preferably, the signal switching circuit further includes the first breakdown diode and the second breakdown diode, the first breakdown
Diode cathode is connect with the first NPN transistor base, the first breakdown diode plus earth, the second breakdown diode cathode with
The connection of second NPN transistor base, the second breakdown diode plus earth.
Preferably, the model of first voltage stabilizing chip and the second voltage stabilizing chip is LM7812.
The utility model has the beneficial effects that selecting different power supply excitations, and power input for load by switching switch
It is provided with reserve battery and delays electrification circuit structure, make when switching the different power supply of switching to avoid that load is caused to dash forward
So power on the input voltage of caused spike, protection load and each excitation；Voltage comparator and third NPN triode are true
It protects power input to charge to reserve battery, it is ensured that reserve battery electricity is sufficient, further increases the safe and stable property of entire circuit
Energy.
Detailed description of the invention
Fig. 1 is a kind of specific embodiment schematic illustration of the utility model.
Fig. 2 is another specific embodiment schematic illustration of the utility model.
Fig. 3 is another specific embodiment schematic illustration of the utility model.
Appended drawing reference: the first voltage stabilizing chip of U1-, the second voltage stabilizing chip of U2-, U3- voltage comparator, tri- pole the first NPN of Q1-
Pipe, the first PMOS tube of Q2-, the second NPN triode of Q3-, the second PMOS tube of Q4-, Q5- third NPN triode, C1- first capacitor,
The second capacitor of C2-, C3- third capacitor, R1- first resistor, R2- second resistance, R3- 3rd resistor, the 4th resistance of R4-, R5-
Five resistance, the 6th resistance of R6-, the 7th resistance of R7-, the 8th resistance of R8-, the 9th resistance of R9-, the tenth resistance of R10-, R11- the tenth
One resistance, K- switching switch, the contact K1- one, the contact K2- two, E- reserve battery, the breakdown pipe of ZD1- first, ZD2- second puncture
Pipe, LED- light emitting diode, REF- threshold voltage.
Specific embodiment
More detailed description is done to the embodiments of the present invention below in conjunction with attached drawing and appended drawing reference, makes to be familiar with ability
The technology people in domain can implement accordingly after studying this specification carefully.It should be appreciated that specific embodiment described herein is only to solve
The utility model is released, is not used to limit the utility model.
In the description of the present invention, it should be noted that the orientation of the instructions such as term " on ", "horizontal", "inner" or
Positional relationship is to be based on the orientation or positional relationship shown in the drawings, and is merely for convenience of describing the present invention and simplifying the description,
Rather than the device or element of indication or suggestion meaning must have a particular orientation, be constructed and operated in a specific orientation, because
This should not be understood as limiting the present invention.
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " is pacified
Dress ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can
To be mechanical connection, it is also possible to be electrically connected；It can be directly connected, can also can be indirectly connected through an intermediary
Connection inside two elements.For the ordinary skill in the art, above-mentioned term can be understood at this with concrete condition
Concrete meaning in utility model.
Embodiment: referring to attached drawing 1, attached drawing 2, attached a kind of pair shown in Fig. 3 delays the signal switch boards powered on, including signal
Switching circuit, the signal switching circuit include reserve battery E, the first voltage stabilizing chip U1, the second voltage stabilizing chip U2, first capacitor
C1, the second capacitor C2, first resistor R1, second resistance R2,3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance
R6, the first NPN triode Q1, the second NPN triode Q3, the first PMOS tube Q2, the second PMOS tube Q4, switching switch K, contact one
Two K2 of K1 and contact；
Power input is connect with the first PMOS tube Q2 source electrode, and first resistor R1, first capacitor C1 are connected in parallel to the first PMOS
Between pipe Q2 source electrode, grid, power input is connect by the first voltage stabilizing chip U1 with the one end 3rd resistor R3, and 3rd resistor R3 is another
One end is connect with the first NPN triode Q1 base stage, and the first NPN triode Q1 collector is connect with the one end second resistance R2, and second
The resistance R2 other end is connect with the first PMOS tube Q2 grid, and the first PMOS tube Q2 drain electrode is connect with one K1 of contact；
Reserve battery E anode is connect with the second PMOS tube Q4 source electrode, and the 4th resistance R4, the second capacitor C2 are connected in parallel to second
Between PMOS tube Q4 source electrode, grid, reserve battery E anode is connect by the second voltage stabilizing chip U2 with the 5th one end resistance R5, the
The five resistance R5 other ends are connect with the second NPN triode Q3 base stage, the second NPN triode Q3 collector and the 6th one end resistance R6
Connection, the 6th resistance R6 other end are connect with the second PMOS tube Q4 grid, and the second PMOS tube Q4 drain electrode is connect with two K2 of contact, are cut
It changes the one end switch K and one K1 of contact, two K2 of contact control connects, the switching switch K other end and load connect.
It is that load selects different power supply excitations, and power input and reserve battery by switching switch K in the present embodiment
E, which is provided with, delays electrification circuit structure, and switching switch K is made to avoid causing to power on suddenly to load drawing when switching different power supplys
The input voltage of the spike risen, protection load and each excitation.
Specifically, as shown in Fig. 1, when switching switch K is connected to one K1 of contact, i.e. load is connected with power input
When, the input of power input, that is, common alternating current, it is that power input, which passes through after the first voltage stabilizing chip U1 pressure stabilizing through 3rd resistor R3,
One NPN triode Q1 provides conducting electric current, the conducting of the first NPN triode Q1, and the first NPN triode Q1 collector is pulled low, the
One capacitor C1 is discharged by second resistance R2, and the first PMOS tube Q2 grid voltage slowly declines, and delays leading for the first PMOS tube Q2
Logical, making to load resulting voltage will not mutate, and avoid causing to power on caused spike, protection load to load suddenly
And the input voltage of each excitation；
As shown in Fig. 3, when switching switch K is connected to two K2 of contact, i.e., spare when load is connected with reserve battery E
Battery E is by providing conducting electric current through the 5th resistance R5 after the second voltage stabilizing chip U2 pressure stabilizing for the second NPN triode Q3, and second
NPN triode Q3 conducting, the second NPN triode Q3 collector are pulled low, and the second capacitor C2 is discharged by the 6th resistance R6, and second
PMOS tube Q4 grid voltage slowly declines, and delays the conducting of the second PMOS tube Q4, and making to load resulting voltage will not mutate,
Avoid causing to power on suddenly to load the input voltage of caused spike, protection load and each excitation.
The model of first voltage stabilizing chip U1 and the second voltage stabilizing chip U2 are LM7812, and LM7812 is that common pressure stabilizing is integrated
The pressure stabilizing value output of circuit chip component, the model is 12V.
Preferably, the signal switching circuit further includes the 8th resistance R8, the 9th resistance R9, the tenth resistance R10, voltage ratio
It is connect compared with device U3 and third NPN triode Q5, the first PMOS tube Q2 drain electrode with the 8th one end resistance R8, the 8th resistance R8 other end
It is connect with third NPN triode Q5 collector, third NPN triode Q5 emitter is connect with reserve battery E anode, the 9th resistance
The one end R9 is connect with reserve battery E anode, and the other end is grounded by the tenth resistance R10, the 9th resistance R9, the tenth resistance R10
Common end connect with voltage comparator U3 inverting input terminal, the external threshold voltage REF of voltage comparator U3 non-inverting input terminal, electricity
Pressure comparator U3 output end is connect with third NPN triode Q5 base stage.
In another real-time proposals, the 9th resistance R9 and the tenth resistance R10 series connection partial pressure acquire reserve battery E electricity
Voltage value, which transports to voltage comparator U3 inverting input terminal, if collection value is smaller compared with threshold voltage REF, table
Show reserve battery E low battery, voltage comparator U3 exports high level to third NPN triode Q5 base stage, third NPN triode
Q5 conducting, power input are made up of back the first PNMOS pipe Q3, the 8th resistance R8, third NPN triode Q5 and reserve battery E
Road, reserve battery E are electrically charged, if collection value is bigger compared with threshold voltage REF, indicate that reserve battery E electricity is normal, voltage
Comparator U3 exports low level to third NPN triode Q5 base stage, third NPN triode Q5 cut-off, power input, first
PNMOS pipe Q2, the 8th resistance R8, third NPN triode Q5 and reserve battery E can not form circuit, and reserve battery E stopping is filled
Electricity；
Voltage comparator U3 and third NPN triode Q5 ensures that power input charges to reserve battery E, it is ensured that reserve battery
E electricity is sufficient, further increases the safe and stable performance of entire circuit.
Preferably, the signal switching circuit further includes the 7th resistance R7 and third capacitor C3, the 7th one end resistance R7 with
Power input connection, the 7th resistance R7 other end connect with the first PMOS tube Q2 source electrode, the 7th resistance R7 other end also with third
The connection of the one end capacitor C3, third capacitor C3 other end ground connection.
In another real-time proposals, the 7th resistance R7 and third capacitor C3 form filter circuit, make the defeated of power input
Ripple voltage is smooth out, improves the output stability of power input.
Preferably, the signal switching circuit further includes eleventh resistor R11 and Light-emitting diode LED, eleventh resistor
The one end R11 is connect with the second PMOS tube source electrode, and the eleventh resistor R11 other end is connect with Light-emitting diode LED anode, and luminous two
Pole pipe LED cathode ground connection.
In another real-time proposals, when power input is without output, reserve battery E provides excitation for load, and luminous two
Pole pipe LED conducting when reserve battery E provides excitation for load, lamp is bright, and eleventh resistor R11 is current-limiting resistance, and protection shines
Diode (LED), Light-emitting diode LED is as a kind of display device, the power supply situation that staff can be reminded to load at this time.
Preferably, the signal switching circuit further includes the first breakdown diode ZD1 and the second breakdown diode ZD2, the
One breakdown diode ZD1 cathode is connect with the first NPN triode Q1 base stage, and the first breakdown diode ZD1 plus earth, second hits
It wears diode ZD2 cathode to connect with the second NPN triode Q3 base stage, the second breakdown diode ZD2 plus earth.
In another real-time proposals, the first breakdown diode ZD1 can protect the first NPN triode Q1 not hit by big voltage
It wears, the second breakdown diode ZD2 can protect the second NPN triode Q3 by big voltage breakdown, not further increase entire signal and cut
Change stabilization, the safety of circuit.
The above content is the further descriptions made in conjunction with specific preferred embodiment to the utility model, cannot recognize
Determine specific embodiment of the present utility model to be only limited to these instructions.For the common skill of the utility model technical field
For art personnel, the other embodiments obtained in the case where not departing from the technical solution of the utility model be should be included in practical
In novel protection scope.
Claims (6)
1. a kind of pair delays the signal switch boards powered on, it is characterised in that: including signal switching circuit, the signal switching circuit
Including reserve battery, the first voltage stabilizing chip, the second voltage stabilizing chip, first capacitor, the second capacitor, first resistor, second resistance,
Three resistance, the 4th resistance, the 5th resistance, the 6th resistance, the first NPN triode, the second NPN triode, the first PMOS tube, second
PMOS tube, switching switch, contact one and contact two；
Power input is connect with the first PMOS tube source electrode, and first resistor, first capacitor are connected in parallel to the first PMOS tube source electrode, grid
Between, power input is connect by the first voltage stabilizing chip with 3rd resistor one end, the 3rd resistor other end and the first NPN triode
Base stage connection, the first NPN triode collector are connect with second resistance one end, the second resistance other end and the first PMOS tube grid
Connection, the drain electrode of the first PMOS tube are connect with contact one；
Reserve battery anode is connect with the second PMOS tube source electrode, the 4th resistance, the second capacitor be connected in parallel to the second PMOS tube source electrode,
Between grid, reserve battery anode is connect by the second voltage stabilizing chip with the 5th resistance one end, the 5th resistance other end and second
NPN transistor base connection, the second NPN triode collector are connect with the 6th resistance one end, the 6th resistance other end and second
The connection of PMOS tube grid, the drain electrode of the second PMOS tube are connect with contact two, and switching switch one end connects with contact one, the control of contact two
It connects, the switching switch other end and load connect.
2. as described in claim 1 pair delays the signal switch boards powered on, it is characterised in that: the signal switching circuit also wraps
Include the 8th resistance, the 9th resistance, the tenth resistance, voltage comparator and third NPN triode, the drain electrode of the first PMOS tube and the 8th electricity
Hinder one end connection, the 8th resistance other end connect with third NPN triode collector, third NPN triode emitter with it is spare
Anode connection, the 9th resistance one end are connect with reserve battery anode, and the other end passes through the tenth resistance eutral grounding, the 9th electricity
It hinders, the common end of the tenth resistance is connect with voltage comparator inverting input terminal, the external threshold value electricity of voltage comparator non-inverting input terminal
Pressure, voltage comparator output end are connect with third NPN transistor base.
3. as described in claim 1 pair delays the signal switch boards powered on, it is characterised in that: the signal switching circuit also wraps
The 7th resistance and third capacitor are included, the 7th resistance one end is connect with power input, the 7th resistance other end and the first PMOS tube source
Pole connection, the 7th resistance other end are also connect with third capacitor one end, third capacitor other end ground connection.
4. as described in claim 1 pair delays the signal switch boards powered on, it is characterised in that: the signal switching circuit also wraps
Eleventh resistor and light emitting diode are included, eleventh resistor one end is connect with the second PMOS tube source electrode, the eleventh resistor other end
It is connect with light emitting diode anode, light emitting diode cathode ground connection.
5. as described in claim 1 pair delays the signal switch boards powered on, it is characterised in that: the signal switching circuit also wraps
The first breakdown diode and the second breakdown diode are included, the first breakdown diode cathode is connect with the first NPN transistor base, the
One breakdown diode cathode ground connection, the second breakdown diode cathode are connect with the second NPN transistor base, the second breakdown diode
Plus earth.
Delay the signal switch boards powered on 6. as described in claim 1 double, it is characterised in that: first voltage stabilizing chip and the
The model of two voltage stabilizing chips is LM7812.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821737407.2U CN208890476U (en) | 2018-10-25 | 2018-10-25 | A kind of pair delays the signal switch boards powered on |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821737407.2U CN208890476U (en) | 2018-10-25 | 2018-10-25 | A kind of pair delays the signal switch boards powered on |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208890476U true CN208890476U (en) | 2019-05-21 |
Family
ID=66517102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821737407.2U Active CN208890476U (en) | 2018-10-25 | 2018-10-25 | A kind of pair delays the signal switch boards powered on |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208890476U (en) |
-
2018
- 2018-10-25 CN CN201821737407.2U patent/CN208890476U/en active Active
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