CN208724084U - A kind of 12G SDI and HDMI interchanging device - Google Patents
A kind of 12G SDI and HDMI interchanging device Download PDFInfo
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- CN208724084U CN208724084U CN201821377963.3U CN201821377963U CN208724084U CN 208724084 U CN208724084 U CN 208724084U CN 201821377963 U CN201821377963 U CN 201821377963U CN 208724084 U CN208724084 U CN 208724084U
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Abstract
The utility model discloses a kind of 12G SDI and HDMI interchanging device comprising 2.0 input terminal of a HDMI, 2.0 output end of a HDMI, a SDI input terminal, a SDI output end, a fpga chip, 12G SDI driver and 12G SDI balanced device;The fpga chip includes 2.0 receiving module of a HDMI, 2.0 sending module of a HDMI, a 12G SDI receiving module, a 12G SDI sending module, a HDMI turns SDI module, a SDI turns HDMI module, a SDI audio embedding module, a SDI audio de-embedding module and one first data flow final election module, one second data flow final election module and several toggle switch connecting with the first data flow final election module, the second data flow final election module.The utility model realizes that high-speed 12G SDI and HDMI 2.0 mutually turns using FPGA, has high flexibility.
Description
Technical field
The utility model relates to signal conversion art more particularly to a kind of 12G SDI and HDMI interchanging device.
Background technique
Existing interchanging device mainly realizes that 3G-SDI and HDMI 1.0 is mutually converted, for higher resolution (HDMI
2.0) it then cannot achieve with higher transfer rate (12G SDI) mutually conversion.There are no realize that 12G SDI is compiled to solve currently on the market
The special chip of code.The four road 3G-SDI splicing that the SDI information of 4K/60fps uses is realized currently on the market, causes interface mistake
It is more, it is inconvenient for use.The features such as FPGA has semidefinite inhibition and generation, and flexibility is high, and the speed of service is fast, but have 12G sdi signal and
The device of the mutual rotating function of 2.0 signal of HDMI is not realized still on FPGA.
Summary of the invention
The purpose of this utility model is to provide a kind of 12G SDI and HDMI interchanging device.
The technical solution adopted in the utility model is:
A kind of 12G SDI and HDMI interchanging device comprising 2.0 input terminal of a HDMI, 2.0 output end of a HDMI, one
SDI input terminal, a SDI output end, a fpga chip, 12G SDI driver and 12G SDI balanced device;
The fpga chip includes 2.0 receiving module of a HDMI, 2.0 sending module of a HDMI, 12G SDI reception mould
Block, a 12G SDI sending module, a HDMI turns SDI module, a SDI turns HDMI module, a SDI audio embedding module and a SDI
Audio de-embedding module;
2.0 receiving module of HDMI is used to receive the HDMI signal of the 4K resolution ratio from 2.0 input terminal of HDMI,
HDMI turns SDI module for HDMI signal to decode to and be re-encoded as the first sdi signal, SDI audio embedding module for pair
First sdi signal is embedded in audio and exports the second sdi signal, and 12G SDI sending module is for scrambling the second sdi signal
And Parallel transformation be it is serial, 12G SDI driver is for enhancing the second serial sdi signal and be output to SDI output end;
The 12G SDI balanced device is used to carry out signal compensation to the 12G sdi signal of SDI input terminal, and 12G SDI is received
Module is used to carry out compensated 12G sdi signal descrambling and transformation from serial to parallel, SDI turn HDMI module for having descrambled and
Parallel 12G sdi signal is decoded and is encoded to HDMI signal, and SDI audio de-embedding module is used to HDMI signal changing into 4K
The HDMI signal of resolution ratio, 2.0 sending module of HDMI are used to export the HDMI signal of 4K resolution ratio to 2.0 output end of HDMI;
The fpga chip further includes one first data flow final election module, one second data flow final election module and several and institute
State the toggle switch of the first data flow final election module, the connection of the second data flow final election module;The first data flow final election module
Including first input end, the second input terminal and an output end, the first input end and SDI sound of the first data flow final election module
The connection of frequency embedding module, the second input terminal are connect with 12G SDI receiving module, and the first data flow final election module is according to dial-up
The state of switch selects the signal of its first input end or the second input terminal to export and gives 12G SDI sending module;Described second
First input channel of data flow final election module turns HDMI module with SDI audio de-embedding module and SDI respectively and connect, the second input
Channel is connect with HDMI2.0 receiving module, the second data flow final election module according to the state of toggle switch select its first
The signal of input channel or the second input channel, which exports, gives HDMI 2.0 sending module.
Further, the HDMI signal of 4K resolution ratio simultaneous transmission in a manner of parity rows.
Further, SDI audio de-embedding module, which is used to come out the audio de-embedding of SDI blanking zone, changes into AES audio output.
Further, toggle switch is one, and toggle switch connects first data flow final election module the second data of volume simultaneously
Flow final election module.
Further, the utility model further includes DDR chip, and DDR chip is used cooperatively with FPGA.
Further, DDR chip is DDR3 chip.
The utility model uses above technical scheme, and advantage is compared with prior art: 1. due to being able to achieve in the market
HDMI 2.0 is than sparser, so realizing the reception and transmission of HDMI 2.0 with FPGA.2. mutual conversion rate currently on the market
Only support 3G-SDI, HDMI resolution ratio only arrives 2K/60fps.And the utility model is able to achieve high-speed 12G SDI and reaches with resolution ratio
The HDMI 2.0 of 4K/60fps is mutually converted.3. conversion equipment in the market only supports single HDMI to turn SDI or SDI and turn
HDMI can not support simultaneously HDMI and SDI mutually to turn.The utility model can support simultaneously HDMI and SDI mutually to turn, and flexibility is good,
Application field is wide.4. the utility model realizes that high-speed 12G SDI and HDMI 2.0 mutually turns using FPGA, there is high flexibility.
Detailed description of the invention
The utility model is described in further details below in conjunction with the drawings and specific embodiments;
Fig. 1 is a kind of structural schematic diagram of 12G SDI and HDMI interchanging device of the utility model;
Fig. 2 is a kind of 12G SDI of the utility model and the SDI of HDMI interchanging device turns HDMI schematic diagram;
Fig. 3 is a kind of 12G SDI of the utility model and the HDMI of HDMI interchanging device turns SDI schematic diagram.
Specific embodiment
As shown in one of Fig. 1-3, a kind of 12G SDI of the utility model and HDMI interchanging device comprising a HDMI 2.0
Input terminal, 2.0 output end of a HDMI, a SDI input terminal, a SDI output end, a fpga chip, 12G SDI driver and
12G SDI balanced device;
The fpga chip includes 2.0 receiving module of a HDMI, 2.0 sending module of a HDMI, 12G SDI reception mould
Block, a 12G SDI sending module, a HDMI turns SDI module, a SDI turns HDMI module, a SDI audio embedding module and a SDI
Audio de-embedding module;
2.0 receiving module of HDMI is used to receive the HDMI signal of the 4K resolution ratio from 2.0 input terminal of HDMI,
HDMI turns SDI module for HDMI signal to decode to and be re-encoded as the first sdi signal, SDI audio embedding module for pair
First sdi signal is embedded in audio and exports the second sdi signal, and 12G SDI sending module is for scrambling the second sdi signal
And Parallel transformation be it is serial, 12G SDI driver is for enhancing the second serial sdi signal and be output to SDI output end;
The 12G SDI balanced device is used to carry out signal compensation to the 12G sdi signal of SDI input terminal, and 12G SDI connects
It receives module and is used to carry out compensated 12G sdi signal descrambling and transformation from serial to parallel, SDI turns HDMI module for having descrambled
And parallel 12G sdi signal is decoded and is encoded to HDMI signal, SDI audio de-embedding module is for changing into HDMI signal
The HDMI signal of 4K resolution ratio, the HDMI signal that 2.0 sending module of HDMI is used to export 4K resolution ratio are exported to HDMI 2.0
End;
The fpga chip further includes one first data flow final election module, one second data flow final election module and several and institute
State the toggle switch of the first data flow final election module, the connection of the second data flow final election module;The first data flow final election module
Including first input end, the second input terminal and an output end, the first input end and SDI sound of the first data flow final election module
The connection of frequency embedding module, the second input terminal are connect with 12G SDI receiving module, and the first data flow final election module is according to dial-up
The state of switch selects the signal of its first input end or the second input terminal to export and gives 12G SDI sending module;Described second
First input channel of data flow final election module turns HDMI module with SDI audio de-embedding module and SDI respectively and connect, the second input
Channel is connect with HDMI2.0 receiving module, the second data flow final election module according to the state of toggle switch select its first
The signal of input channel or the second input channel, which exports, gives HDMI 2.0 sending module.
Further, the HDMI signal of 4K resolution ratio simultaneous transmission in a manner of parity rows.
Further, SDI audio de-embedding module, which is used to come out the audio de-embedding in SDI noise reduction area, changes into AES audio output.
Further, toggle switch is one, and toggle switch connects first data flow final election module the second data of volume simultaneously
Flow final election module.
Further, the utility model further includes DDR chip, and DDR chip is used cooperatively with FPGA.
Further, DDR chip is DDR3 chip.
The concrete operating principle of the utility model is elaborated below:
As shown in Fig. 2, SDI turns HDMI process: SDI turns HDMI module the 12G from the 12G SDI receiving module
DDR is written in sdi signal, generates HDMI timing according to EIA-CEA-861 standard, and read DDR data according to HDMI timing, generates
The HDMI data of 4K resolution ratio, the wherein data of 4K resolution ratio simultaneous transmission in a manner of parity rows.
As shown in figure 3, HDMI turns SDI process: HDMI turns SDI module will be from the HDMI number of 2.0 receiving module of HDMI
According to write-in DDR, then according to the signal mode of SDI, DDR data are read, generate the SDI data flow for meeting SMPTE standard.
SDI audio embedding module is embedded in the audio data from 2.0 receiving module of HDMI the blanking of the SDI data flow
Area exports 12G sdi signal.
The utility model uses above technical scheme, and advantage is compared with prior art: 1. due to being able to achieve in the market
HDMI 2.0 is than sparser, so realizing the reception and transmission of HDMI 2.0 with FPGA.2. mutual conversion rate currently on the market
Only support 3G-SDI, HDMI resolution ratio only arrives 2K/60fps.And the utility model is able to achieve high-speed 12G SDI and reaches with resolution ratio
The HDMI 2.0 of 4K/60fps is mutually converted.3. conversion equipment in the market only supports single HDMI to turn SDI or SDI and turn
HDMI can not support simultaneously HDMI and SDI mutually to turn.The utility model can support simultaneously HDMI and SDI mutually to turn, and flexibility is good,
Application field is wide.4. the utility model realizes that high-speed 12G SDI and HDMI 2.0 mutually turns using FPGA, there is high flexibility.
Claims (6)
1. a kind of 12G SDI and HDMI interchanging device, it is characterised in that: it includes 2.0 input terminal of a HDMI, a HDMI 2.0
Output end, a SDI input terminal, a SDI output end, a fpga chip, 12G SDI driver and 12G SDI balanced device;
The fpga chip include 2.0 receiving module of a HDMI, 2.0 sending module of a HDMI, a 12G SDI receiving module,
One 12G SDI sending module, a HDMI turn SDI module, a SDI turns HDMI module, a SDI audio embedding module and a SDI sound
Frequency de-embedding module;
2.0 receiving module of HDMI is used to receive the HDMI signal of the 4K resolution ratio from 2.0 input terminal of HDMI, HDMI
Turn SDI module and is used for for HDMI signal to be decoded to and is re-encoded as the first sdi signal, SDI audio embedding module to first
Sdi signal be embedded in audio simultaneously export the second sdi signal, 12G SDI sending module be used for by the second sdi signal carry out scrambling and
Parallel transformation be it is serial, 12G SDI driver is for enhancing the second serial sdi signal and be output to SDI output end;
The 12G SDI balanced device is used to carry out signal compensation to the 12G sdi signal of SDI input terminal, and 12G SDI receives mould
Block is used to carry out compensated 12G sdi signal descrambling and transformation from serial to parallel, and SDI turns HDMI module for having descrambled and simultaneously
Capable 12G sdi signal is decoded and is encoded to HDMI signal, and SDI audio de-embedding module is used to changing into HDMI signal into 4K points
The HDMI signal of resolution, 2.0 sending module of HDMI are used to export the HDMI signal of 4K resolution ratio to 2.0 output end of HDMI;
The fpga chip further includes one first data flow final election module, one second data flow final election module and several with described the
The toggle switch that one data flow final election module, the second data flow final election module connect;The first data flow final election module includes
The first input end of first input end, the second input terminal and an output end, the first data flow final election module adds with SDI audio
Embedding module connection, the second input terminal are connect with 12G SDI receiving module, and the first data flow final election module is according to toggle switch
State select the signal of its first input end or the second input terminal to export to give 12G SDI sending module;Second data
First input channel of stream final election module turns HDMI module with SDI audio de-embedding module and SDI respectively and connect, the second input channel
It is connect with HDMI2.0 receiving module, the second data flow final election module selects its first input according to the state of toggle switch
The signal of channel or the second input channel, which exports, gives HDMI 2.0 sending module.
2. a kind of 12G SDI according to claim 1 and HDMI interchanging device, it is characterised in that: the HDMI of 4K resolution ratio
Signal simultaneous transmission in a manner of parity rows.
3. a kind of 12G SDI according to claim 1 and HDMI interchanging device, it is characterised in that: SDI audio de-embedding module
AES audio output is changed into for coming out the audio de-embedding in SDI noise reduction area.
4. a kind of 12G SDI according to claim 1 and HDMI interchanging device, it is characterised in that: toggle switch is one,
Toggle switch connects first data flow final election module volume the second data flow final election module simultaneously.
5. a kind of 12G SDI according to claim 1 and HDMI interchanging device, it is characterised in that: it further includes DDR core
Piece, DDR chip are used cooperatively with FPGA.
6. a kind of 12G SDI according to claim 5 and HDMI interchanging device, it is characterised in that: DDR chip is DDR3 core
Piece.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110087086A (en) * | 2019-05-07 | 2019-08-02 | 北京流金岁月文化传播股份有限公司 | A kind of device and method for supporting 4K SDI to export |
CN113596373A (en) * | 2021-07-28 | 2021-11-02 | 成都卓元科技有限公司 | 8K video processing architecture for converting 12G-SDI into HDMI2.1 |
-
2018
- 2018-08-24 CN CN201821377963.3U patent/CN208724084U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110087086A (en) * | 2019-05-07 | 2019-08-02 | 北京流金岁月文化传播股份有限公司 | A kind of device and method for supporting 4K SDI to export |
CN113596373A (en) * | 2021-07-28 | 2021-11-02 | 成都卓元科技有限公司 | 8K video processing architecture for converting 12G-SDI into HDMI2.1 |
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