CN208636739U - The precision current source circuit of multiple bit digital control - Google Patents
The precision current source circuit of multiple bit digital control Download PDFInfo
- Publication number
- CN208636739U CN208636739U CN201821529288.1U CN201821529288U CN208636739U CN 208636739 U CN208636739 U CN 208636739U CN 201821529288 U CN201821529288 U CN 201821529288U CN 208636739 U CN208636739 U CN 208636739U
- Authority
- CN
- China
- Prior art keywords
- current source
- unit
- nmos tube
- couples
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
- 238000001514 detection method Methods 0.000 claims abstract description 19
- 238000003491 array Methods 0.000 claims abstract description 17
- 230000008878 coupling Effects 0.000 claims description 14
- 238000010168 coupling process Methods 0.000 claims description 14
- 238000005859 coupling reaction Methods 0.000 claims description 14
- 230000005611 electricity Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
The utility model provides a kind of precision current source circuit of multiple bit digital control, including reference current detection unit, voltage buffer unit, Digital Logic control unit, switch arrays unit and current source array unit, reference current detection unit is used to generate the first bias voltage according to the reference current of reference current source；Voltage buffer unit is used to receive the first bias voltage, meanwhile, buffer voltagc is generated according to the first bias voltage；Digital Logic control unit is used to receive buffer voltagc, meanwhile, digital controlled signal is generated according to buffer voltagc；Switch arrays unit is used to receive digital controlled signal, meanwhile, the on-off signal of control current source array unit is generated according to digital controlled signal；Current source array unit is used to receive and respond current source conduction or the shutdown opened in break signal control current source array unit.Originally practical only to constitute the current source array of cascade structure by increasing a voltage buffer, drastically reduce the area in precision current source.
Description
Technical field
The utility model relates to technical field of circuit design, in particular to a kind of precision current source of multiple bit digital control
Circuit.
Background technique
The current source circuit of multiple bit digital control is widely used in a variety of integrated circuits, such as current mode analog-to-digital conversion
Device, current mode laser driver and various CML electric level interface circuits.
Multi-bit control current source is generally made of Digital Logic control circuit, switch arrays and current source array.One n
Bit Numerical Controlled Current Source block diagram is as shown in Figure 1, every in the output bus control switch array of Digital Logic control circuit open all the way
The on or off of pass, to control the size of current source array output electric current.
Fig. 2 show certain traditional n-bit current source circuit, switch arrays and current source array by NMOS tube reality
It is existing.NMOS tube mn receives reference current irefAnd generate bias voltage Vref.Per all the way comprising 2 in current source arrayiA current source
Unit.I-th (i=0,1 ..., n-1) road current source can produce 2 under the control of Vrefi·irefElectric current.Digital control electricity
Road exports n-bit control code, works as BiWhen (i=0,1 ..., n-1) is logic 1, VbiEqual to digital power voltage DVDD, at this time i-th
Road current source conduction；Work as BiWhen (i=0,1 ..., n-1) is logical zero, VbiEqual to ground level VSS, the i-th road current source is closed at this time
It is disconnected.
The major defect of the implementation method is influenced by channel-length modulation, the output electric current of current source array
Precision is related with output voltage Vout, when Vout and Vref it is unequal when, output electric current then can and design value generate deviation, and
Vout differs bigger with Vref, and the error for exporting electric current will be bigger.The precision for mentioning High Output Current if necessary then needs to increase
Add the channel length of current lens unit, or uses cascade structure current source as shown in Figure 3.And above two improved procedure increases
The big area of chip, and significantly increased with the increase of current source digit n.
Utility model content
The utility model provides a kind of precision current source circuit of multiple bit digital control, solves the problems, such as existing above-mentioned.
To solve the above problems, the utility model embodiment provides a kind of precision current source electricity of multiple bit digital control
Road, comprising:
Reference current detection unit couples reference current source, for being generated according to the reference current of the reference current source
First bias voltage；
Voltage buffer unit couples the reference current detection unit, for receiving the reference current detection unit
First bias voltage, meanwhile, buffer voltagc is generated according to the first bias voltage；
Digital Logic control unit couples the voltage buffer unit, for receiving the buffering of the voltage buffer unit
Voltage, meanwhile, digital controlled signal is generated according to buffer voltagc；
Switch arrays unit couples the Digital Logic control unit, for receiving the Digital Logic control unit
Digital controlled signal, meanwhile, the on-off signal of control current source array unit is generated according to digital controlled signal；And
Current source array unit couples the switch arrays unit and the reference current detection unit, for receiving simultaneously
Respond the current source conduction in the on-off signal control current source array unit of the switch arrays unit or shutdown.
As an implementation, the reference current detection unit includes:
Resistance, including anode and opposite ends, anode couple reference current source output end and the voltage buffer unit it is defeated
Enter end, negative terminal couples the drain terminal of the first NMOS tube and the grid end of the second NMOS tube；
First NMOS tube, drain terminal couple the negative terminal of the resistance, and grid end couples the anode of the resistance and the voltage delays
The input terminal of unit is rushed, source couples the drain terminal of the second NMOS tube；And
Second NMOS tube, leaks the source of disconnected coupling first NMOS tube, and grid end couples the negative terminal of the resistance and described
The grid end of current source in current source array unit, source ground connection.
As an implementation, the switch arrays unit includes 2 index times sub switch, the current source array
Unit includes current source corresponding with the sub switch quantity.
As an implementation, several sub switchs are all made of NMOS tube identical with the first NMOS tube, NMOS tube
Grid end couple the output end of the digital logic unit, leak the output end of the disconnected coupling precision current source circuit, source coupling
Connect current source.
As an implementation, several current sources are all made of NMOS tube identical with the second NMOS tube, NMOS tube
Drain terminal couple sub switch, the grid end of the negative terminal of grid end coupling resistance and the second NMOS tube, source ground connection.
As an implementation, the voltage gain of the voltage buffer unit is 1.
The beneficial effects of the utility model compared with the prior art lie in: compared with traditional more bit current sources, this reality
The current source array of cascade structure is only constituted by increasing a voltage buffer with novel, is drastically reduced accurate
The area of current source.
Detailed description of the invention
Fig. 1 is existing multi-bit control current source block diagram；
Fig. 2 is the circuit diagram of existing multi-bit control current source circuit；
Fig. 3 is the circuit diagram of existing cascade structure current source circuit；
Fig. 4 is the circuit diagram of the precision current source circuit of the utility model multiple bit digital control.
Attached drawing mark: 1, reference current detection unit；2, voltage buffer unit；3, Digital Logic control unit；4, it switchs
Array element；5, current source array unit.
Specific embodiment
Below in conjunction with attached drawing, the above and other technical features and advantages of the present invention are carried out clearly and completely
Description, it is clear that described embodiment is only the section Example of the utility model, rather than whole embodiments.
As shown in figure 4, a kind of precision current source circuit of multiple bit digital control, including reference current detection unit 1, electricity
Buffer cell 2, Digital Logic control unit 3, switch arrays unit 4 and current source array unit 5 are pressed, reference current detection is single
Member 1 couples reference current source, for generating the first bias voltage according to the reference current of reference current source；Voltage buffer unit 2
Reference current detection unit 1 is coupled, for receiving the first bias voltage of reference current detection unit 1, meanwhile, partially according to first
It sets voltage and generates buffer voltagc；Digital Logic control unit 3 couples voltage buffer unit 2, for receiving voltage buffer unit 2
Buffer voltagc, meanwhile, digital controlled signal is generated according to buffer voltagc；Switch arrays unit 4 couples Digital Logic control unit
3, for receiving the digital controlled signal of Digital Logic control unit 3, meanwhile, control current source is generated according to digital controlled signal
The on-off signal of array element 5；Current source array unit 5 couples switch arrays unit 4 and reference current detection unit 1, is used for
Receive the current source conduction in the on-off signal control current source array unit 5 of simultaneously responding to switch array element 4 or shutdown.
Reference current detection unit 1 includes resistance R, the first NMOS tube mnH and the second NMOS tube nmL, the anode of resistance R
The output end of reference current source and the input terminal of voltage buffer unit 2 are coupled, negative terminal couples the drain terminal and the of the first NMOS tube mnH
The grid end of two NMOS tube nmL；The negative terminal of the drain terminal mnH coupling resistance of first NMOS tube, the anode and voltage of grid end coupling resistance
The input terminal of buffer cell 2, source couple the drain terminal of the second NMOS tube nmL；The first NMOS of the disconnected coupling of the leakage of second NMOS tube nmL
The source of pipe mnH, the grid end of current source in the negative terminal and current source array unit 5 of grid end coupling resistance, source ground connection.
Switch arrays unit 4 may include the sub switch of any number.In the present embodiment, switch arrays unit 4 includes
2i sub switchs identical with the first NMOS tube mnH, respectively swi (i=0,1 ..., n-1), grid end couple Digital Logic control
The output end of unit 3 processed, leaks the output end of disconnected coupling n-bit current source, source be respectively coupled in current source array unit 5 with
Its corresponding current source.
Current source array unit 5 includes current source corresponding with sub switch quantity and identical with the second NMOS tube nmL, respectively
For mni (i=0,1 ..., n-1), the source of disconnected coupling sub switch, the negative terminal of grid end coupling resistance, the first NMOS tube mnH are leaked
Drain terminal and the second NMOS tube nmL grid end, source ground connection.
In the present embodiment, the voltage gain of voltage buffer unit 2 is 1.
The working principle of the precision current source circuit of the utility model multiple bit digital control is as follows: according to reference current source
The reference current iref of offer generates the first bias voltage VrH and bias voltage VrL, wherein the first bias voltage VrH passes through electricity
Compression buffer generates buffer voltagc VDDvrH, and VrH is equal with VDDvrH, the electric current in bias voltage VrL and current source array
Source grid end is connected directly；The buffer voltagc VDDvrH of voltage buffer output is the power supply of Digital Logic control unit 3, when number is patrolled
When the output code Bi for collecting control unit 3 is logic ' 1 ', voltage value is equal to VDDvrH；When Bi is logic ' 0 ', voltage value is equal to ground
Level；The output grid end that control switch array neutron switchs respectively of Digital Logic control unit 3, when Bi is logic ' 1 ', the
The road i current source conduction, at this time the grid end voltage of swi, mni ruler equal with the grid end voltage of mnH, mnL and swi, mni respectively
Very little is respectively 2i times of mnH, mnL, therefore swi, mni constitute the current source of cascade structure, and the electric current on the i-th tunnel is accurate 2i
iref；When Bi is logic ' 0 ', the shutdown of the i-th road current source.
The utility model is compared with traditional more bit current sources, and the utility model is only by increasing a voltage buffer
Device constitutes the current source array of cascade structure, drastically reduces the area in precision current source.
Particular embodiments described above has carried out into one the purpose of this utility model, technical scheme and beneficial effects
The detailed description of step, it should be understood that the foregoing is merely specific embodiment of the utility model, be not used to limit this reality
With novel protection scope.Particularly point out, to those skilled in the art, it is all the spirit and principles of the utility model it
Any modification, equivalent substitution, improvement and etc. that are interior, being done, should be included within the scope of protection of this utility model.
Claims (6)
1. a kind of precision current source circuit of multiple bit digital control characterized by comprising
Reference current detection unit couples reference current source, for generating first according to the reference current of the reference current source
Bias voltage；
Voltage buffer unit couples the reference current detection unit, for receiving the first of the reference current detection unit
Bias voltage, meanwhile, buffer voltagc is generated according to the first bias voltage；
Digital Logic control unit couples the voltage buffer unit, for receiving the buffer voltagc of the voltage buffer unit,
Meanwhile digital controlled signal is generated according to buffer voltagc；
Switch arrays unit couples the Digital Logic control unit, for receiving the number of the Digital Logic control unit
Signal is controlled, meanwhile, the on-off signal of control current source array unit is generated according to digital controlled signal；And
Current source array unit couples the switch arrays unit and the reference current detection unit, for receiving and responding
Current source conduction or shutdown in the on-off signal control current source array unit of the switch arrays unit.
2. the precision current source circuit of multiple bit digital control according to claim 1, which is characterized in that the benchmark electricity
Flowing detection unit includes:
Resistance, including anode and opposite ends, anode couple the output end of reference current source and the input terminal of the voltage buffer unit,
Negative terminal couples the drain terminal of the first NMOS tube and the grid end of the second NMOS tube；
First NMOS tube, drain terminal couple the negative terminal of the resistance, and grid end couples the anode and the voltage buffer list of the resistance
The input terminal of member, source couple the drain terminal of the second NMOS tube；And
Second NMOS tube, leaks the source of disconnected coupling first NMOS tube, and grid end couples the negative terminal and the electric current of the resistance
The grid end of current source in the array element of source, source ground connection.
3. the precision current source circuit of multiple bit digital control according to claim 2, which is characterized in that the switch arrays
Column unit includes 2 index times sub switch, and the current source array unit includes electric current corresponding with the sub switch quantity
Source.
4. the precision current source circuit of multiple bit digital control according to claim 3, which is characterized in that several sons
Switch is all made of NMOS tube identical with the first NMOS tube, and the grid end of NMOS tube couples the output end of the digital logic unit,
The output end of the disconnected coupling precision current source circuit of leakage, source couple current source.
5. the precision current source circuit of multiple bit digital control according to claim 3, which is characterized in that several electricity
Stream source is all made of NMOS tube identical with the second NMOS tube, and the drain terminal of NMOS tube couples sub switch, the negative terminal of grid end coupling resistance
With the grid end of the second NMOS tube, source ground connection.
6. the precision current source circuit of the control of multiple bit digital described in any one, feature exist according to claim 1~5
In the voltage gain of the voltage buffer unit is 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821529288.1U CN208636739U (en) | 2018-09-18 | 2018-09-18 | The precision current source circuit of multiple bit digital control |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821529288.1U CN208636739U (en) | 2018-09-18 | 2018-09-18 | The precision current source circuit of multiple bit digital control |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208636739U true CN208636739U (en) | 2019-03-22 |
Family
ID=65744095
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821529288.1U Withdrawn - After Issue CN208636739U (en) | 2018-09-18 | 2018-09-18 | The precision current source circuit of multiple bit digital control |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208636739U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062307A (en) * | 2018-09-18 | 2018-12-21 | 杭州洪芯微电子科技有限公司 | The precision current source circuit of multiple bit digital control |
| CN114067732A (en) * | 2022-01-14 | 2022-02-18 | 南京浣轩半导体有限公司 | LED display driving chip and application |
-
2018
- 2018-09-18 CN CN201821529288.1U patent/CN208636739U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062307A (en) * | 2018-09-18 | 2018-12-21 | 杭州洪芯微电子科技有限公司 | The precision current source circuit of multiple bit digital control |
| CN109062307B (en) * | 2018-09-18 | 2024-01-02 | 杭州洪芯微电子科技有限公司 | Multi-bit digital control accurate current source circuit |
| CN114067732A (en) * | 2022-01-14 | 2022-02-18 | 南京浣轩半导体有限公司 | LED display driving chip and application |
| CN114067732B (en) * | 2022-01-14 | 2022-04-26 | 南京浣轩半导体有限公司 | LED display driving chip and application |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103575964B (en) | A kind of over-current detection circuit of power switch pipe and method | |
| CN100478824C (en) | CMOS reference voltage source with adjustable output voltage | |
| CN109062307A (en) | The precision current source circuit of multiple bit digital control | |
| CN208636739U (en) | The precision current source circuit of multiple bit digital control | |
| CN107517058B (en) | A kind of segmented current steer type DAC and its Background calibration method with calibration function | |
| CN106291062B (en) | A kind of high precision electro current detection circuit | |
| CN101694963B (en) | High-precision low-voltage voltage/current switching circuit | |
| CN104156025A (en) | High-order temperature compensation reference source | |
| CN207992860U (en) | Digital output circuit and industrial control equipment | |
| CN104020339B (en) | A kind of programmable current testing circuit | |
| CN106953622A (en) | A kind of high-frequency clock receiving circuit of programmable regulating common mode electrical level | |
| CN202817742U (en) | Overcurrent protection circuit | |
| CN115397063B (en) | miniLED drive circuit | |
| CN112331245A (en) | Voltage selection circuit suitable for nonvolatile memory | |
| CN201611352U (en) | Test circuit for MOSFET | |
| CN102801421B (en) | Composite comparator | |
| CN103219044A (en) | Readout circuit for non-volatile memory device | |
| CN102545907A (en) | Digital-analogue converter | |
| CN207488874U (en) | Take into account 12 current mirroring circuits of precision and area | |
| CN208623550U (en) | A kind of switching-on and switching-off state detection circuit for ground wire BUCK type Switching Power Supply of floating | |
| CN113922448A (en) | Three-section type single-section lithium battery linear charging circuit with current comparison switching mode | |
| CN103970170B (en) | A kind of constant current loop | |
| CN107863964B (en) | Accurately control the fully differential charge transfer circuit of common mode charge amount | |
| CN206178524U (en) | A high linearity current mirroring circuit for DAC output | |
| CN212381194U (en) | Low-voltage power-on reset circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20190322 Effective date of abandoning: 20240102 |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20190322 Effective date of abandoning: 20240102 |
|
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |