CN208477523U - A kind of arithmetic system and corresponding electronic equipment - Google Patents
A kind of arithmetic system and corresponding electronic equipment Download PDFInfo
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- CN208477523U CN208477523U CN201820808643.2U CN201820808643U CN208477523U CN 208477523 U CN208477523 U CN 208477523U CN 201820808643 U CN201820808643 U CN 201820808643U CN 208477523 U CN208477523 U CN 208477523U
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Abstract
The present disclosure discloses a kind of arithmetic system and corresponding electronic equipments, the arithmetic system includes that the arithmetic system includes operation board circuit and control panel circuit, wherein: the operation board circuit includes two or more arithmetic elements, control panel circuit includes system level chip SOC, and the system level chip SOC and described two or more than two arithmetic elements are respectively provided with data receiver port and data sending port；The data receiver port of the data sending terminal mouth of the system level chip SOC and described two or more than two arithmetic elements is respectively connected with, the data sending terminal mouth of the data receiver port of the system level chip SOC and described two or more than two arithmetic elements is respectively connected with, described connected using UART Universal Asynchronous Receiver Transmitter UART serial bus protocol progress data communication.The disclosure realizes a pair of of the multi-communication mode for carrying out data communication using UART Universal Asynchronous Receiver Transmitter UART serial bus protocol on circuit boards.
Description
Technical field
This disclosure relates to electronic technology field, especially a kind of arithmetic system and corresponding electronic equipment.
Background technique
UART Universal Asynchronous Receiver Transmitter UART serial bus protocol is a kind of agreement most widely used in low rate communication field,
Circuit is simple, at low cost.But it can only be one-to-one communication.But in some special application scenarios, need communication protocol
It can support one-to-many communication, serial ports is just unable to satisfy demand at this time.
Serial bus communication is common mode in single-chip microcontroller use, but due to the limitation of its own characteristic, monolithic
The included UART Universal Asynchronous Receiver Transmitter UART serial bus protocol of machine, which carries out data communication, can only often realize a pair of of serial commu-nication,
It cannot achieve one-to-many communication mode.The existing one-to-many technology of serial communication carries out expansion realization using RS485 bus,
RS485 bus is suitable for the occasion of the one-to-many communication in the distal end such as industry spot, and for near-end communication, using RS485, often big material is small
With both causing to waste, also occupy additional space.In addition, the existing one-to-many communication technology in proximal end does not often support hot plug,
Such as IIC communication etc. causes bus communication mistake often if needing removing device in use to influence the overall situation
Communication.It, can with the interface of hot plug also compatible serial communication simultaneously so for the modularized equipment of one master and multiple slaves
To greatly improve the ease for use of equipment.
Meanwhile it supporting there are many one-to-many communication protocols, such as IIC, RS485 etc..IIC telecommunication circuit is also simple, but
Its communication efficiency is low compared with serial ports, and agreement is also more complicated than serial ports.RS485 telecommunication circuit is also simple, and rate compares serial ports and IIC
Want much higher, transmission range is also far, is suitable for the communication of equipment room.But most chips do not support RS485 directly
Agreement, but need to turn using serial ports RS485 chip, therefore its circuit is more complicated than serial ports, cost is also much higher, uncomfortable plywood grade
Communication.
Utility model content
In order to solve above-mentioned problems of the prior art, the disclosure proposes that a kind of arithmetic system and corresponding electronics are set
It is standby.
According to the one side of the disclosure, propose that the arithmetic system includes operation board circuit and control panel circuit, in which: institute
Stating operation board circuit includes two or more arithmetic elements, and control panel circuit includes system level chip SOC, described system-level
Chip SOC and described two or more than two arithmetic elements are respectively provided with data receiver port and data sending port, the system
The data receiver port of the data sending terminal mouth of irrespective of size chip SOC and described two or more than two arithmetic elements is respectively connected with,
Data communication is carried out using UART Universal Asynchronous Receiver Transmitter UART serial bus protocol；It is characterized in that, the system level chip SOC
The data sending terminal mouth of data receiver port and described two or more than two arithmetic elements is respectively connected with, also using universal asynchronous
Transceiver UART serial bus protocol carries out data communication.
Optionally, the system level chip SOC sends broadcast singal, broadcast to described two or more than two arithmetic elements
Include the unique identification of an arithmetic element in described two or more than two arithmetic elements in signal, it is described two or two with
Upper arithmetic element receives broadcast singal, and described two or more than two arithmetic elements determine whether to ring according to the unique identification
Broadcast singal is answered to send data to system level chip SOC.
Optionally, the unique identification can be arithmetic element address or arithmetic element number.
Optionally, described two or more than two arithmetic elements determine whether response broadcast letter according to the unique identification
Number to system level chip SOC send data specifically: described two or more than two arithmetic elements receive broadcast singal, each
Arithmetic element judges include whether the unique identification is identical with locally-unique mark in broadcast singal；If identical, by transporting
It calculates unit and responds the broadcast singal to system level chip SOC transmission data；If it is different, then arithmetic element does not send number
According to.
Optionally, the external pull-up resistor of data receiver port RXD of the system level chip SOC.
Optionally, it connects one two on described two or more than two arithmetic elements data sending terminal mouth TXD signal wire
Pole pipe, the data sending terminal mouth TXD of the cathode of diode towards arithmetic element.
Optionally, the control panel circuit progress includes the network module being connected with system level chip SOC, storage mould
Block, power module, fan interface module and operation board interface module；Wherein,
The power module is used to power for the control panel circuit；
Program and variable needed for the memory module is used to store the system level chip SOC operation, and storage packet
Include the system file including System startup files；
The network module sends the task obtained by the external network to for connecting external network
The system level chip SOC processing；
The fan interface module realizes the communication between the system level chip SOC and fan for connecting fan；
The external arithmetic plate interface realizes the system level chip SOC and institute for connecting the operation board circuit
State the communication on operation board circuit between the operation chip；
The task that the system level chip SOC is used to transmit the network module generates work number by operation
According to sending the operation chip on the operation board circuit to and calculated, and by operation core described on the operation board circuit
The output result data that piece is calculated feeds back to external network.
Optionally, the arithmetic element is operation chip.
According to the another further aspect of the disclosure, a kind of electronic equipment is proposed, the electronic equipment includes one or more as above
The arithmetic system.
According to the technical solution of the disclosure, by the data-in port in system level chip SOC be arranged pull-up resistor,
The mode of the data-out port setting diode of arithmetic element, introduces broadcast mechanism, realizes in circuit board level using general
A pair of of multi-communication mode of asynchronism transceiver UART serial bus protocol progress data communication.
Detailed description of the invention
Fig. 1 is the arithmetic system structural block diagram according to one embodiment of the disclosure；
Fig. 2 is the one-to-many telecommunication circuit structure chart of improvement serial bus communication according to one embodiment of the disclosure；
Fig. 3 is the structural schematic diagram according to the control panel circuit of one embodiment of the disclosure；
Fig. 4 is the arithmetic system data transmission stream journey schematic diagram according to one embodiment of the disclosure.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
Below with reference to several representative embodiments of the utility model, the principles of the present invention and essence are illustrated in detail
Mind.
Fig. 1 is the arithmetic system structural block diagram according to one embodiment of the disclosure；As shown in Figure 1, arithmetic system includes operation
Plate circuit and control panel circuit, control panel circuit include system level chip SOC, SOC (System on Chip) systems-on-a-chip,
Also referred to as system on chip, it is intended that it is a product, is the integrated circuit for having application-specific target, wherein comprising holonomic system and having
The full content of embedded software.Operation board circuit includes two or more arithmetic elements, and arithmetic element has in fig. 1
4 arithmetic elements, arithmetic element can be operation chip, the operation chip can execute HASH256 algorithm, convolution algorithm or
Related neural network algorithm etc..Operation board circuit, also referred to as calculation power plate, belong to the core calculations plate of electronics.In the electronic device,
Control panel circuit is used to receive external data or order, and then controls the arithmetic element on operation board and carry out certain operations,
Obtain specific operation result.The data port of the system level chip SOC and described two or more than two arithmetic elements
Data port carries out data communication using UART Universal Asynchronous Receiver Transmitter UART serial bus protocol.
UART Universal Asynchronous Receiver Transmitter UART serial bus protocol, which carries out data communication, can only often realize a pair of of serial commu-nication,
It cannot achieve one-to-many communication mode.And will in fig. 1 shown in UART Universal Asynchronous Receiver Transmitter UART is used in arithmetic system
Serial bus protocol carries out data communication, realizes that a system level chip SOC and two or more arithmetic elements are led to
Letter, needs to improve circuit structure, concrete implementation mode is as shown in Figure 2.Fig. 2 is changing according to one embodiment of the disclosure
Into the one-to-many telecommunication circuit structure chart of serial bus communication.In Fig. 2, arithmetic system includes system level chip SOC and n
Arithmetic element, certain system level chip SOC are arranged on control panel circuit, and arithmetic element is arranged on operation board circuit, in Fig. 2
In do not draw, n is positive integer more than or equal to 2.The system level chip SOC and the n arithmetic element are respectively provided with
The data sending terminal mouth TXD and the n of data receiver port RXD and data sending port TXD, the system level chip SOC
The data receiver port RXD of arithmetic element is respectively connected with, and carries out data using UART Universal Asynchronous Receiver Transmitter UART serial bus protocol
Communication.The signal wire of the data sending terminal mouth TXD of the system level chip SOC can direct and the n arithmetic element number
It is connected according to the pin of receiving port RXD, operating mode is that system level chip SOC sends data, and multiple n arithmetic elements are simultaneously
It receives, due to being that system level chip SOC (being equivalent to host Master) sends data, n arithmetic element (phase in such a mode
When receiving data simultaneously in slave Slave), data do not generate conflict, therefore can be serial using UART Universal Asynchronous Receiver Transmitter UART
Bus protocol carries out data communication.
The data receiver port RXD of the system level chip SOC and the data sending terminal mouth TXD of n arithmetic element difference
It needs to improve connection circuit when being connected.On the data sending terminal mouth TXD signal wire of the n arithmetic element (Slave)
It connects a diode, the data sending terminal mouth of the cathode of diode towards arithmetic element (Slave).Because of arithmetic element
(Slave) data sending terminal mouth TXD keeps high level during the free time, when having transmission data, according to universal asynchronous receipts
Device UART serial bus protocol is sent out, the level of data sending terminal mouth TXD is become into a period of time low level, expression will be sent
Data.At this moment, data instance, the data sending terminal of arithmetic element (Slave) 1 will be sent with arithmetic element (Slave) 1 here
Mouth TXD is low level, and the data sending terminal mouth TXD of arithmetic element (Slave) 2 to n is high level, and material is thus formed operations
The data sending terminal mouth TXD of unit (Slave) 2 to n to arithmetic element (Slave) 1 data sending terminal mouth TXD electric current electricity
Road, there are a power supplys to the low impedance path on ground, and arithmetic element (Slave) 1 has high current to flow through at this time, easily burns core
Piece.By increasing data sending terminal mouth TXD diode of the cathode towards arithmetic element (Slave), in arithmetic element (Slave) 1
When sending data and sending data, so that the signal wire of arithmetic element (Slave) 2 to n data sending terminal mouth TXD block, it is real
The effect of protection arithmetic element (Slave) 1 is showed, and the data level that arithmetic element (Slave) 1 is sent is not by it
The interference of his arithmetic element (Slave).Germanium diode preferably is used, because its forward voltage is 0.3V or so, that is, can
It is 0.3V or so when data receiver port RXD signal low level to guarantee system level chip SOC, is lower than 0.7V, it can be correct
Identification.The data receiver port RXD of system level chip SOC wants an external pull-up resistor, and the effect of pull-up resistor is to guarantee system
The default level of the data receiver port RXD signal of irrespective of size chip SOC is high level.If without pull-up resistor, when all fortune
When calculating high level of the cell S lave data sending terminal mouth TXD signal all in default conditions, the data of system level chip SOC are connect
Receiving end mouth RXD signal is in vacant state, does not meet default conditions as defined in UART Universal Asynchronous Receiver Transmitter UART serial bus protocol
For high level.
Data receiver port RXD of the data sending terminal mouth TXD of the n arithmetic element to the system level chip SOC
When sending data, there are many-to-one situations, therefore in order to meet UART Universal Asynchronous Receiver Transmitter UART serial bus protocol, the system
Irrespective of size chip SOC sends broadcast singal to the n arithmetic element, includes unique mark of an arithmetic element in broadcast singal
Know, the unique identification can be arithmetic element address or arithmetic element number etc..The n arithmetic element receives
The broadcast singal, the n arithmetic element determine whether to respond according to the unique identification broadcast singal to system-level core
Piece SOC sends data.When the n arithmetic element receives broadcast singal, each arithmetic element judge include in broadcast singal
Whether the unique identification is identical with locally-unique mark；If identical, illustrate that the arithmetic element can send data, by transporting
It calculates unit and responds the broadcast singal to system level chip SOC transmission data；If it is different, then arithmetic element does not send number
According to.By quoting broadcast mechanism, so that the data sending terminal mouth TXD of the n arithmetic element is to the system level chip SOC's
Data receiver port RXD has met UART Universal Asynchronous Receiver Transmitter UART serial bus protocol when sending data.
Fig. 3 is the structural schematic diagram of the control panel circuit of the utility model embodiment.Specifically, as shown in figure 3, this is practical
The control panel circuit of new embodiment includes system level chip SOC and coupled network module, memory module, power supply
Module, fan interface module and operation board interface module.
Wherein, the power module is used to power for the control panel circuit；The memory module is for storing the system
Program and variable needed for irrespective of size chip SOC operation, and store the system file including System startup files；The net
Network module gives the system for connecting external network, and by the task or data transmission that obtain by the external network
Grade chip SOC processing；The fan interface module is realized between the system level chip SOC and fan for connecting fan
Communication；The external arithmetic plate interface realizes the system level chip SOC and n operation for connecting external arithmetic plate
Communication between unit；The task or data that the system level chip SOC is used to transmit the network module are by fortune
It calculates and generates operational data, n arithmetic element in external arithmetic plate is sent to by external arithmetic plate interface and is calculated, and will
The output result data that n arithmetic element on the external arithmetic plate is calculated feeds back to external network.
Below in conjunction with attached drawing 4, the arithmetic system data transmission stream journey of the utility model is illustrated.
Step 1: task or data transmission that the network module of control panel circuit is obtained by external network are to system
Grade chip SOC processing；
Step 2: task that system level chip SOC will acquire by external arithmetic plate interface by the forms of broadcasting or
Data are sent to two or more arithmetic elements on external arithmetic plate.
Step 3: two or more arithmetic elements on operation board are carried out according to the task or data of acquisition
It calculates.
Step 4: system level chip SOC is sent by external arithmetic plate interface to two or more arithmetic elements
Broadcast singal includes the unique identification of an arithmetic element in broadcast singal.
Step 5: two or more arithmetic elements receive the broadcast singal, each arithmetic element judgement is wide
Broadcast in signal includes whether the unique identification is identical with locally-unique mark；If identical, certainly to system level chip SOC feedback
Oneself operation result, implementing result or intermediate data etc.；If it is different, then arithmetic element does not send data.
Step 6: result or data of the system level chip SOC according to feedback, perform the next step operation, and such as: to network
Operation result, implementing result are returned, or sends broadcast singal to two or more arithmetic elements, continues to obtain operation
Operation result, implementing result or the intermediate data of unit.
According to another aspect of the present disclosure, it is also proposed that a kind of electronic equipment, the electronic equipment include it is one or more such as
The upper arithmetic system.
Particular embodiments described above has carried out further in detail the purpose of the disclosure, technical scheme and beneficial effects
Describe in detail it is bright, it is all it should be understood that be not limited to the disclosure the foregoing is merely the specific embodiment of the disclosure
Within the spirit and principle of the disclosure, any modification, equivalent substitution, improvement and etc. done should be included in the guarantor of the disclosure
Within the scope of shield.
Claims (9)
1. a kind of arithmetic system, including operation board circuit and control panel circuit, in which:
The operation board circuit includes two or more arithmetic elements, and control panel circuit includes system level chip SOC, described
System level chip SOC and described two or more than two arithmetic elements are respectively provided with data receiver port and data sending port,
The data receiver port of the data sending terminal mouth of the system level chip SOC and described two or more than two arithmetic elements difference
It is connected, data communication is carried out using UART Universal Asynchronous Receiver Transmitter UART serial bus protocol；It is characterized in that, the system level chip
The data sending terminal mouth of the data receiver port of SOC and described two or more than two arithmetic elements is respectively connected with, also using logical
Data communication is carried out with asynchronism transceiver UART serial bus protocol.
2. arithmetic system according to claim 1, which is characterized in that the system level chip SOC is to described two or two
A above arithmetic element sends broadcast singal, includes an operation in described two or more than two arithmetic elements in broadcast singal
The unique identification of unit, described two or more than two arithmetic elements receive broadcast singal, described two or more than two operations
Unit determines whether that responding broadcast singal sends data to system level chip SOC according to the unique identification.
3. arithmetic system according to claim 2, which is characterized in that the unique identification can be arithmetic element address,
Or arithmetic element number.
4. arithmetic system according to claim 2, which is characterized in that described two or more than two arithmetic elements are according to institute
Unique identification is stated to determine whether to respond broadcast singal to system level chip SOC and send data specifically:
Described two or more than two arithmetic elements receive broadcast singal, and each arithmetic element judges to include institute in broadcast singal
Whether identical with locally-unique mark state unique identification；If identical, the broadcast singal is responded to described from arithmetic element
System level chip SOC sends data；If it is different, then arithmetic element does not send data.
5. arithmetic system according to claim 1, which is characterized in that the data receiver port of the system level chip SOC
The external pull-up resistor of RXD.
6. arithmetic system according to claim 1, which is characterized in that the data of described two or more than two arithmetic elements
It connects on sending port TXD signal wire a diode, the data sending terminal mouth TXD of the cathode of diode towards arithmetic element.
7. arithmetic system according to claim 1, which is characterized in that the control panel circuit progress includes and system-level core
Network module, memory module, power module, fan interface module and the operation board interface module that piece SOC is connected；Wherein,
The power module is used to power for the control panel circuit；
Program and variable needed for the memory module is used to store the system level chip SOC operation, and storage includes being
System file including system startup file；
The network module is for connecting external network, and described in the task obtained by the external network sent to
System level chip SOC processing；
The fan interface module realizes the communication between the system level chip SOC and fan for connecting fan；
The external arithmetic plate interface realizes the system level chip SOC and the fortune for connecting the operation board circuit
Calculate the communication on plate circuit between the arithmetic element；
The task that the system level chip SOC is used to transmit the network module generates operational data by operation, passes
It gives the arithmetic element on the operation board circuit to be calculated, and arithmetic element described on the operation board circuit is calculated
Obtained output result data feeds back to external network.
8. arithmetic system according to any one of claims 1 to 7, which is characterized in that the arithmetic element is operation chip.
9. a kind of electronic equipment, which is characterized in that the electronic equipment includes one or more claims 1 to 8 as described above
The arithmetic system of any one.
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| CN201820808643.2U CN208477523U (en) | 2018-05-28 | 2018-05-28 | A kind of arithmetic system and corresponding electronic equipment |
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| CN201820808643.2U CN208477523U (en) | 2018-05-28 | 2018-05-28 | A kind of arithmetic system and corresponding electronic equipment |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108647180A (en) * | 2018-05-28 | 2018-10-12 | 北京比特大陆科技有限公司 | A kind of arithmetic system and corresponding electronic equipment |
| CN110333766A (en) * | 2019-04-26 | 2019-10-15 | 深圳市致宸信息科技有限公司 | It is a kind of that method and devices that calculating power plate are controlled based on single channel power supply more |
| CN112084131A (en) * | 2020-09-11 | 2020-12-15 | 深圳比特微电子科技有限公司 | Computing device and computing system for digital currency |
| CN112860620A (en) * | 2019-11-28 | 2021-05-28 | 科大国盾量子技术股份有限公司 | SOC (system on chip) framework chip for QKD (quantum key distribution) system |
-
2018
- 2018-05-28 CN CN201820808643.2U patent/CN208477523U/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108647180A (en) * | 2018-05-28 | 2018-10-12 | 北京比特大陆科技有限公司 | A kind of arithmetic system and corresponding electronic equipment |
| CN108647180B (en) * | 2018-05-28 | 2024-02-06 | 北京比特大陆科技有限公司 | Operation system and corresponding electronic equipment |
| CN110333766A (en) * | 2019-04-26 | 2019-10-15 | 深圳市致宸信息科技有限公司 | It is a kind of that method and devices that calculating power plate are controlled based on single channel power supply more |
| CN112860620A (en) * | 2019-11-28 | 2021-05-28 | 科大国盾量子技术股份有限公司 | SOC (system on chip) framework chip for QKD (quantum key distribution) system |
| CN112860620B (en) * | 2019-11-28 | 2024-04-26 | 科大国盾量子技术股份有限公司 | SOC framework chip for QKD system |
| CN112084131A (en) * | 2020-09-11 | 2020-12-15 | 深圳比特微电子科技有限公司 | Computing device and computing system for digital currency |
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