CN208188714U - A kind of low voltage reference circuit - Google Patents
A kind of low voltage reference circuit Download PDFInfo
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- CN208188714U CN208188714U CN201820824217.8U CN201820824217U CN208188714U CN 208188714 U CN208188714 U CN 208188714U CN 201820824217 U CN201820824217 U CN 201820824217U CN 208188714 U CN208188714 U CN 208188714U
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Abstract
The utility model discloses a kind of low voltage reference circuits, comprising: a start-up circuit, for completing the starting of the reference circuit；One PTC circuit is connected, for generating bias current with the start-up circuit；One reference generating circuit has selected a kind of dynamic threshold MOS transistor, has further decreased the threshold voltage of transistor, obtained smaller silicon area and lower reference voltage.A kind of low voltage reference circuit of the utility model replaces voltage differential amplifier using current differential amplifier, does not use resistor, low in energy consumption, the reference voltage of generation is small.
Description
Technical field
The present invention relates to reference circuit more particularly to a kind of low voltage reference circuits.
Background technique
In the application of Internet of Things and most of wireless telecommunications, associated receiver circuitry or transmit circuit etc. are all that needs are low
Power consumption, therefore the reference circuit that can generate low-power consumption is very crucial and very necessary for entire application.Benchmark electricity
Pith of the road as analog circuit is generally required and is worked normally in a wider temperature range, therefore do not require nothing more than
It is low in energy consumption, it is also necessary to which that performance is stablized, and has preferable temperature characterisitic.Traditional mode can be set using band-gap reference circuit
Meter, but its power consumption is relatively large, and needs to use resistance and triode, causes chip area larger.
Summary of the invention
To overcome the above-mentioned problems of the prior art, the main purpose of the present invention is to provide a kind of low voltage reference electricity
Road replaces voltage differential amplifier using current differential amplifier, does not use resistance, low in energy consumption, the reference voltage of generation is small.
In view of the above and other objects, the present invention provides a kind of low voltage reference circuit, include at least:
One start-up circuit, for completing the starting of the reference circuit；One PTC circuit, with the start-up circuit
It is connected, for generating bias current；One reference generating circuit has selected a kind of dynamic threshold MOS transistor, has further decreased
The threshold voltage of transistor obtains smaller silicon area and lower reference voltage.
The invention proposes a kind of low voltage reference circuits, comprising:
The start-up circuit is made of first capacitor C1, the first NMOS tube NM1 and the second NMOS tube NM2；The one of capacitor C1
End is connected with supply voltage VDD；The other end of capacitor C1 is connected with the grid of the drain electrode of NM1 pipe and NM2 pipe；NM1 pipe
The source electrode of source electrode and NM2 pipe is all grounded.
The positive temperature coefficient reference circuit is by first resistor R1, the first PMOS tube PM1, the second PMOS tube PM2, third
NMOS tube NM3 and the 4th NMOS tube NM4 is constituted；The source electrode of PM1 pipe and the source electrode of PM2 pipe are all connected with supply voltage VDD；
The grid of PM1 pipe is connected with the grid of PM2 pipe, the drain electrode of PM2 pipe, the drain electrode of NM2 pipe and the drain electrode of NM4 pipe；The leakage of PM1 pipe
Pole is connected with the drain electrode of the grid of NM1 pipe, the grid of NM3 pipe, the grid of NM4 pipe and NM3 pipe；The source electrode and resistance of NM4 pipe
One end of R1 is connected；The other end of resistance R1 and the source electrode ground connection of NM3 pipe.
The reference generating circuit is by third PMOS tube PM3, the 4th PMOS tube PM4, the 5th PMOS tube PM5, the 6th PMOS
Pipe PM6, the 7th PMOS tube PM7, the 5th NMOS tube NM5, the 6th NMOS tube NM6, the 7th NMOS tube NM7, the 8th NMOS tube NM8 and
9th NMOS tube NM9 is constituted；The source electrode of the source electrode of PM3 pipe, the source electrode of PM4 pipe and PM5 pipe is all connected with supply voltage VDD；
The grid of the grid of PM3 pipe, the grid of PM4 pipe and PM5 pipe is all connected with the drain electrode of NM2 pipe；The drain electrode of PM3 pipe and NM5 are managed
Drain electrode, the grid of NM5 pipe, the grid of NM6 pipe, PM6 pipe source electrode be connected with the drain electrode of PM6 pipe；The drain electrode of PM4 pipe with
The drain electrode of NM6 pipe, the drain electrode of NM7 pipe, the grid of NM7 pipe, the grid of NM8 pipe, PM7 pipe source electrode be connected with the drain electrode of PM7 pipe
It connects；The drain electrode of PM5 pipe is connected with the grid of the drain electrode of NM8 pipe, the drain electrode of NM9 pipe and NM9 pipe, and node is as reference voltage
The output end of VREF；The source electrode of NM5 pipe, the grid of PM6 pipe, the substrate of PM6 pipe, the source electrode of NM6 pipe, the source electrode of NM7 pipe, PM7
The grid of pipe, the substrate of PM7 pipe, the source electrode of NM8 pipe and NM9 pipe source electrode be all grounded.
Detailed description of the invention
The attached drawing constituted part of this application is used to provide further understanding of the present invention, schematic reality of the invention
It applies example and its explanation is used to explain the present invention, do not constitute improper limitations of the present invention.In the accompanying drawings:
Fig. 1 is a kind of low voltage reference circuit diagram of the present invention；
Fig. 2 is a kind of low voltage reference circuit PM6 pipe of the present invention, PM7 pipe cross-sectional view.
Specific embodiment
As shown in connection with fig. 1, in the following embodiments, a kind of low voltage reference circuit a, comprising: start-up circuit is used
In the starting for completing the reference circuit；One PTC circuit is connected, for generating biased electrical with the start-up circuit
Stream；One reference generating circuit has selected a kind of dynamic threshold MOS transistor, further decreases the threshold voltage of transistor, obtains
Smaller silicon area and lower reference voltage.
The start-up circuit is made of first capacitor C1, the first NMOS tube NM1 and the second NMOS tube NM2；The one of capacitor C1
End is connect with supply voltage VDD, and when the moment powered on, supply voltage VDD is a high voltage, and capacitor C1 both end voltage will not dash forward
Become, so the grid of NM2 pipe is also a high voltage, the conducting of NM2 pipe drags down PM1 pipe and PM3 tube grid voltage, positive temperature is connected
Coefficient circuit and reference generating circuit；When entire circuit stability works and exports stable reference voltage, the conducting of NM1 pipe is drawn
The grid voltage of low NM2 pipe, cut-off NM2 pipe, to just complete the starting of entire circuit.
The positive temperature coefficient reference circuit is by first resistor R1, the first PMOS tube PM1, the second PMOS tube PM2, third
NMOS tube NM3 and the 4th NMOS tube NM4 is constituted；Threshold difference and electricity of the NM4 pipe work between sub-threshold region, NM3 pipe and NM4 pipe
Resistance R1 has codetermined the size of the branch current, and in circuit design, which generally passes through resistance R1 and adjust.NM4 pipe mirror
As the electric current of duplication NM3 pipe, PM1 pipe and the electric current of image copying PM2 pipe, therefore two branch currents mutually mirror and stablize
On one fixed current value.
Reference generating circuit is by third PMOS tube PM3, the 4th PMOS tube PM4, the 5th PMOS tube PM5, the 6th PMOS tube
PM6, the 7th PMOS tube PM7, the 5th NMOS tube NM5, the 6th NMOS tube NM6, the 7th NMOS tube NM7, the 8th NMOS tube NM8 and
Nine NMOS tube NM9 are constituted；Since using resistor, required gain is not obtained by transistor size ratio, wherein NM5
Pipe, NM6 pipe, NM7 pipe and NM8 pipe form a current differential amplifier, and NM9 pipe is as payload；PM6 pipe and PM7 pipe are
Dynamic threshold MOS transistor, as shown in connection with fig. 2, transistor gate is connected with substrate, and operation is similar to weak inversion PMOS tube,
Compared to traditional diode typical structure, dynamic threshold metal-oxide-semiconductor silicon area is smaller, and reference voltage is lower, and steady-state current is lower.
Final reference voltage has the current branch of PM5 to generate, the electric current in the branch some flowed to by NM8
Ground, the gate source voltage of final NM9 pipe are exactly benchmark caused by circuit.
The invention proposes a kind of low voltage reference circuit, which uses 0.18 μm of technological design, to temperature and power supply electricity
Bucklingization is insensitive, works under 0.8V supply voltage, and in -25 DEG C to 105 DEG C temperature ranges, the variation of reference voltage is only
1.5mV, wastage in bulk or weight electric current are 15uA；Voltage differential amplifier is replaced using current differential amplifier, does not use resistance, power consumption
Low, the reference voltage of generation is small.
Although the present invention is illustrated using specific embodiment, the explanation of embodiment is not intended to limit of the invention
Range.One skilled in the art is by reference to explanation of the invention, without departing substantially from the spirit and scope of the present invention
In the case of, it is easy to carry out various modifications or embodiment can be combined, these also should be regarded as protection scope of the present invention.
Claims (4)
1. a kind of low voltage reference circuit characterized by comprising
One start-up circuit, for completing the starting of the reference circuit；One PTC circuit is connected with the start-up circuit
It connects, for generating bias current；One reference generating circuit has selected a kind of dynamic threshold MOS transistor, has further decreased crystal
The threshold voltage of pipe obtains smaller silicon area and lower reference voltage.
2. a kind of low voltage reference circuit as described in claim 1, it is characterised in that: the start-up circuit by first capacitor C1,
First NMOS tube NM1 and the second NMOS tube NM2 is constituted；One end of capacitor C1 is connected with supply voltage VDD；Capacitor C1's is another
The grid of drain electrode and NM2 pipe with NM1 pipe is held to be connected；The source electrode of NM1 pipe and the source electrode of NM2 pipe are all grounded.
3. a kind of low voltage reference circuit as described in claim 1, it is characterised in that: the positive temperature coefficient reference circuit is by the
One resistance R1, the first PMOS tube PM1, the second PMOS tube PM2, third NMOS tube NM3 and the 4th NMOS tube NM4 are constituted；PM1 pipe
The source electrode of source electrode and PM2 pipe is all connected with supply voltage VDD；The drain electrode of the grid, PM2 pipe of the grid and PM2 pipe of PM1 pipe,
The drain electrode of NM2 pipe is connected with the drain electrode of NM4 pipe；PM1 pipe drain electrode with the grid of NM1 pipe, the grid of NM3 pipe, NM4 pipe grid
Pole is connected with the drain electrode of NM3 pipe；The source electrode of NM4 pipe is connected with one end of resistance R1；The other end of resistance R1 and NM3 pipe
Source electrode ground connection.
4. a kind of low voltage reference circuit as claimed in claim 3, it is characterised in that: the reference generating circuit is by the 3rd PMOS
Pipe PM3, the 4th PMOS tube PM4, the 5th PMOS tube PM5, the 6th PMOS tube PM6, the 7th PMOS tube PM7, the 5th NMOS tube NM5,
6th NMOS tube NM6, the 7th NMOS tube NM7, the 8th NMOS tube NM8 and the 9th NMOS tube NM9 are constituted；Source electrode, the PM4 of PM3 pipe
The source electrode of pipe and the source electrode of PM5 pipe are all connected with supply voltage VDD；The grid of the grid of PM3 pipe, the grid of PM4 pipe and PM5 pipe
Pole is all connected with the drain electrode of NM2 pipe；PM3 pipe drain electrode with the drain electrode of NM5 pipe, the grid of NM5 pipe, NM6 pipe grid, PM6
The source electrode of pipe is connected with the drain electrode of PM6 pipe；PM4 pipe drain electrode with the drain electrode of NM6 pipe, the drain electrode of NM7 pipe, NM7 pipe grid,
The grid of NM8 pipe, the source electrode of PM7 pipe are connected with the drain electrode of PM7 pipe；The drain electrode of PM5 pipe and the drain electrode of NM8 pipe, the leakage of NM9 pipe
Pole is connected with the grid of NM9 pipe, output end of the node as reference voltage VREF；The source electrode of NM5 pipe, PM6 pipe grid,
The substrate of PM6 pipe, the source electrode of NM6 pipe, the source electrode of NM7 pipe, the grid of PM7 pipe, the substrate of PM7 pipe, NM8 pipe source electrode and NM9
The source electrode of pipe is all grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820824217.8U CN208188714U (en) | 2018-05-30 | 2018-05-30 | A kind of low voltage reference circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820824217.8U CN208188714U (en) | 2018-05-30 | 2018-05-30 | A kind of low voltage reference circuit |
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| Publication Number | Publication Date |
|---|---|
| CN208188714U true CN208188714U (en) | 2018-12-04 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820824217.8U Active CN208188714U (en) | 2018-05-30 | 2018-05-30 | A kind of low voltage reference circuit |
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| CN (1) | CN208188714U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108445954A (en) * | 2018-05-30 | 2018-08-24 | 丹阳恒芯电子有限公司 | A kind of low voltage reference circuit |
| CN110011526A (en) * | 2019-04-22 | 2019-07-12 | 西安拓尔微电子有限责任公司 | It is a kind of that circuit is protected based on the voltage-controlled UVLO applied to EA circuit |
-
2018
- 2018-05-30 CN CN201820824217.8U patent/CN208188714U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108445954A (en) * | 2018-05-30 | 2018-08-24 | 丹阳恒芯电子有限公司 | A kind of low voltage reference circuit |
| CN110011526A (en) * | 2019-04-22 | 2019-07-12 | 西安拓尔微电子有限责任公司 | It is a kind of that circuit is protected based on the voltage-controlled UVLO applied to EA circuit |
| CN110011526B (en) * | 2019-04-22 | 2024-03-12 | 拓尔微电子股份有限公司 | Voltage control-based UVLO protection circuit applied to EA circuit |
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