CN207967911U - The decompression delay controller of omnipotent breaker - Google Patents
The decompression delay controller of omnipotent breaker Download PDFInfo
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- CN207967911U CN207967911U CN201820105817.9U CN201820105817U CN207967911U CN 207967911 U CN207967911 U CN 207967911U CN 201820105817 U CN201820105817 U CN 201820105817U CN 207967911 U CN207967911 U CN 207967911U
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Abstract
A kind of decompression delay controller of omnipotent breaker, including power circuit, delay circuit and device for under-voltage releasing equipment, the input terminal of the delay circuit is connected with the output end of power circuit, the output end of the delay circuit is connected with device for under-voltage releasing equipment, delay circuit includes power supply circuit, charging control circuit, capacitor energy storage circuit and capacitor discharging circuit, the power supply circuit is used to power for device for under-voltage releasing equipment, the charging control circuit is connected with the output end of power circuit and capacitor energy storage circuit is turned on and off capacitor energy storage circuit charging for controlling, the capacitor discharging circuit is connected with capacitor energy storage circuit and device for under-voltage releasing equipment for making device for under-voltage releasing equipment delayed releasing to device for under-voltage releasing equipment power supply.The utility model is separately designed by charging control circuit and capacitor discharging circuit, by the charge circuit of delay circuit with discharge loop, so as to shorten the charging time, extends discharge time, is avoided charge circuit and is shared resistance with discharge loop.
Description
Technical field
The utility model is related to Low Voltage Electrical Apparatus, the decompression delay controller of especially a kind of omnipotent breaker.
Background technology
Omnipotent breaker be suitable for exchange 50Hz, rated operational voltage to AC690V, rated operational current to 6300A and
In distribution network below, for distribute electric energy and protection circuit and power-supply device from overload, under-voltage, short circuit, single-phase connect
The harm of the failures such as ground, the breaker have the function of intelligent protection, and selective protection is accurate, can improve power supply reliability, keep away
Exempt from unnecessary power failure.It can be delayed after under-voltage delayed releasing device power-off inside omnipotent breaker, avoid device for under-voltage releasing equipment frequency
Numerous action, it is easily operated because its is simple in structure, it is of low cost, it is applied to the fields such as delay protection more and more widely.
However, the shortcomings that existing delay circuit is also evident from, the charging and discharging circuit of delay circuit shares resistance first, no
Charge and discharge time, followed by the capacitance charging current poor controllability of delay circuit can individually be controlled, larger dash current is by shadow
The capacitance service life is rung, there are overcurrent, there are overvoltage at charge and discharge capacitance both ends can at the rectifier diode both ends of last delay circuit
Energy property, causes the reliability of delay circuit poor.
Utility model content
The purpose of the utility model is to overcome the defect of the prior art, provide it is a kind of it is simple in structure, reliability is high, efficient
The decompression delay controller of the omnipotent breaker of optimization.
To achieve the above object, the utility model uses following technical solution：
A kind of decompression delay controller of omnipotent breaker, including power circuit 1, delay circuit 2 and device for under-voltage releasing equipment
3, the input terminal of the power circuit 1 is connected with mains supply, and the input terminal of the delay circuit 2 is defeated with power circuit 1
Outlet is connected, and the output end of the delay circuit 2 is connected with device for under-voltage releasing equipment 3, delay circuit 2 include power supply circuit 21,
Charging control circuit 22, capacitor energy storage circuit 23 and capacitor discharging circuit 24, the input terminal and output end of the power supply circuit 21
It is connected with power circuit 1 and device for under-voltage releasing equipment 3 respectively for powering for device for under-voltage releasing equipment 3, the charging control circuit 22
Input terminal and output end are connected respectively with the input terminal of the output end of power circuit 1 and capacitor energy storage circuit 23 for control pair
What capacitor energy storage circuit 23 charged is turned on and off, and the input terminal and output end of the capacitor discharging circuit 24 are stored up with capacitance respectively
Energy circuit 23 is connected with device for under-voltage releasing equipment 3 for making 3 delayed releasing of device for under-voltage releasing equipment to the power supply of device for under-voltage releasing equipment 3.
Preferably, the charging control circuit 22 includes NMOS tube Q1 and zener diode Z1, the NMOS tube Q1's
Grid is connected with the cathode of zener diode Z1, and the drain electrode of NMOS tube Q1 is connected with power circuit 1 and power supply circuit 21,
The source electrode of NMOS tube Q1 is connected with capacitor energy storage circuit 23, the plus earth of the zener diode Z1.
Preferably, the charging control circuit 22 further includes polar capacitor C2 and resistance R1, the polar capacitor C2's
Anode is connected with the drain electrode of NMOS tube Q1, the cathode ground connection of polar capacitor C2, one end and the polar capacitor C2 of the resistance R1
Anode be connected, the other end of resistance R1 is connected with the cathode of zener diode Z1.
Preferably, the capacitor energy storage circuit 23 includes resistance R3, polar capacitor C1, polar capacitor C3 and polar capacitor
One end of C4, the resistance R3 are connected with charging control circuit 22, the other end of resistance R3 and the positive phase of polar capacitor C1
The anode of connection, the polar capacitor C3 is connected with the anode of polar capacitor C1, the polar capacitor C4 it is positive respectively with
The anode of polar capacitor C3 is connected with capacitor discharging circuit 24, and the cathode of the cathode of polar capacitor C1, polar capacitor C3
It is grounded with the cathode of polar capacitor C4.
Preferably, the capacitor discharging circuit 24 includes one end and the electricity of diode D6 and resistance R2, the resistance R2
The anode for holding the polar capacitor C4 of accumulator 23 is connected, and the other end of resistance R2 is connected with the anode of diode D6, institute
The cathode of the diode D6 stated is connected with power supply circuit 21 and device for under-voltage releasing equipment 3 respectively.
Preferably, the power circuit 1 includes transformer T1, varistor RV107 and rectifier bridge, the transformer T1
First winding be connected with mains supply, the secondary winding of the transformer T1 is connected with the input terminal of rectifier bridge, described
The output end of rectifier bridge and delay circuit 2, the varistor RV107 are connected in parallel on the both ends of the secondary winding of transformer T1.
Preferably, the rectifier bridge be sequentially connected in series by diode D1, diode D2, diode D3 and diode D4 and
At single phase bridge type rectifier circu, the first pin of rectifier bridge and the third pin of rectifier bridge respectively with transformer T1 it is secondary around
The both ends of group are connected, the second pin ground connection of rectifier bridge, the charging control circuit of the 4th pin and delay circuit 2 of rectifier bridge
22 are connected, and the both ends of the varistor RV107 are connected with the third pin of the first pin of rectifier bridge and rectifier bridge respectively
It connects.
Preferably, the leading-in end of the device for under-voltage releasing equipment 3 including electromagnetic coil J2, the electromagnetic coil J2 respectively with power supply
Circuit 21 is connected with capacitor discharging circuit 24, the exit ground connection of electromagnetic coil J2.
Preferably, the resistance value of the resistance R2 of the capacitor discharging circuit 24 is more than the resistance of the resistance R3 of charging control circuit 22
Value.
The decompression delay controller of the omnipotent breaker of the utility model is discharged electric by charging control circuit and capacitance
The charge circuit of delay circuit is separately designed with discharge loop, so as to shorten the charging time, extends discharge time, keep away by road
Exempt from charge circuit and shares resistance with discharge loop, meanwhile, it is had effectively achieved to capacitive energy storage electricity by charging control circuit
The charging on road is opened and the controllability of charging current, it is therefore prevented that the case where capacitor energy storage circuit is charged simultaneously with power supply, to prolong
It has grown the service life of the capacity cell of capacitor energy storage circuit and ensure that the reliability of delay circuit.In addition, by transformer T1
Secondary winding side increase varistor RV107, with nonlinear wind vibration and have the work(of transient suppression overvoltage using it
Can, prevent surge voltage from leading to rectifier bridge overcurrent, to avoid surge voltage from causing to damage to the capacitor energy storage circuit of delay circuit
Evil.
Description of the drawings
Fig. 1 is the functional structure block diagram of the utility model；
Fig. 2 is the schematic diagram of the decompression delay time controller circuit of the utility model.
Specific implementation mode
The embodiments of the present invention are provided below in conjunction with attached drawing 1 to 2, further illustrate that the universal of the utility model is disconnected
The decompression delay controller specific implementation mode of road device.The decompression delay controller of the omnipotent breaker of the utility model is unlimited
In the following description.
As shown in Figure 1, the decompression delay controller of the omnipotent breaker of the utility model includes power circuit 1, delay
The input terminal of circuit 2 and device for under-voltage releasing equipment 3, the power circuit 1 is connected with mains supply for step-down rectifier, the delay
The input terminal of circuit 2 is connected with the output end of power circuit 1 for charging to delay circuit 2, the delay circuit 2
Output end is connected with device for under-voltage releasing equipment 3 to be provided for continuing as device for under-voltage releasing equipment after the supply voltage of power circuit 1 falls
For the electric energy of a period of time to reach time-lag action, delay circuit 2 includes power supply circuit 21, charging control circuit 22, capacitance storage
Can circuit 23 and capacitor discharging circuit 24, the input terminal and output end of the power supply circuit 21 respectively with power circuit 1 and under-voltage
Buckle releaser 3 is connected for providing reliable electric energy for the normal actuation of device for under-voltage releasing equipment 3, the charging control circuit 22 it is defeated
Enter end and output end to be connected with the input terminal of the output end of power circuit 1 and capacitor energy storage circuit 23 respectively for controlling to electricity
That holds that accumulator 23 charges is turned on and off, the input terminal and output end of the capacitor discharging circuit 24 respectively with capacitive energy storage
Circuit 23 is connected with device for under-voltage releasing equipment 3 is less than threshold voltage or the power-off of device for under-voltage releasing equipment 3 for the voltage in power circuit 1
When, it is powered to device for under-voltage releasing equipment 3 so that 3 delayed releasing of device for under-voltage releasing equipment.The utility model passes through charging control circuit 22 and electricity
The charge circuit of delay circuit 2 is separately designed with discharge loop, so as to shorten the charging time, is extended by discharge capacitor circuit 24
Discharge time avoids charge circuit and shares resistance with discharge loop, meanwhile, it is had effectively achieved by charging control circuit 22
To the controllability of the charging unlatching and charging current of capacitor energy storage circuit 23, it is therefore prevented that capacitor energy storage circuit 23 charges and supplies simultaneously
The situation of electricity, to extend capacitor energy storage circuit 23 capacity cell service life and ensure that the reliability of delay circuit 3.
As shown in Fig. 2, the power circuit 1 includes connecting terminal J1, transformer T1, varistor RV107 and rectification
The input terminal of bridge, the connecting terminal J1 is connected with the mains supply of 220V, output end and the transformer T1 of connecting terminal J1
First winding be connected, the secondary winding of the transformer T1 is connected with the input terminal of rectifier bridge for by step-down rectifier,
For the output end of the rectifier bridge with delay circuit 2 for powering, the varistor RV107 is connected in parallel on the secondary of transformer T1
The both ends of winding.The utility model in the secondary winding side of transformer T1 by increasing varistor RV107, using it with non-
Linear C-V characteristic and the function of having transient suppression overvoltage, prevent surge voltage from leading to rectifier bridge overcurrent, to avoid impacting
Voltage damages the capacitor energy storage circuit 23 of delay circuit 2.Specifically, the first pin and the wiring of the connecting terminal J1
The third pin of terminal J1 is connected with the both ends of the first winding of transformer T1 respectively, and the second pin of connecting terminal J1 is outstanding
Sky, the rectifier bridge are single-phase bridges made of being sequentially connected in series by diode D1, diode D2, diode D3 and diode D4
Rectification circuit, the first pin of rectifier bridge and the third pin of rectifier bridge are connected with the both ends of the secondary winding of transformer T1 respectively
It connects, the second pin ground connection of rectifier bridge, the 4th pin of rectifier bridge is connected with the charging control circuit 22 of delay circuit 2, institute
The both ends for stating varistor RV107 are connected respectively with the third pin of the first pin of rectifier bridge and rectifier bridge so as to anti-
Only surge voltage leads to diode D1, diode D2, diode D3 and diode D4 overcurrents.Preferably, connecting terminal J1 is spiral shell
Nail type pcb board connecting terminal.
As shown in Fig. 2, the charging control circuit 22 includes NMOS tube Q1 and zener diode Z1, the NMOS tube Q1
Grid be connected with the cathode of zener diode Z1, the 4th pin of the drain electrode of NMOS tube Q1 and the rectifier bridge of power circuit 1
It is connected with power supply circuit 21, the source electrode of NMOS tube Q1 is connected with capacitor energy storage circuit 23, and the zener diode Z1 is just
Pole is grounded.Specifically, charging control circuit 22 further include polar capacitor C2 and resistance R1, the polar capacitor C2 anode with
The drain electrode of NMOS tube Q1 is connected, the cathode ground connection of polar capacitor C2, the anode of one end and polar capacitor C2 of the resistance R1
It is connected, the other end of resistance R1 is connected with the cathode of zener diode Z1.The utility model is by being arranged in charge control
Setting NMOS tube Q1 and zener diode Z1 in circuit 22, using the on state characteristic of NMOS tube, (grid voltage is more than certain value
Will be connected) and higher input resistance realized to capacitor energy storage circuit using the characteristic of the burning voltage of zener diode
The control of 23 capacity cell charging cut-in voltage and charging current.
The capacitor energy storage circuit 23 includes resistance R3, polar capacitor C1, polar capacitor C3 and polar capacitor C4, described
One end of resistance R3 is connected with the source electrode of the NMOS tube Q1 of charging control circuit 22, the other end and the polar capacitor C1 of resistance R3
Anode be connected, the polar capacitor C3 anode be connected with the anode of polar capacitor C1, the polar capacitor C4 is just
Pole is connected with the anode and capacitor discharging circuit 24 of polar capacitor C3 respectively, and the cathode of polar capacitor C1, polar capacitor
The cathode of C3 and the cathode of polar capacitor C4 are grounded, and the main function of capacitor energy storage circuit 23 is the power supply in power circuit 1
Device for under-voltage releasing equipment 3 is continued as after Voltage Drop provides the electric energy of a period of time to reach time-lag action.The electricity of the utility model
Holding accumulator 23 can determine that polar capacitor C1, polar capacitor C3 and polar capacitor C4 are completed needed for charging by resistance R3
Time, the resistance value that resistance R3 is usually arranged are smaller so that charging rate is very fast.
The capacitor discharging circuit 24 includes one end and the capacitive energy storage electricity of diode D6 and resistance R2, the resistance R2
The anode of the polar capacitor C4 on road 23 is connected, and the other end of resistance R2 is connected with the anode of diode D6, two poles
The cathode of pipe D6 is connected with power supply circuit 21 and device for under-voltage releasing equipment 3 respectively, and the main body of the device for under-voltage releasing equipment 3 is electromagnetic coil
The leading-in end of J2, the electromagnetic coil J2 are connected with the cathode of power supply circuit 21 and the diode D6 of capacitor discharging circuit 24 respectively
It connects, the exit ground connection of electromagnetic coil J2, when the supply voltage of power supply circuit 21 or capacitor discharging circuit 24 is less than undervoltage tripping
Electromagnetic coil J2 will be unable to be attracted and cause to thread off when the threshold value of device 3.The utility model utilizes the diode of capacitor discharging circuit 24
The one-way conduction characteristic of D6 separates charging control circuit 22 and capacitor discharging circuit 24 to realize, meanwhile, it is discharged by capacitance
The resistance R2 of circuit 24 determines the time needed for polar capacitor C1, polar capacitor C3 and polar capacitor C4 electric discharges, is usually arranged
The resistance value of resistance R2 is more than the resistance value of resistance R3, so that discharge time is less than the charging time, preferably ensure that delay performance.
When work, the no-load voltage ratio of Design of Transformer T1 is 220V/48V, and the supply voltage that mains supply provides is voltage Us, warp
Supply voltage after 1 step-down rectifier of power circuit is voltage Ui and Ui=0.218 | Us|, voltage Ui is direct to device for under-voltage releasing equipment 3
It first charges to polar capacitor C2 while power supply so that the voltage Uc2 of polar capacitor C2 is gradually increasing, under normal condition most
It is big up to 67.83V, when voltage Uc2 is more than 66V, the Q1 conductings of NM0S pipes, voltage Ui is by resistance R3 to capacitor energy storage circuit 23
Polar capacitor C1, polar capacitor C3, polar capacitor C4 power supply charges for energy storage since the resistance value of resistance R3 is smaller at this time
Speed.
If voltage Us is increased in short-term suddenly, since the secondary winding of transformer T1 is parallel with varistor RV107, to drop
Low influence of the surge voltage to diode D1, diode D2, diode D3, diode D4 and polar capacitor C2.While by
In the presence of NMOS tube Q1, charging current will not be excessive, to be effectively protected the polar capacitor C1 of capacitor energy storage circuit 23,
Polar capacitor C3 and polar capacitor C4.
If voltage Us drops to the threshold voltage of device for under-voltage releasing equipment 3, the polar capacitor C1 of capacitor energy storage circuit 23, polarity
Capacitance C3, polar capacitor C4 are to be discharged to device for under-voltage releasing equipment 3 by the resistance R2 of capacitor discharging circuit 24, due to resistance R2 resistance values
More than the resistance value of resistance R1, therefore discharge time can be less than the charging time, to preferably ensure that prolonging for the utility model
Shi Xingneng.
If voltage Us is after falling, and in the polar capacitor C1 of capacitor energy storage circuit 23, polar capacitor C3 and polar capacitor
The voltage of C4 down to ging up before the threshold voltage of device for under-voltage releasing equipment 3 again, then voltage Ui gives device for under-voltage releasing equipment 3 to power immediately, together
When capacitor energy storage circuit 23 polar capacitor C1, polar capacitor C3 and polar capacitor C4 stop powering immediately.As polar capacitor C2
Voltage Uc2 when being more than voltage Uz1, that is, 66V of zener diode, above-mentioned charging process is repeated, so as to avoid capacitive energy storage electricity
The polar capacitor C1 on road 23, polar capacitor C3, the situation that polar capacitor C4 charges with power supply simultaneously, preferably extend capacity cell
Service life, and ensure that the reliability of circuit.
Through the above scheme, separate design of the power supply circuit 21 with capacitor discharging circuit 24 is not only realized, charging is shortened
Time extends discharge time, and effectively realizes the controllability to capacitance charging current, avoids rectifier diode overcurrent
There is a possibility that overvoltage with charge and discharge capacitance both ends, it is therefore prevented that the situation of capacity cell charge and discharge simultaneously optimizes original
Circuit design, improve circuit reliability.
It, cannot the above content is specific preferred embodiment further detailed description of the utility model is combined
Assert that the specific implementation of the utility model is confined to these explanations.For the ordinary skill of the utility model technical field
For personnel, without departing from the concept of the premise utility, a number of simple deductions or replacements can also be made, should all regard
To belong to the scope of protection of the utility model.
Claims (9)
1. a kind of decompression delay controller of omnipotent breaker, including power circuit (1), delay circuit (2) and undervoltage tripping
Device (3), it is characterised in that：The input terminal of the power circuit (1) is connected with mains supply, the delay circuit (2) it is defeated
Entering end with the output end of power circuit (1) to be connected, the output end of the delay circuit (2) is connected with device for under-voltage releasing equipment (3),
Delay circuit (2) includes power supply circuit (21), charging control circuit (22), capacitor energy storage circuit (23) and capacitor discharging circuit
(24), the input terminal and output end of the power supply circuit (21) are connected with power circuit (1) and device for under-voltage releasing equipment (3) use respectively
Power in for device for under-voltage releasing equipment (3), the input terminal and output end of the charging control circuit (22) respectively with power circuit (1)
Output end be connected with the input terminal of capacitor energy storage circuit (23) for control the unlatching charged to capacitor energy storage circuit (23) or
Close, the input terminal and output end of the capacitor discharging circuit (24) respectively with capacitor energy storage circuit (23) and device for under-voltage releasing equipment
(3) it is connected for making device for under-voltage releasing equipment (3) delayed releasing to device for under-voltage releasing equipment (3) power supply.
2. the decompression delay controller of omnipotent breaker according to claim 1, it is characterised in that：The charging control
Circuit (22) processed includes NMOS tube Q1 and zener diode Z1, the grid of the NMOS tube Q1 and the cathode phase of zener diode Z1
Connection, the drain electrode of NMOS tube Q1 are connected with power circuit (1) and power supply circuit (21), the source electrode and capacitive energy storage of NMOS tube Q1
Circuit (23) is connected, the plus earth of the zener diode Z1.
3. the decompression delay controller of omnipotent breaker according to claim 2, it is characterised in that：The charging control
Circuit (22) processed further includes that polar capacitor C2 and the positive of resistance R1, the polar capacitor C2 are connected with the drain electrode of NMOS tube Q1
It connects, the cathode ground connection of polar capacitor C2, one end of the resistance R1 is connected with the anode of polar capacitor C2, and resistance R1's is another
End is connected with the cathode of zener diode Z1.
4. the decompression delay controller of omnipotent breaker according to claim 1, it is characterised in that：The capacitance storage
Energy circuit (23) includes resistance R3, polar capacitor C1, polar capacitor C3 and polar capacitor C4, one end of the resistance R3 and charging
Control circuit (22) is connected, and the other end of resistance R3 is connected with the anode of polar capacitor C1, and the polar capacitor C3 is just
Pole is connected with the anode of polar capacitor C1, and the anode of the polar capacitor C4 is put with the anode and capacitance of polar capacitor C3 respectively
Circuit (24) is connected, and the cathode of the cathode of polar capacitor C1, the cathode of polar capacitor C3 and polar capacitor C4 connects
Ground.
5. the decompression delay controller of omnipotent breaker according to claim 1, it is characterised in that：The capacitance is put
Circuit (24) includes the polar capacitor C4 of one end and capacitor energy storage circuit (23) of diode D6 and resistance R2, the resistance R2
Anode be connected, the other end of resistance R2 is connected with the anode of diode D6, the cathode of the diode D6 respectively with
Power supply circuit (21) is connected with device for under-voltage releasing equipment (3).
6. the decompression delay controller of omnipotent breaker according to claim 1, it is characterised in that：The power supply electricity
Road (1) includes transformer T1, varistor RV107 and rectifier bridge, and the first winding of the transformer T1 is connected with mains supply
It connects, the secondary winding of the transformer T1 is connected with the input terminal of rectifier bridge, the output end and delay circuit of the rectifier bridge
(2), the varistor RV107 is connected in parallel on the both ends of the secondary winding of transformer T1.
7. the decompression delay controller of omnipotent breaker according to claim 6, it is characterised in that：The rectifier bridge
It is single phase bridge type rectifier circu made of being sequentially connected in series by diode D1, diode D2, diode D3 and diode D4, rectifier bridge
The first pin and the third pin of rectifier bridge be connected respectively with the both ends of the secondary winding of transformer T1, the second of rectifier bridge
Pin is grounded, and the 4th pin of rectifier bridge is connected with the charging control circuit (22) of delay circuit (2), the varistor
The both ends of RV107 are connected with the third pin of the first pin of rectifier bridge and rectifier bridge respectively.
8. the decompression delay controller of omnipotent breaker according to claim 1 or 5, it is characterised in that：It is described under-voltage
Buckle releaser (3) includes electromagnetic coil J2, and the leading-in end of the electromagnetic coil J2 is electric with power supply circuit (21) and capacitance electric discharge respectively
Road (24) is connected, the exit ground connection of electromagnetic coil J2.
9. the decompression delay controller of the omnipotent breaker according to claim 1 or 3 or 5, it is characterised in that：The electricity
The resistance value of the resistance R2 of discharge capacitor circuit (24) is more than the resistance value of the resistance R3 of charging control circuit (22).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820105817.9U CN207967911U (en) | 2018-01-22 | 2018-01-22 | The decompression delay controller of omnipotent breaker |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820105817.9U CN207967911U (en) | 2018-01-22 | 2018-01-22 | The decompression delay controller of omnipotent breaker |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207967911U true CN207967911U (en) | 2018-10-12 |
Family
ID=63734496
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820105817.9U Active CN207967911U (en) | 2018-01-22 | 2018-01-22 | The decompression delay controller of omnipotent breaker |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207967911U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109245025A (en) * | 2018-10-16 | 2019-01-18 | 常熟开关制造有限公司(原常熟开关厂） | Trip circuit, trip gear, breaker |
-
2018
- 2018-01-22 CN CN201820105817.9U patent/CN207967911U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109245025A (en) * | 2018-10-16 | 2019-01-18 | 常熟开关制造有限公司(原常熟开关厂） | Trip circuit, trip gear, breaker |
| CN109245025B (en) * | 2018-10-16 | 2024-05-10 | 常熟开关制造有限公司(原常熟开关厂） | Tripping circuit, tripping device and circuit breaker |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Assignee: Wenzhou Zhengtai Electrical Technology Co., Ltd Assignor: Zhejiang Chint Electrics Co.,Ltd. Contract record no.: X2020330000078 Denomination of utility model: Voltage loss delay controller of universal circuit breaker Granted publication date: 20181012 License type: Common License Record date: 20201021 |
|
| EE01 | Entry into force of recordation of patent licensing contract |