CN207150713U - One kind realizes double rear camera circuits using MT6735M low sides chip - Google Patents

One kind realizes double rear camera circuits using MT6735M low sides chip Download PDF

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Publication number
CN207150713U
CN207150713U CN201721135198.XU CN201721135198U CN207150713U CN 207150713 U CN207150713 U CN 207150713U CN 201721135198 U CN201721135198 U CN 201721135198U CN 207150713 U CN207150713 U CN 207150713U
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China
Prior art keywords
interfaces
rear camera
vcam
circuit
camera
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CN201721135198.XU
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崔立臣
周洪旋
李少成
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Shanghai Haocheng Technology Co.,Ltd.
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Shanghai Hao Cheng Communication Science And Technology Ltd
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Abstract

The utility model discloses one kind double rear camera circuits, including main rear camera J1, secondary rear camera J2, preceding camera J3, integrated circuit U1, power supply circuit U2 and power supply circuit U3 are realized using MT6735M low sides chip.This realizes double rear camera circuits using MT6735M low sides chip, an integrated ISP chip of the two camera MIPI interfaces and chip internal possessed originally based on MT6735M chips, so as to realize double rear camera functions;And when mobile phone preview is taken pictures, main rear camera J1 and secondary rear camera J2 are opened, main rear camera J1 is as image preview and processing function of taking pictures, secondary rear camera J2 perceptually environment illumination intensity will be used, MT6735M reads secondary rear camera J2 photosensitive strength information, and adjusts screen intensity when camera preview by this information.

Description

One kind realizes double rear camera circuits using MT6735M low sides chip
Technical field
Double rear camera field of circuit technology are the utility model is related to, are specially a kind of real using MT6735M low sides chip Existing double rear camera circuits.
Background technology
At present, people take the photograph to effect requirements more and more higher of taking pictures, terminal in order to realize more excellent effect of taking pictures after double As head is progressively designed in the equipment such as mobile phone, tablet personal computer, double rear cameras can catch the obstructed depth of field, ambient light letter Breath, and give platform chip to handle these information conveyances, platform chip is pre- by adjust automatically camera after obtaining these information Screen intensity, color temperature value when when looking at and taking pictures etc., so as to shoot optimal pictorial information according to current environmental condition.
But some current cell phone platform chips, it is internal not integrate two ISP due to Costco Wholesale problem, and if outer Add ISP chip costs again too high, therefore perplex user.
The content of the invention
The purpose of this utility model is that provide one kind realizes double rear camera circuits using MT6735M low sides chip, only Need to integrate an ISP, can solve existing cell phone platform chip, due to Costco Wholesale to realize double rear camera functions Problem, it is internal not integrate two ISP, and if additional ISP chip costs are too high, therefore the problem of puzzlement user.
To achieve the above object, the utility model provides following technical scheme:
One kind realizes double rear camera circuits, including main rear camera J1, secondary rear camera using MT6735M low sides chip J2, preceding camera J3, integrated circuit U1, power supply circuit U2 and power supply circuit U3, the MIPI0 that the main rear camera J1 is provided with Interface is corresponding with the MIPI0 interfaces that integrated circuit U1 is provided with, and is electrically connected between MIPI0 interfaces by circuit, is taken the photograph after main As the RESET0 interfaces that head J1 is provided with are corresponding with the GPIO0 interfaces that integrated circuit U1 is provided with, RESET0 interfaces connect with GPIO0 It is electrically connected between mouthful by circuit, the I2C0 interfaces that main rear camera J1 is provided with connect with the integrated circuit U1 I2C0 being provided with Mouth is corresponding, is electrically connected between I2C0 interfaces by circuit, the PWDN0 interface and integrated circuit that main rear camera J1 is provided with The GPIO1 interfaces that U1 is provided with are corresponding, are electrically connected between PWDN0 interfaces and GPIO1 interfaces by circuit, main rear camera The GND interfaces that J1 is provided with respectively with integrated circuit U1, power supply circuit U2, power supply circuit U3, secondary rear camera J2 and proactive picture The GND interfaces that head J3 is provided with are corresponding, are electrically connected between GND interfaces by circuit, what main rear camera J1 was provided with MCLK interfaces are corresponding with the MCLK interfaces that integrated circuit U1, secondary rear camera J2 and preceding camera J3 are provided with respectively, MCLK Be electrically connected between interface by circuit, the VCAM_IO interfaces that main rear camera J1 is provided with respectively with power supply circuit U2, it is secondary after The VCAM_IO interfaces that camera J2 and preceding camera J3 are provided with are corresponding, electrically connected by circuit between VCAM_IO interfaces Connect, what the VCAM_AVDD0 interfaces that main rear camera J1 is provided with were provided with power supply circuit U2 and preceding camera J3 respectively VCAM_AVDD0 interfaces are corresponding, are electrically connected between VCAM_AVDD0 interfaces by circuit, what main rear camera J1 was provided with VCAM_DVDD0 interfaces are corresponding with the VCAM_DVDD0 interfaces that power supply circuit U2 and preceding camera J3 are provided with respectively, VCAM_ It is electrically connected between DVDD0 by circuit, what the VCAM_AF interfaces that main rear camera J1 is provided with were provided with power supply circuit U2 VCAM_AF interfaces are corresponding, are electrically connected between VCAM_AF interfaces by circuit, what the secondary rear camera J2 was provided with RESET1 interfaces are corresponding with the GPIO2 interfaces that integrated circuit U1 is provided with, and pass through electricity between RESET1 interfaces and GPIO2 interfaces Road is electrically connected with, and the I2C1 interfaces that secondary rear camera J2 is provided with are corresponding with the I2C1 interfaces that integrated circuit U1 is provided with, It is electrically connected between I2C1 interfaces by circuit, the PWDN1 interfaces that secondary rear camera J2 is provided with are provided with integrated circuit U1 GPIO3 interfaces it is corresponding, be electrically connected between PWDN1 interfaces and GPIO3 interfaces by circuit, secondary rear camera J2 is provided with GND interfaces respectively with being set on integrated circuit U1, main rear camera J1, preceding camera J3, power supply circuit U2 and power supply circuit U3 Some GND interfaces are corresponding, are electrically connected between GND interfaces by circuit, the MCLK interfaces point that secondary rear camera J2 is provided with It is not corresponding with the MCLK interfaces that integrated circuit U1, main rear camera J1 and preceding camera J3 are provided with, lead between MCLK interfaces Oversampling circuit be electrically connected with, the VCAM_IO interfaces that secondary rear camera J2 is provided with respectively with power supply circuit U2, main rear camera J1 and The VCAM_IO interfaces that preceding camera J3 is provided with are corresponding, are electrically connected between VCAM_IO by circuit, secondary rear camera J2 The VCAM_AVDD1 interfaces being provided with are corresponding with the VCAM_AVDD1 interfaces that power supply circuit U3 is provided with, VCAM_AVDD1 interfaces Between be electrically connected with by circuit, what the VCAM_DVDD1 interfaces that secondary rear camera J2 is provided with and power supply circuit U3 were provided with VCAM_DVDD1 interfaces are corresponding, are electrically connected between VCAM_DVDD1 by circuit, what the preceding camera J3 was provided with MIPI1 interfaces are corresponding with the MIPI1 interfaces that integrated circuit U1 is provided with, and are electrically connected between MIPI1 interfaces by circuit, preceding The RESET2 interfaces that camera J3 is provided with are corresponding with the GPIO4 interfaces that integrated circuit U1 is provided with, RESET2 interfaces with Be electrically connected between GPIO4 interfaces by circuit, the I2C0 interfaces that preceding camera J3 is provided with respectively with main rear camera J1 and The I2C0 interfaces that integrated circuit U1 is provided with are corresponding, are electrically connected between I2C0 interfaces by circuit, set on preceding camera J3 Some PWDN2 interfaces are corresponding with the GPIO5 interfaces that main rear camera J1 is provided with, and lead between PWDN2 interfaces and GPIO5 interfaces Oversampling circuit is electrically connected with, the GND interfaces that preceding camera J3 is provided with respectively with main rear camera J1, secondary rear camera J2, integrated The GND interfaces that circuit U 1, power supply circuit U2 and power supply circuit U3 are provided with are corresponding, electrically connected by circuit between GND interfaces Connect, the MCLK interfaces that preceding camera J3 is provided with main rear camera J1, secondary rear camera J2 and integrated circuit U1 respectively with setting Some MCLK interfaces are corresponding, are electrically connected between MCLK interfaces by circuit, the VCAM_IO interfaces that preceding camera J3 is provided with It is corresponding with the VCAM_IO interfaces that main rear camera J1, secondary rear camera J2 and power supply circuit U2 are provided with respectively, VCAM_IO Between be electrically connected with by circuit, the VCAM_AVDD0 interfaces that preceding camera J3 is provided with respectively with main rear camera J1 and power supply The VCAM_AVDD0 interfaces that circuit U 2 is provided with are corresponding, are electrically connected between VCAM_AVDD0 by circuit, preceding camera J3 The VCAM_DVDD0 interfaces being provided with are corresponding with the VCAM_DVDD0 interfaces on main rear camera J1 and power supply circuit U2 respectively, It is electrically connected between VCAM_DVDD0 interfaces by circuit.
Preferably, the VCAM_IO interface voltages of the main rear camera J1 are that 1.8V, VCAM_AVDD0 interface voltage are 2.8V, VCAM_DVDD0 interface voltage are that 1.2V, VCAM_AF interface voltage are 2.8V.
Preferably, the VCAM_IO interface voltages of the secondary rear camera J2 are that 1.8V, VCAM_AVDD1 interface voltage are 2.8V, VCAM_DVDD1 interface voltage are 1.8V
Preferably, the VCAM_IO interface voltages of the front camera J3 are that 1.8V, VCAM_AVDD0 interface voltage are 2.8V, VCAM_DVDD0 interface voltage are 1.2V.
Preferably, the model MT6735M of the integrated circuit U1.
Compared with prior art, the beneficial effects of the utility model are as follows:
This realizes double rear camera circuits, two possessed originally based on MT6735M chips using MT6735M low sides chip The ISP chip that camera MIPI interfaces and chip internal integrate, so as to realize double rear camera functions;And work as mobile phone When preview is taken pictures, main rear camera J1 and secondary rear camera J2 are opened, and main rear camera J1 is as image preview and takes pictures Processing function, secondary rear camera J2 perceptually environment illumination intensity will be used, and MT6735M reads the photosensitive of secondary rear camera J2 Strength information, and screen intensity when camera preview is adjusted by this information.
Brief description of the drawings
Fig. 1 is the utility model circuit theory schematic diagram;
Fig. 2 is utility model works flow chart.
In figure:Main rear camera J1, secondary rear camera J2, preceding camera J3, integrated circuit U1, power supply circuit U2, power supply Circuit U 3.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out Clearly and completely describing, it is clear that described embodiment is only the utility model part of the embodiment, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment obtained, belong to the scope of the utility model protection.
Fig. 1-2 is referred to, one kind realizes double rear camera circuits, including main rear camera using MT6735M low sides chip J1, secondary rear camera J2, preceding camera J3, integrated circuit U1, power supply circuit U2 and power supply circuit U3, and integrated circuit U1 type Number it is MT6735M, the MIPI0 interfaces that main rear camera J1 is provided with are corresponding with the MIPI0 interfaces that integrated circuit U1 is provided with, It is electrically connected between MIPI0 interfaces by circuit, the RESET0 interfaces that main rear camera J1 is provided with are provided with integrated circuit U1 GPIO0 interfaces it is corresponding, be electrically connected with by circuit between RESET0 interfaces and GPIO0 interfaces, set on main rear camera J1 Some I2C0 interfaces are corresponding with the I2C0 interfaces that integrated circuit U1 is provided with, and are electrically connected between I2C0 interfaces by circuit, The PWDN0 interfaces that main rear camera J1 is provided with are corresponding with the GPIO1 interfaces that integrated circuit U1 is provided with, PWDN0 interfaces with Be electrically connected between GPIO1 interfaces by circuit, the GND interfaces that main rear camera J1 is provided with respectively with integrated circuit U1, supply The GND interfaces that circuit U 2, power supply circuit U3, secondary rear camera J2 and preceding camera J3 are provided with are corresponding, between GND interfaces Be electrically connected with by circuit, the MCLK interfaces that main rear camera J1 is provided with respectively with integrated circuit U1, secondary rear camera J2 and The MCLK interfaces that preceding camera J3 is provided with are corresponding, are electrically connected between MCLK interfaces by circuit, on main rear camera J1 The VCAM_IO interfaces that the VCAM_IO interfaces being provided with are provided with power supply circuit U2, secondary rear camera J2 and preceding camera J3 respectively It is corresponding, it is electrically connected between VCAM_IO interfaces by circuit, and VCAM_IO interface voltages are 1.8V, on main rear camera J1 The VCAM_AVDD0 interfaces being provided with are corresponding with the VCAM_AVDD0 interfaces that power supply circuit U2 and preceding camera J3 are provided with respectively, It is electrically connected between VCAM_AVDD0 interfaces by circuit, and VCAM_AVDD0 interface voltages are 2.8V, on main rear camera J1 The VCAM_DVDD0 interfaces being provided with are corresponding with the VCAM_DVDD0 interfaces that power supply circuit U2 and preceding camera J3 are provided with respectively, It is electrically connected between VCAM_DVDD0 by circuit, and VCAM_DVDD0 interface voltages are 1.2V, main rear camera J1 is provided with VCAM_AF interfaces it is corresponding with the VCAM_AF interfaces that power supply circuit U2 is provided with, between VCAM_AF interfaces pass through circuit electricity Property connection, and VCAM_AF interface voltages are 2.8V, and the RESET1 interfaces that secondary rear camera J2 is provided with integrated circuit U1 with setting Some GPIO2 interfaces are corresponding, are electrically connected between RESET1 interfaces and GPIO2 interfaces by circuit, on secondary rear camera J2 The I2C1 interfaces being provided with are corresponding with the I2C1 interfaces that integrated circuit U1 is provided with, and electrically connected by circuit between I2C1 interfaces Connect, the PWDN1 interfaces that secondary rear camera J2 is provided with are corresponding with the GPIO3 interfaces that integrated circuit U1 is provided with, PWDN1 interfaces Be electrically connected between GPIO3 interfaces by circuit, the GND interfaces that secondary rear camera J2 is provided with respectively with integrated circuit U1, The GND interfaces that main rear camera J1, preceding camera J3, power supply circuit U2 and power supply circuit U3 are provided with are corresponding, GND interfaces it Between be electrically connected with by circuit, the MCLK interfaces that secondary rear camera J2 is provided with respectively with integrated circuit U1, main rear camera J1 It is corresponding with the MCLK interfaces that preceding camera J3 is provided with, it is electrically connected between MCLK interfaces by circuit, secondary rear camera J2 The VCAM_IO interfaces being provided with connect with power supply circuit U2, main rear camera J1 and preceding camera the J3 VCAM_IO being provided with respectively Mouth is corresponding, is electrically connected between VCAM_IO by circuit, and VCAM_IO interface voltages are 1.8V, are set on secondary rear camera J2 Some VCAM_AVDD1 interfaces are corresponding with the VCAM_AVDD1 interfaces that power supply circuit U3 is provided with, between VCAM_AVDD1 interfaces It is electrically connected with by circuit, and VCAM_AVDD1 interface voltages are 2.8V, the VCAM_DVDD1 that secondary rear camera J2 is provided with connects Mouth is corresponding with the VCAM_DVDD1 interfaces that power supply circuit U3 is provided with, and is electrically connected between VCAM_DVDD1 by circuit, and VCAM_DVDD1 interface voltages are 1.8V, the MIPI1 that the MIPI1 interfaces that preceding camera J3 is provided with are provided with integrated circuit U1 Interface is corresponding, is electrically connected between MIPI1 interfaces by circuit, the RESET2 interfaces that preceding camera J3 is provided with and integrated electricity The GPIO4 interfaces that road U1 is provided with are corresponding, are electrically connected between RESET2 interfaces and GPIO4 interfaces by circuit, proactive picture The I2C0 interfaces that head J3 is provided with are corresponding with the I2C0 interfaces that main rear camera J1 and integrated circuit U1 are provided with respectively, I2C0 It is electrically connected between interface by circuit, what the PWDN2 interfaces that preceding camera J3 is provided with were provided with main rear camera J1 GPIO5 interfaces are corresponding, are electrically connected between PWDN2 interfaces and GPIO5 interfaces by circuit, and preceding camera J3 is provided with GND interfaces on main rear camera J1, secondary rear camera J2, integrated circuit U1, power supply circuit U2 and power supply circuit U3 respectively with setting Some GND interfaces are corresponding, are electrically connected between GND interfaces by circuit, the MCLK interfaces difference that preceding camera J3 is provided with It is corresponding with the MCLK interfaces that main rear camera J1, secondary rear camera J2 and integrated circuit U1 are provided with, lead between MCLK interfaces Oversampling circuit be electrically connected with, the VCAM_IO interfaces that preceding camera J3 is provided with respectively with main rear camera J1, secondary rear camera J2 and The VCAM_IO interfaces that power supply circuit U2 is provided with are corresponding, are electrically connected between VCAM_IO by circuit, and VCAM_IO interfaces Voltage is 1.8V, and the VCAM_AVDD0 interfaces that preceding camera J3 is provided with main rear camera J1 and power supply circuit U2 respectively with setting Some VCAM_AVDD0 interfaces are corresponding, are electrically connected between VCAM_AVDD0 by circuit, and VCAM_AVDD0 interface voltages For 2.8V, the VCAM_DVDD0 interfaces that preceding camera J3 is provided with respectively with main rear camera J1 and power supply circuit U2 VCAM_DVDD0 interfaces are corresponding, are electrically connected between VCAM_DVDD0 interfaces by circuit, and VCAM_DVDD0 interface voltages For 1.2V.
This realizes double rear camera circuits, two possessed originally based on MT6735M chips using MT6735M low sides chip The ISP chip that camera MIPI interfaces and chip internal integrate, so as to realize double rear camera functions;And work as mobile phone When preview is taken pictures, main rear camera J1 and secondary rear camera J2 are opened, and main rear camera J1 is as image preview and takes pictures Processing function, secondary rear camera J2 perceptually environment illumination intensity will be used, and MT6735M reads the photosensitive of secondary rear camera J2 Strength information, and screen intensity when camera preview is adjusted by this information
In summary:This realizes double rear camera circuits using MT6735M low sides chip, by integrating an ISP, To realize double rear camera functions, effectively solves existing cell phone platform chip, due to Costco Wholesale problem, inside does not integrate Two ISP, and if additional ISP chip costs are too high, therefore the problem of perplex user.
While there has been shown and described that embodiment of the present utility model, for the ordinary skill in the art, It is appreciated that these embodiments can be carried out with a variety of changes in the case where not departing from principle of the present utility model and spirit, repaiied Change, replace and modification, the scope of the utility model are defined by the appended claims and the equivalents thereof.

Claims (5)

1. one kind realizes double rear camera circuits, including main rear camera J1, secondary rear camera using MT6735M low sides chip J2, preceding camera J3, integrated circuit U1, power supply circuit U2 and power supply circuit U3, it is characterised in that:On the main rear camera J1 The MIPI0 interfaces being provided with are corresponding with the MIPI0 interfaces that integrated circuit U1 is provided with, electrical by circuit between MIPI0 interfaces Connection, the RESET0 interfaces that main rear camera J1 is provided with are corresponding with the GPIO0 interfaces that integrated circuit U1 is provided with, and RESET0 connects It is electrically connected between mouth and GPIO0 interfaces by circuit, on the I2C0 interfaces that main rear camera J1 is provided with and integrated circuit U1 The I2C0 interfaces being provided with are corresponding, are electrically connected between I2C0 interfaces by circuit, and the PWDN0 that main rear camera J1 is provided with connects Mouth is corresponding with the GPIO1 interfaces that integrated circuit U1 is provided with, and is electrically connected by circuit between PWDN0 interfaces and GPIO1 interfaces Connect, the GND interfaces that main rear camera J1 is provided with after integrated circuit U1, power supply circuit U2, power supply circuit U3, pair respectively with imaging The GND interfaces that head J2 and preceding camera J3 is provided with are corresponding, are electrically connected between GND interfaces by circuit, main rear camera The MCLK interface phases that the MCLK interfaces that J1 is provided with are provided with integrated circuit U1, secondary rear camera J2 and preceding camera J3 respectively It is corresponding, it is electrically connected between MCLK interfaces by circuit, the VCAM_IO interfaces that main rear camera J1 is provided with are electric with power supply respectively The VCAM_IO interfaces that road U2, secondary rear camera J2 and preceding camera J3 are provided with are corresponding, pass through electricity between VCAM_IO interfaces Road is electrically connected with, and the VCAM_AVDD0 interfaces that main rear camera J1 is provided with power supply circuit U2 and preceding camera J3 respectively with setting Some VCAM_AVDD0 interfaces are corresponding, are electrically connected between VCAM_AVDD0 interfaces by circuit, set on main rear camera J1 Some VCAM_DVDD0 interfaces are corresponding with the VCAM_DVDD0 interfaces that power supply circuit U2 and preceding camera J3 are provided with respectively, It is electrically connected between VCAM_DVDD0 by circuit, on the VCAM_AF interfaces that main rear camera J1 is provided with and power supply circuit U2 The VCAM_AF interfaces being provided with are corresponding, are electrically connected between VCAM_AF interfaces by circuit, set on the secondary rear camera J2 Some RESET1 interfaces are corresponding with the GPIO2 interfaces that integrated circuit U1 is provided with, and lead between RESET1 interfaces and GPIO2 interfaces Oversampling circuit is electrically connected with, and the I2C1 interfaces that secondary rear camera J2 is provided with are relative with the I2C1 interfaces that integrated circuit U1 is provided with Should, it is electrically connected between I2C1 interfaces by circuit, the PWDN1 interfaces that secondary rear camera J2 is provided with integrated circuit U1 with setting Some GPIO3 interfaces are corresponding, are electrically connected between PWDN1 interfaces and GPIO3 interfaces by circuit, set on secondary rear camera J2 Some GND interfaces respectively with integrated circuit U1, main rear camera J1, preceding camera J3, power supply circuit U2 and power supply circuit U3 The GND interfaces being provided with are corresponding, are electrically connected between GND interfaces by circuit, the MCLK interfaces that secondary rear camera J2 is provided with It is corresponding with the MCLK interfaces that integrated circuit U1, main rear camera J1 and preceding camera J3 are provided with respectively, between MCLK interfaces Be electrically connected with by circuit, the VCAM_IO interfaces that secondary rear camera J2 is provided with respectively with power supply circuit U2, main rear camera J1 It is corresponding with the VCAM_IO interfaces that preceding camera J3 is provided with, it is electrically connected between VCAM_IO by circuit, secondary rear camera The VCAM_AVDD1 interfaces that J2 is provided with are corresponding with the VCAM_AVDD1 interfaces that power supply circuit U3 is provided with, and VCAM_AVDD1 connects It is electrically connected between mouthful by circuit, what the VCAM_DVDD1 interfaces that secondary rear camera J2 is provided with were provided with power supply circuit U3 VCAM_DVDD1 interfaces are corresponding, are electrically connected between VCAM_DVDD1 by circuit, what the preceding camera J3 was provided with MIPI1 interfaces are corresponding with the MIPI1 interfaces that integrated circuit U1 is provided with, and are electrically connected between MIPI1 interfaces by circuit, preceding The RESET2 interfaces that camera J3 is provided with are corresponding with the GPIO4 interfaces that integrated circuit U1 is provided with, RESET2 interfaces with Be electrically connected between GPIO4 interfaces by circuit, the I2C0 interfaces that preceding camera J3 is provided with respectively with main rear camera J1 and The I2C0 interfaces that integrated circuit U1 is provided with are corresponding, are electrically connected between I2C0 interfaces by circuit, set on preceding camera J3 Some PWDN2 interfaces are corresponding with the GPIO5 interfaces that main rear camera J1 is provided with, and lead between PWDN2 interfaces and GPIO5 interfaces Oversampling circuit is electrically connected with, the GND interfaces that preceding camera J3 is provided with respectively with main rear camera J1, secondary rear camera J2, integrated The GND interfaces that circuit U 1, power supply circuit U2 and power supply circuit U3 are provided with are corresponding, electrically connected by circuit between GND interfaces Connect, the MCLK interfaces that preceding camera J3 is provided with main rear camera J1, secondary rear camera J2 and integrated circuit U1 respectively with setting Some MCLK interfaces are corresponding, are electrically connected between MCLK interfaces by circuit, the VCAM_IO interfaces that preceding camera J3 is provided with It is corresponding with the VCAM_IO interfaces that main rear camera J1, secondary rear camera J2 and power supply circuit U2 are provided with respectively, VCAM_IO Between be electrically connected with by circuit, the VCAM_AVDD0 interfaces that preceding camera J3 is provided with respectively with main rear camera J1 and power supply The VCAM_AVDD0 interfaces that circuit U 2 is provided with are corresponding, are electrically connected between VCAM_AVDD0 by circuit, preceding camera J3 The VCAM_DVDD0 interfaces being provided with are corresponding with the VCAM_DVDD0 interfaces on main rear camera J1 and power supply circuit U2 respectively, It is electrically connected between VCAM_DVDD0 interfaces by circuit.
2. one kind according to claim 1 realizes double rear camera circuits using MT6735M low sides chip, its feature exists In:The VCAM_IO interface voltages of the main rear camera J1 are that 1.8V, VCAM_AVDD0 interface voltage are 2.8V, VCAM_ DVDD0 interface voltages are that 1.2V, VCAM_AF interface voltage are 2.8V.
3. one kind according to claim 1 realizes double rear camera circuits using MT6735M low sides chip, its feature exists In:The VCAM_IO interface voltages of the secondary rear camera J2 are that 1.8V, VCAM_AVDD1 interface voltage are 2.8V, VCAM_ DVDD1 interface voltages are 1.8V.
4. one kind according to claim 1 realizes double rear camera circuits using MT6735M low sides chip, its feature exists In:The VCAM_IO interface voltages of the preceding camera J3 are that 1.8V, VCAM_AVDD0 interface voltage are 2.8V, VCAM_DVDD0 Interface voltage is 1.2V.
5. one kind according to claim 1 realizes double rear camera circuits using MT6735M low sides chip, its feature exists In:The model MT6735M of the integrated circuit U1.
CN201721135198.XU 2017-09-06 2017-09-06 One kind realizes double rear camera circuits using MT6735M low sides chip Active CN207150713U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201721135198.XU CN207150713U (en) 2017-09-06 2017-09-06 One kind realizes double rear camera circuits using MT6735M low sides chip

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Application Number Priority Date Filing Date Title
CN201721135198.XU CN207150713U (en) 2017-09-06 2017-09-06 One kind realizes double rear camera circuits using MT6735M low sides chip

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CN207150713U true CN207150713U (en) 2018-03-27

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108600588A (en) * 2018-05-09 2018-09-28 杭州击触信息技术有限公司 Multi-cam device and method based on android system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108600588A (en) * 2018-05-09 2018-09-28 杭州击触信息技术有限公司 Multi-cam device and method based on android system
CN108600588B (en) * 2018-05-09 2020-12-18 南京微智新科技有限公司 Multi-camera device and method based on Android system

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Address after: Room D, 5 / F, building 8, 401 Caobao Road, Xuhui District, Shanghai 200233

Patentee after: Shanghai Haocheng Technology Co.,Ltd.

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Address before: Room D, 5 / F, building 8, 401 Caobao Road, Xuhui District, Shanghai 200233

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