CN207133684U - A kind of circuit for generating source voltage - Google Patents

A kind of circuit for generating source voltage Download PDF

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Publication number
CN207133684U
CN207133684U CN201721116666.9U CN201721116666U CN207133684U CN 207133684 U CN207133684 U CN 207133684U CN 201721116666 U CN201721116666 U CN 201721116666U CN 207133684 U CN207133684 U CN 207133684U
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grid
circuit
voltage
drain electrode
electrode
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李华锋
陈朝勇
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FUJIAN FUXIN ELECTRONIC TECHNOLOGY Co.,Ltd.
Wuxi mamente Microelectronics Co., Ltd
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Fujian Fuxin Electronic Technology Co Ltd
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Abstract

The utility model provides a kind of circuit for generating source voltage, and the circuit for generating source voltage includes start-up circuit, current biasing circuit, band-gap reference circuit, voltage clamp circuit;The start-up circuit is used for external input voltage, exports starting current;The current biasing circuit is used to access starting current, and starting current is biased, and at least exports two bias voltages;The band-gap reference circuit is used to access starting current, produces bandgap voltage reference;The voltage clamp circuit accesses two bias voltages, access bandgap voltage reference, and voltage clamp circuit is used for according to two bias voltages to output supply voltage after bandgap voltage reference progress clamper.Solve the problems, such as that control chip interior power generation circuit is not accurate enough in the prior art.

Description

A kind of circuit for generating source voltage
Technical field
Power circuit design field is the utility model is related to, more particularly to one kind can change stable output with high input voltage Circuit for generating source voltage.
Background technology
How to establish internal power source voltage in fields such as AC/DC, DC/DC designs and reference voltage be all circuits key One of technology.
Input high pressure is generally first produced a coarse and inaccurate starting current by prior art by start-up circuit, The electric current changes and changed with input voltage, using simple source class circuit will be followed to produce internal electric source electricity after the current mirror Pressure.Internal power source voltage caused by so also produces internal bandgap voltage reference by band-gap reference circuit sometimes.
The internal power source voltage of such technology generation not only changes with input voltage, and with internal circuit load current And change.Therefore internal power source voltage value is larger in real work large deviations, causes to suppress energy to the power supply of band-gap reference circuit Power requires higher, and in the circuit higher to performance requirement, the fluctuation of internal power source voltage can influence the performance of each side.
The utility model will solve traditional scheme internal reference spread of voltage, the problem of influenceing circuit performance.
The content of the invention
The technical problems to be solved in the utility model, it is to provide a kind of new circuit for generating source voltage, solves existing The problem of internal reference voltage of any power supply precisely produces in technology.
What the utility model was realized in:A kind of circuit for generating source voltage, the circuit for generating source voltage include Start-up circuit, current biasing circuit, band-gap reference circuit, voltage clamp circuit;
The start-up circuit is used for external input voltage, exports starting current;
The current biasing circuit is used to access starting current, and starting current is biased, and at least exports two partially Put voltage;
The band-gap reference circuit is used to access starting current, produces bandgap voltage reference;
The voltage clamp circuit accesses two bias voltages, access bandgap voltage reference, and voltage clamp circuit is used for root According to two bias voltages to output supply voltage after bandgap voltage reference progress clamper.
Further, source electrode of the start-up circuit including FET P1, P1 is connected with input voltage, and grid is imitated with field Should pipe N1 drain electrode connection, N1 grid is connected with FET N2 grid,
Source electrode of the input voltage also with FET P2, P4 is connected, P2 and P4 grid connection, P2 drain electrode and P3 source Pole is connected, and P2 drain electrode is also connected with grid, and P4 drain electrode is connected with P5 source electrode, and P3 drain electrode is connected with grid, P3 leakage Drain electrode of the pole also with N2, P5 grid are connected, and N2 source electrode and N3 drain and gate connect, and P5 source electrode output starts electricity Stream.
Preferably, the input of the current biasing circuit is connected with starting current, first output the first biased electrical of termination Pressure output, second output termination the second bias voltage output,
Drain electrode of the current biasing circuit input also with FET P10 is connected, P10 grid and P9 grid and drain electrode Connection, P10 source electrode connect input voltage, and P10 source electrode is also connected with P6, P7, P8, P9 source electrode;P6, P7, P8 grid phase Connect, P6 drain electrode connects the first output end of current biasing circuit, and P7 drain electrode connects the second output end of current biasing circuit; The input of current biasing circuit is also connected with P11 source electrode, and P11 drain electrode is connected with P12 source electrode, P12 drain electrode and field Effect pipe N9 drain and gate connection, N9 source electrode and N8 drain and gate connect, the drain electrode of N8 source electrode and N10 and grid Pole is connected, and the grid of N9 source electrode also with N6 and N4 is connected;N6 drain electrode is connected with P9 drain electrode, and source electrode is connected with grid, N6 Source electrode be also connected with N7 drain electrode;N4 drain electrode is connected with N8 drain electrode, source electrode and N5 drain electrode connection;Described N5, N7's Grid also connects with N10 grid.
Preferably, the band-gap reference circuit input is connected with starting current, the input of band-gap reference circuit also with FET P13, P14, P17 source electrode connection, P13 grid and drain electrode are connected, and P13 grid is also connected with P14 grid, P13 drain electrode is also connected with P15 source electrode, and P14 drain electrode is connected with P16 source electrode;The drain electrode of P15, P16 grid and P15 Connection, P15 drain electrode is also connected with triode NPN1 colelctor electrode, P16 drain electrode is also connected with NPN2 colelctor electrode, NPN1, NPN2 base stage is all connected with the bandgap voltage reference output end of band-gap reference circuit;
P17 source electrode is also connected with P19 grid, and P19 source electrode is connected with input voltage, grid and bandgap voltage reference Output end is connected, and P17 grid and drain electrode are connected with P18 source electrode, and the drain electrode of P18 grid and P16 connects, P18 drain electrode It is connected with N11 drain and gate;N11 source electrode and N12 grid and drain electrode connection.
Specifically, the first bias voltage input of the voltage clamp circuit and N13 drain and gate connect, also with N20 grid connects with N17 grid;N20 drain electrode is connected with P20 drain and gate, source electrode and N14 drain electrode connection, N14 grid and N15 grid and drain electrode connection, are also connected with P22 drain electrode;P22 source electrode and the second bias voltage input End connection, grid are connected with supply voltage output end;Second bias voltage input is also connected with P23 source electrode, P23 grid It is connected with the bandgap voltage reference input of voltage clamp circuit, P23 drain electrode is connected with N16 drain and gate, N16 grid Pole is also connected with N18 grid, and N18 drain electrode is connected with N17 source electrode, and N17 drain electrode is connected with N19 grid, N19 source Pole is connected with supply voltage output end, and the N19 source electrode to drain also with P20 and P21 is connected, and P20 grid and P21 grid connect Connect, P21 drain electrode is also connected with N19 grid.
The utility model has the following advantages that:Abandon existing by high-voltage starting circuit generation starting current, startup Electric current leads to the way that band-gap reference circuit produces internal low-voltage supply voltage, and the utility model is by being introduced directly into high voltage power supply Band-gap reference circuit is powered, then the output by the stable band-gap reference circuit of current biasing circuit, finally by clamp circuit Threshold value is adjusted, has reached simplified indoor design, improves reference voltage output accuracy, and external high pressure electricity can be directly accessed Source, the purpose of convenient use.
Brief description of the drawings
Fig. 1 is the start-up circuit schematic diagram described in the utility model embodiment;
Fig. 2 is the band-gap reference circuit and current biasing circuit figure described in the utility model embodiment;
Fig. 3 is the voltage clamp circuit figure described in the utility model embodiment.
Embodiment
To describe technology contents of the present utility model, construction feature, the objects and the effects in detail, below in conjunction with implementation Mode simultaneously coordinates accompanying drawing to be explained in detail.
Referring to Fig. 1, the utility model designs a kind of circuit for generating source voltage, it is big to be primarily adapted for use in external input voltage Panel height is in the application scenarios of internal electric source demand.Such as control chip in our charger for mobile phone, in set top box charger Control chip, the control chip of onboard charger etc., can more than ten volts or tens volts of outside input one on these chips Voltage to chip, then chip is other low voltages this photovoltaic conversion, and specifically the supply voltage produces Circuit includes start-up circuit, current biasing circuit, band-gap reference circuit, voltage clamp circuit;
The start-up circuit is used for external input voltage, exports starting current;In general external input voltage is height Pressure, the starting current of output is minimum current, and our way is some field-effects of being connected between input voltage and zero potential Guan Weiyi branch road, the branch road between other input voltages and zero potential connect some voltage-stabiliser tubes with resistance to adjust FET The electric current of branch road, then the electric current of FET branch road is out regard as starting current by current mirror mirror image.
The current biasing circuit is used to access starting current, and starting current is biased, and at least exports two partially Put voltage;Bias voltage can be used for the biasing driving of the FET of subsequent voltage clamp circuit.Correspondingly, the band gap base Quasi- circuit is used to access starting current, produces bandgap voltage reference;Band-gap reference circuit by designing two branch roads P11, P12 more Place branch road and P17, P18 place branch road are adjusted, and can ensure that the band-gap reference circuit electric current on basis is constant, therefore export Bandgap voltage reference there is very high rejection ratio.
The voltage clamp circuit accesses two bias voltages, access bandgap voltage reference, and voltage clamp circuit is used for root According to two bias voltages to output supply voltage after bandgap voltage reference progress clamper.It further ensure that output voltage Precisely with stably.
In the particular embodiment, as shown in figure 1, the start-up circuit includes FET P1, P1 source electrode and input Voltage is connected, and grid is connected with FET N1 drain electrode, and N1 grid is connected with FET N2 grid,
Source electrode of the input voltage also with FET P2, P4 is connected, P2 and P4 grid connection, P2 drain electrode and P3 source Pole is connected, and P2 drain electrode is also connected with grid, and P4 drain electrode is connected with P5 source electrode, and P3 drain electrode is connected with grid, P3 leakage Drain electrode of the pole also with N2, P5 grid are connected, and N2 source electrode and N3 drain and gate connect, and P5 source electrode output starts electricity Stream.When input voltage reaches designed threshold value, N1/N2 is opened, and circuit is opened.First P2, P3, N2, N3, R6 branch road with N2, which is opened, produces firing current, the second starting current branch road P4, P5 P2, the mirror image of P3 branch roads, by setting P4, P5 size, It is the width and length parameter for changing P4, P5.Similar to the parameter for changing resistance, it is possible to achieve the adjustment of the parameter such as resistance, The ratio of starting current and firing current can be accurately set, simplifies next stage high voltage band-gap reference circuit design.Reach defeated Go out the effect of satisfactory starting current.In the particular embodiment, as illustrated, P1 grid also by voltage-stabiliser tube D3 with Input voltage connection, N1 drain electrode are also connected by resistance R1 with input voltage, and P1 drain electrode also passes through voltage-stabiliser tube D2, resistance R3 It is connected with input voltage, N1 grid is also connected by resistance R4, voltage-stabiliser tube D5 and P1 drain electrode, and N1 drain electrode also passes through resistance R2 and P1 grid connection, is combined by above-mentioned voltage-stabiliser tube and resistance, can more accurately be designed input voltage and be started point.
In other specific embodiments, as shown in Fig. 2 the input of the current biasing circuit connects with starting current Connect, first output termination the first bias voltage output, second output termination the second bias voltage output,
Drain electrode of the current biasing circuit input also with FET P10 is connected, P10 grid and P9 grid and drain electrode Connection, P10 source electrode connect input voltage, and P10 source electrode is also connected with P6, P7, P8, P9 source electrode;P6, P7, P8 grid phase Connect, P6 drain electrode connects the first output end of current biasing circuit, and P7 drain electrode connects the second output end of current biasing circuit; The input of current biasing circuit is also connected with P11 source electrode, and P11 drain electrode is connected with P12 source electrode, P12 drain electrode and field Effect pipe N9 drain and gate connection, N9 source electrode and N8 drain and gate connect, the drain electrode of N8 source electrode and N10 and grid Pole is connected, and the grid of N9 source electrode also with N6 and N4 is connected;N6 drain electrode is connected with P9 drain electrode, and source electrode is connected with grid, N6 Source electrode be also connected with N7 drain electrode;N4 drain electrode is connected with N8 drain electrode, source electrode and N5 drain electrode connection;Described N5, N7's Grid also connects with N10 grid.In Fig. 2 left-half, current biasing circuit has been reached for internal electricity by above-mentioned design Source Voltage Establishment provides the technique effect of current offset.
In the embodiment shown in Figure 2, right half part is looked at, is band-gap reference circuit, establishes and carries for internal power source voltage Voltage supplied biases.The band-gap reference circuit input is connected with starting current, and the input of band-gap reference circuit is also imitated with field Should pipe P13, P14, P17 source electrode connection, P13 grid and drain electrode connected, and P13 grid is also connected with P14 grid, P13 Drain electrode be also connected with P15 source electrode, P14 drain electrode is connected with P16 source electrode;The drain electrode of P15, P16 grid and P15 connects Connecing, P15 drain electrode is also connected with triode NPN1 colelctor electrode, P16 drain electrode is also connected with NPN2 colelctor electrode, NPN1, NPN2 base stage is all connected with the bandgap voltage reference output end of band-gap reference circuit;
P17 source electrode is also connected with P19 grid, and P19 source electrode is connected with input voltage, grid and bandgap voltage reference Output end is connected, and P17 grid and drain electrode are connected with P18 source electrode, and the drain electrode of P18 grid and P16 connects, P18 drain electrode It is connected with N11 drain and gate;N11 source electrode and N12 grid and drain electrode connection.So setting is advantageous in that, solves Traditional bandgap reference circuit needs internal power source voltage to be worked after establishing, while needs to carry asking for circuit for starting up band gap basis Topic.The feeder ear of high voltage band-gap reference circuit described in the utility model can be powered by external high pressure and not need internal power source voltage Power supply, while the starting current that can be provided by upper level start-up circuit is started, and is eliminated traditional bandgap reference circuit and is carried Start-up circuit.High voltage band-gap reference circuit P17, P18 branch road described in the utility model can be according to the big minor adjustment of starting current The branch current, to ensure P11, P12, P13, P14, tri- branch currents of P15, P16 are constant, so as to ensure bandgap voltage reference VBG stability and PSRR.The high-precision bandgap voltage reference VBG.The high-precision bandgap voltage reference VBG is provided Next stage internal power source voltage clamp circuit, so as to produce high-precision internal power source voltage.
Please see Figure 3 below, in the particular embodiment, the first bias voltage input of the voltage clamp circuit with N13 drain and gate connection, is also connected with N20 grid and N17 grid;N20 drain electrode connects with P20 drain and gate Connect, source electrode and N14 drain electrode connection, N14 grid and N15 grid and drain electrode are connected, be also connected with P22 drain electrode;P22's Source electrode is connected with the second bias voltage input, and grid is connected with supply voltage output end;Second bias voltage input also with P23 source electrode connection, P23 grid and the bandgap voltage reference input of voltage clamp circuit connect, P23 drain electrode and N16 Drain and gate connection, N16 grid is also connected with N18 grid, and N18 drain electrode is connected with N17 source electrode, N17 leakage Pole and N19 grid are connected, and N19 source electrode is connected with supply voltage output end, and the N19 source electrode to drain also with P20 and P21 connects Connect, P20 grid and P21 grid are connected, and P21 drain electrode is also connected with N19 grid.In specific design, P22 grid It is connected with supply voltage output end VCC by resistance R13, is also connected by resistance R14 and N18 source electrode;FET N13, N14, N15, N16, N18 source electrode are connected with each other.In the embodiment shown in fig. 3, by band-gap reference offer bias current and partially Voltage is put, by the clamping action of amplifier, by internal power source voltage VCC clampers to required value, due to bandgap voltage reference Value VBG is accurate enough and can be trimmed, while amplifier can also provide enough multiplication factors, therefore internal power source voltage VCC is not influenceed by the fluctuation of the other parameters such as load current and external high pressure input voltage, ensures enough service precisions.From original Said in reason makes VCC=(R13+R14) * VBG/R14 using the clamper function of amplifier so that the circuit has compared to traditional circuit circuit There is following major advantage:Firstth, supply voltage output VCC precision is high produced by the circuit, not by load and outside input high pressure Change and change;Secondth, VCC voltage swings can follow production as desired by setting R2, R3 resistance flexible modulation, conventional source Raw supply voltage circuit VCC precision is low while size is not easy to adjust.
Finally, as an entirety, the beneficial effects of the utility model are:
1st, high voltage band-gap reference circuit directly produces internal reference voltage by input high voltage supply, it is not necessary in first establishing Portion's low-tension supply voltage;Internal power source voltage described in Part II compared to having sufficiently high accuracy, not by other parameters ripple Dynamic influence;
2nd, internal power source voltage can be according to being actually needed flexible modulation size;
3rd, when high input voltage voltage reaches start-up circuit threshold value, circuit start produces starting current, and start-up circuit is succinct Practicality, area is saved, starting current, which provides high voltage band-gap reference circuit, can simplify the design of high voltage band-gap reference circuit;
4th, three kinds of circuit collocation uses of the utility model can produce high-precision power voltage and high-precision band-gap reference electricity Pressure, big I flexible modulation, integrated circuit brief and practical.
Embodiment of the present utility model is the foregoing is only, not thereby limits scope of patent protection of the present utility model, Every equivalent structure made using the utility model specification and accompanying drawing content or equivalent flow conversion, or directly or indirectly fortune Used in other related technical areas, similarly it is included in scope of patent protection of the present utility model.

Claims (5)

1. a kind of circuit for generating source voltage, it is characterised in that it is inclined that the circuit for generating source voltage includes start-up circuit, electric current Circuits, band-gap reference circuit, voltage clamp circuit;
The start-up circuit is used for external input voltage, exports starting current;
The current biasing circuit is used to access starting current, and starting current is biased, and at least exports two biased electricals Pressure;
The band-gap reference circuit is used to access starting current, produces bandgap voltage reference;
The voltage clamp circuit accesses two bias voltages, access bandgap voltage reference, and voltage clamp circuit is used for according to two Individual bias voltage carries out output supply voltage after clamper to bandgap voltage reference.
2. circuit for generating source voltage according to claim 1, its feature is for fear of the start-up circuit includes field-effect Pipe P1, P1 source electrode are connected with input voltage, and grid is connected with FET N1 drain electrode, and N1 grid is with FET N2's Grid connects,
Source electrode of the input voltage also with FET P2, P4 is connected, and P2 and P4 grid connection, P2 drain electrode connect with P3 source electrode Connect, P2 drain electrode is also connected with grid, and P4 drain electrode is connected with P5 source electrode, and P3 drain electrode is connected with grid, and P3 drain electrode is also The grid of drain electrode, P5 with N2 is connected, and N2 source electrode and N3 drain and gate connect, P5 source electrode output starting current.
3. circuit for generating source voltage according to claim 1, it is characterised in that the input of the current biasing circuit It is connected with starting current, first output termination the first bias voltage output, second output termination the second bias voltage output,
Drain electrode of the current biasing circuit input also with FET P10 is connected, and P10 grid and P9 grid and drain electrode connect Connect, P10 source electrode connects input voltage, and P10 source electrode is also connected with P6, P7, P8, P9 source electrode;P6, P7, P8 grid are mutual Connection, P6 drain electrode connect the first output end of current biasing circuit, and P7 drain electrode connects the second output end of current biasing circuit;Electricity The input of stream biasing circuit also be connected with P11 source electrode, and P11 drain electrode is connected with P12 source electrode, P12 drain electrode and field are imitated Should pipe N9 drain and gate connection, N9 source electrode and N8 drain and gate connects, N8 source electrode and N10 drain and gate Connection, the grid of N9 source electrode also with N6 and N4 are connected;N6 drain electrode is connected with P9 drain electrode, and source electrode is connected with grid, N6's Source electrode is also connected with N7 drain electrode;N4 drain electrode is connected with N8 drain electrode, source electrode and N5 drain electrode connection;Described N5, N7 grid Pole also connects with N10 grid.
4. circuit for generating source voltage according to claim 1, it is characterised in that the band-gap reference circuit input with Starting current is connected, and the source electrode of the input of band-gap reference circuit also with FET P13, P14, P17 is connected, P13 grid Connected with drain electrode, P13 grid also be connected with P14 grid, and P13 drain electrode is also connected with P15 source electrode, P14 drain electrode and P16 source electrode connection;The drain electrode of P15, P16 grid and P15 connects, and the P15 colelctor electrode to drain also with triode NPN1 connects Connect, P16 drain electrode is also connected with NPN2 colelctor electrode, the band-gap reference electricity of NPN1, NPN2 base stage all with band-gap reference circuit Press output end connection;
P17 source electrode is also connected with P19 grid, and P19 source electrode is connected with input voltage, and grid exports with bandgap voltage reference End connection, P17 grid and drain electrode are connected with P18 source electrode, and the drain electrode of P18 grid and P16 connects, P18 drain electrode and N11 Drain and gate connection;N11 source electrode and N12 grid and drain electrode connection.
5. circuit for generating source voltage according to claim 1, it is characterised in that the first of the voltage clamp circuit is inclined The drain and gate for putting voltage input end and N13 connects, and is also connected with N20 grid and N17 grid;N20 drain electrode and P20 Drain and gate connection, source electrode and N14 drain electrode connection, N14 grid and N15 grid and drain electrode connection, also with P22's Drain electrode connection;P22 source electrode is connected with the second bias voltage input, and grid is connected with supply voltage output end;Second biasing Voltage input end is also connected with P23 source electrode, and P23 grid and the bandgap voltage reference input of voltage clamp circuit connect, P23 drain electrode is connected with N16 drain and gate, and N16 grid is also connected with N18 grid, N18 drain electrode and N17 source Pole is connected, and N17 drain electrode is connected with N19 grid, and N19 source electrode is connected with supply voltage output end, N19 drain electrode also with P20 is connected with P21 source electrode, and P20 grid and P21 grid are connected, and P21 drain electrode is also connected with N19 grid.
CN201721116666.9U 2017-09-01 2017-09-01 A kind of circuit for generating source voltage Active CN207133684U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107562116A (en) * 2017-09-01 2018-01-09 福建省福芯电子科技有限公司 A kind of circuit for generating source voltage
CN108549451A (en) * 2018-05-23 2018-09-18 中国电子科技集团公司第五十八研究所 High pressure areas coefficient interior power supply circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107562116A (en) * 2017-09-01 2018-01-09 福建省福芯电子科技有限公司 A kind of circuit for generating source voltage
CN108549451A (en) * 2018-05-23 2018-09-18 中国电子科技集团公司第五十八研究所 High pressure areas coefficient interior power supply circuit

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Patentee after: FUJIAN FUXIN ELECTRONIC TECHNOLOGY Co.,Ltd.

Address before: 350001 the 22 layer C and D unit of the No. 5 building, F District, Fuzhou Software Park, No. 89, the software avenue of the Drum Tower District, Fuzhou, Fujian

Patentee before: FUJIAN FUXIN ELECTRONIC TECHNOLOGY Co.,Ltd.