CN206948288U - A kind of voltage controlled oscillator biasing circuit with flow-route and temperature compensation - Google Patents
A kind of voltage controlled oscillator biasing circuit with flow-route and temperature compensation Download PDFInfo
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- CN206948288U CN206948288U CN201720817612.9U CN201720817612U CN206948288U CN 206948288 U CN206948288 U CN 206948288U CN 201720817612 U CN201720817612 U CN 201720817612U CN 206948288 U CN206948288 U CN 206948288U
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Abstract
The utility model discloses a kind of voltage controlled oscillator biasing circuit with flow-route and temperature compensation, including by metal-oxide-semiconductor and other element groups into ring retard, temp compensation bias circuit and technological compensa tion biasing circuit, the technological compensa tion biasing circuit input inputs control voltage, the temp compensation bias circuit output end and technological compensa tion biasing circuit output end are connected with ring retard input, and the technological compensa tion biasing circuit and temp compensation bias circuit maintain ring retard input electric current constant jointly.The utility model controls the electric current of ring retard input by technological compensa tion biasing circuit and temp compensation bias circuit simultaneously, when ring retard input electric current due in ring retard metal-oxide-semiconductor influenceed by production technology or temperature and when changing, compensated by technological compensa tion biasing circuit and temp compensation bias circuit input electric current, so as to the Current Voltage size of stabilisation delay ring input.
Description
Technical field
Integrated circuit fields are the utility model is related to, more specifically to a kind of VCO based on metal-oxide-semiconductor composition
Device biasing circuit.
Background technology
Voltage controlled oscillator (VCO) is one important part of phase-locked loop circuit, and the voltage controlled oscillator is mainly used in
The frequency of output signal is controlled according to the control voltage of input, the voltage controlled oscillator species is more, wherein being formed based on metal-oxide-semiconductor
Voltage controlled oscillator be most widely used.The frequency of output signal and the ratio of control voltage are referred to as voltage-controlled shake in voltage controlled oscillator
Swing the gain K of deviceVIf gain KVChange the excessive stability for easily influenceing phase-locked loop circuit.
Gain K described in voltage controlled oscillator in practical applicationVThe reason for fluctuating change, is by metal-oxide-semiconductor technique and temperature
Influence, the technologic difference of metal-oxide-semiconductor and temperature influence to show metal-oxide-semiconductor threshold voltage V to caused by itthDifference, according to
Metal-oxide-semiconductor square law formula(ID- metal-oxide-semiconductor electric current, Cox- metal-oxide-semiconductor grid oxygen
Electric capacity, Vgs- metal-oxide-semiconductor gate source voltage, Vth- metal-oxide-semiconductor threshold voltage, Vds- metal-oxide-semiconductor drain-source voltage) understand, due in metal-oxide-semiconductor technique
Difference and temperature to threshold voltage VthInfluence cause the electric current for flowing through metal-oxide-semiconductor to change, so as to have influence on metal-oxide-semiconductor source electrode
Or drain terminal voltage, eventually affect the gain K of voltage controlled oscillatorV。
Utility model content
The technical problems to be solved in the utility model is：A kind of voltage controlled oscillator biasing with flow-route and temperature compensation is provided
Circuit.
The solution that the utility model solves its technical problem is：
It is a kind of with flow-route and temperature compensation voltage controlled oscillator biasing circuit, including be made up of metal-oxide-semiconductor ring retard, temperature
Biasing circuit and technological compensa tion biasing circuit are compensated, the technological compensa tion biasing circuit input inputs control voltage, described
Temp compensation bias circuit output end and technological compensa tion biasing circuit output end are connected with ring retard input, the technique
Compensation biasing circuit and temp compensation bias circuit maintain ring retard input electric current constant jointly.
As the further improvement of above-mentioned technical proposal, the technological compensa tion biasing circuit includes the first ideal current source,
The technological compensa tion biasing circuit is configured as the first ideal current ource electric current and input electricity caused by input control voltage
The difference of stream is with being output to delay loop current value into positive correlation.
As the further improvement of above-mentioned technical proposal, the technological compensa tion biasing circuit includes metal-oxide-semiconductor N1, the first mirror image
Current module, the second image current module and the 3rd image current module, the metal-oxide-semiconductor N1 grids input control voltage, institute
State metal-oxide-semiconductor N1 source electrodes or drain electrode is connected with the first image current module input, first ideal current source and the second mirror image
Current module input is connected, and the second image current module output end and the first image current module output end are with
Three image current module inputs are connected, and the 3rd image current module output end is connected with ring retard input.
As the further improvement of above-mentioned technical proposal, the temp compensation bias circuit input input desired offset electricity
Pressure, the temp compensation bias circuit include secondary ideal current source, and the temp compensation bias circuit is configured as the second reason
Think current source current with the difference of input current caused by input bias voltage with being output to delay loop current value into positive correlation.
As the further improvement of above-mentioned technical proposal, the temp compensation bias circuit includes operational amplifier, metal-oxide-semiconductor
N2, the 4th image current module, the 5th image current module and the 6th image current module, the operational amplifier is the same as mutually defeated
Enter and hold input offset voltage, the operational amplifier output terminal is connected with metal-oxide-semiconductor N2 grids, the operational amplifier anti-phase input
End and metal-oxide-semiconductor N2 pipes source electrode or drain electrode be connected with the 4th image current module input, the secondary ideal current source with
5th image current module input is connected, the 4th image current module output end and the 5th image current the module output
End is connected with the 6th image current module input, the 6th image current module output end and ring retard input phase
Even.
As the further improvement of above-mentioned technical proposal, the ring retard includes the multistage phase inverter being made up of metal-oxide-semiconductor, institute
The series for stating phase inverter is odd number, and the output end of previous stage phase inverter is connected with the input of rear stage phase inverter, and head end is anti-phase
Device input is connected with end inverter input, and the power end of the phase inverter is as ring retard input, the phase inverter
Earth terminal is grounded.
As the further improvement of above-mentioned technical proposal, the phase inverter includes a N-type metal-oxide-semiconductor and a p-type MOS
Pipe, the p-type metal-oxide-semiconductor grid are connected with N-type metal-oxide-semiconductor grid and are used as inverter input, and the p-type metal-oxide-semiconductor drains and N-type
Metal-oxide-semiconductor drain electrode is connected and is used as inverter output, and the N-type metal-oxide-semiconductor source electrode is grounded as phase inverter earth terminal, the p-type
Metal-oxide-semiconductor source electrode also serves as ring retard input as the power end of phase inverter.
Wherein, one or more mirror current source may be included in the above-mentioned first to the 6th image current module.
The beneficial effects of the utility model are：The utility model passes through technological compensa tion biasing circuit and temperature compensated bias
Circuit controls the electric current of ring retard input simultaneously, when ring retard input electric current due in ring retard metal-oxide-semiconductor by production technology
Or temperature is influenceed when changing, and is entered by technological compensa tion biasing circuit and temp compensation bias circuit input electric current
Row compensation, so as to the Current Voltage size of stabilisation delay ring input.
Brief description of the drawings
, below will be to needed for embodiment description in order to illustrate more clearly of the technical scheme in the embodiment of the utility model
The accompanying drawing to be used is briefly described.Obviously, described accompanying drawing is part of the embodiment of the present utility model, rather than entirely
Portion's embodiment, those skilled in the art on the premise of not paying creative work, can also obtain it according to these accompanying drawings
His design and accompanying drawing.
Fig. 1 is circuit frame figure of the present utility model；
Fig. 2 is technological compensa tion biasing circuit and temp compensation bias circuit embodiment schematic diagram of the present utility model；
Fig. 3 is the circuit frame figure of the utility model ring retard；
Fig. 4 is the embodiment schematic diagram of the utility model ring retard.
Embodiment
Design, concrete structure and caused technique effect of the present utility model are carried out below with reference to embodiment and accompanying drawing
Clearly and completely describe, to be completely understood by the purpose of this utility model, feature and effect.Obviously, described embodiment
It is part of the embodiment of the present utility model, rather than whole embodiments, based on embodiment of the present utility model, the skill of this area
The other embodiment that art personnel are obtained on the premise of not paying creative work, belong to the model of the utility model protection
Enclose.In addition, all annexations being previously mentioned in text, not single finger element directly connects, and refer to can according to specific implementation feelings
Condition, by adding or reducing connecting element, to form more excellent connection circuit.Each technical characteristic in the invention,
Can be with combination of interactions on the premise of not conflicting conflict.
1~Fig. 4 of reference picture, the invention disclose a kind of voltage controlled oscillator biased electrical with flow-route and temperature compensation
Road, including ring retard, temp compensation bias circuit and the technological compensa tion biasing circuit being made up of metal-oxide-semiconductor, the technological compensa tion
Biasing circuit input inputs control voltage, the temp compensation bias circuit output end and the output of technological compensa tion biasing circuit
End is connected with ring retard input, and the technological compensa tion biasing circuit and temp compensation bias circuit maintain ring retard jointly
Input electric current is constant.Specifically, when ring retard causes ring retard input terminal voltage electric current because being affected by temperature internal metal-oxide-semiconductor
When changing, the invention is by temp compensation bias circuit to compensate its change；When ring retard because internal metal-oxide-semiconductor is given birth to
When production. art influences and causes the ring retard input terminal voltage electric current to change, the invention passes through technological compensa tion biasing circuit
To compensate its change.The invention by the collective effect of temp compensation bias circuit and technological compensa tion biasing circuit so as to
The Current Voltage size of stabilisation delay ring input.
Preferred embodiment is further used as, to realize the function of the technological compensa tion biasing circuit, the invention
Technological compensa tion biasing circuit described in embodiment includes the first ideal current source, the technological compensa tion biasing circuit by with
The first ideal current ource electric current is set to the difference of input current caused by input control voltage with being output to delay circular current
It is worth into positive correlation, makes the electric current I for being output to ring retardvco1Meet equation below 1,(wherein IPtat1- the first ideal current source current value,
Vctrl- control voltage), it can be seen from metal-oxide-semiconductor square law formula, metal-oxide-semiconductor electric current and threshold voltage are into inverse correlation, and by formula 1
Understand, control voltage keeps constant, and technological compensa tion biasing circuit is output to the electric current I of ring retardvco1With metal-oxide-semiconductor threshold voltage Vth
Into positive correlation, compensate ring retard with this causes ring retard input terminal voltage electric current because internal metal-oxide-semiconductor is influenceed by production technology
Change.
Specifically, technological compensa tion biasing circuit described in the invention specific embodiment includes metal-oxide-semiconductor N1, the first mirror image
Current module A1, the second image current modules A 2 and the 3rd image current modules A 3, the metal-oxide-semiconductor N1 grids input control electricity
Pressure, the metal-oxide-semiconductor N1 source electrodes or drain electrode are connected with the first image current module input, first ideal current source and second
Image current module input is connected, and the second image current module output end and the first image current module output end are equal
It is connected with the 3rd image current module input, the 3rd image current module output end is connected with ring retard input.
Preferred embodiment is further used as, to realize the function of the temp compensation bias circuit, the invention
The temp compensation bias circuit input inputs desired offset voltage, and the temp compensation bias circuit includes secondary ideal electricity
Stream source, the temp compensation bias circuit are configured as defeated caused by secondary ideal current source current and input bias voltage
Enter the difference of electric current with being output to delay loop current value into positive correlation, temp compensation bias circuit is output to the electric current of ring retard
Ivco2Meet equation below 2,(wherein Iptat2- secondary ideal current source electricity
Flow valuve, Vref- temp compensation bias circuit bias voltage), and from formula 2, bias voltage keeps constant, and temperature-compensating is inclined
Circuits are output to the electric current I of ring retardvco2With metal-oxide-semiconductor threshold voltage VthInto positive correlation, ring retard is compensated because of internal MOS with this
Pipe is affected by temperature and causes the change of ring retard input terminal voltage electric current.
Specifically, temp compensation bias circuit described in the invention embodiment includes operational amplifier, MOS
Pipe N2, the 4th image current modules A 4, the 5th image current modules A 5 and the 6th image current modules A 6, the operation amplifier
Device in-phase input end input offset voltage, the operational amplifier output terminal are connected with metal-oxide-semiconductor N2 grids, the operational amplifier
Inverting input and metal-oxide-semiconductor N2 pipes source electrode or drain electrode are connected with the 4th image current module input, the secondary ideal
Current source is connected with the 5th image current module input, the 4th image current module output end and the 5th image current
Module output end is connected with the 6th image current module input, and the 6th image current module output end and ring retard are defeated
Enter end to be connected.Wherein described operational amplifier is used to carry out clamper to the metal-oxide-semiconductor drain potential, to prevent metal-oxide-semiconductor drain electrode electricity
Position is influenced by temperature and changed.
Described above first to the 6th image current module can include one or more mirror current source, as each
Mirror current source number in image current module and ring retard in practical application not by the electric current of temperature and technogenic influence with by
Temperature is relevant with the ratio of the electric current of technogenic influence.
It is further used as preferred embodiment, in the invention embodiment, the ring retard includes multistage
The phase inverter being made up of metal-oxide-semiconductor, the series of the phase inverter are odd number, output end and the rear stage phase inverter of previous stage phase inverter
Input be connected, head end inverter input is connected with end inverter input, and the power end of the phase inverter is as prolonging
Slow ring input, the phase inverter earth terminal ground connection.
Specifically, in the invention specific embodiment, the phase inverter includes a N-type metal-oxide-semiconductor and a p-type MOS
Pipe, the p-type metal-oxide-semiconductor grid are connected with N-type metal-oxide-semiconductor grid and are used as inverter input, and the p-type metal-oxide-semiconductor drains and N-type
Metal-oxide-semiconductor drain electrode is connected and is used as inverter output, and the N-type metal-oxide-semiconductor source electrode is grounded as phase inverter earth terminal, the p-type
Metal-oxide-semiconductor source electrode also serves as ring retard input as the power end of phase inverter.
Better embodiment of the present utility model is illustrated above, but the invention be not limited to it is described
Embodiment, those skilled in the art can also make a variety of equivalent changes on the premise of without prejudice to the utility model spirit
Type or replacement, these equivalent modifications or replacement are all contained in the application claim limited range.
Claims (7)
1. a kind of voltage controlled oscillator biasing circuit with flow-route and temperature compensation, including the ring retard being made up of metal-oxide-semiconductor, its feature
It is：Also include temp compensation bias circuit and technological compensa tion biasing circuit, the technological compensa tion biasing circuit input is defeated
Enter control voltage, the temp compensation bias circuit output end and technological compensa tion biasing circuit output end input with ring retard
End is connected, and the technological compensa tion biasing circuit and temp compensation bias circuit maintain ring retard input electric current constant jointly.
A kind of 2. voltage controlled oscillator biasing circuit with flow-route and temperature compensation according to claim 1, it is characterised in that：
The technological compensa tion biasing circuit includes the first ideal current source, and the technological compensa tion biasing circuit is configured as the first desired electrical
Stream ource electric current and the difference of input current caused by input control voltage postpone loop current value into positive correlation with being output to.
A kind of 3. voltage controlled oscillator biasing circuit with flow-route and temperature compensation according to claim 2, it is characterised in that：
The technological compensa tion biasing circuit includes metal-oxide-semiconductor N1, the first image current module, the second image current module and the 3rd mirror image
Current module, the metal-oxide-semiconductor N1 grids input control voltage, the metal-oxide-semiconductor N1 source electrodes or drain electrode and the first image current module
Input is connected, and first ideal current source is connected with the second image current module input, the second image current mould
Block output end and the first image current module output end are connected with the 3rd image current module input, the 3rd mirror image
Current module output end is connected with ring retard input.
A kind of 4. voltage controlled oscillator biasing circuit with flow-route and temperature compensation according to claim 1, it is characterised in that：
The temp compensation bias circuit input input offset voltage, the temp compensation bias circuit include secondary ideal electric current
Source, the temp compensation bias circuit are configured as secondary ideal current source current and input caused by input bias voltage
The difference of electric current is with being output to delay loop current value into positive correlation.
A kind of 5. voltage controlled oscillator biasing circuit with flow-route and temperature compensation according to claim 4, it is characterised in that：
The temp compensation bias circuit includes operational amplifier, metal-oxide-semiconductor N2, the 4th image current module, the 5th image current module
And the 6th image current module, the operational amplifier in-phase input end input offset voltage, the operational amplifier output
End be connected with metal-oxide-semiconductor N2 grids, operational amplifier inverting input and metal-oxide-semiconductor the N2 pipes source electrode or drain with the 4th mirror
Image current module input is connected, and the secondary ideal current source is connected with the 5th image current module input, and the described 4th
Image current module output end and the 5th image current module output end are connected with the 6th image current module input, institute
The 6th image current module output end is stated with ring retard input to be connected.
6. a kind of voltage controlled oscillator biasing circuit with flow-route and temperature compensation according to any one of claim 1 to 5, its
It is characterised by：The ring retard includes the multistage phase inverter being made up of metal-oxide-semiconductor, and the series of the phase inverter is odd number, previous stage
The output end of phase inverter is connected with the input of rear stage phase inverter, head end inverter input and end inverter input phase
Even, the power end of the phase inverter is as ring retard input, the phase inverter earth terminal ground connection.
A kind of 7. voltage controlled oscillator biasing circuit with flow-route and temperature compensation according to claim 6, it is characterised in that：
The phase inverter includes a N-type metal-oxide-semiconductor and a p-type metal-oxide-semiconductor, the p-type metal-oxide-semiconductor grid be connected with N-type metal-oxide-semiconductor grid and
As inverter input, p-type metal-oxide-semiconductor drain electrode drains with N-type metal-oxide-semiconductor to be connected and is used as inverter output, the N-type
Metal-oxide-semiconductor source electrode is grounded as phase inverter earth terminal, and the p-type metal-oxide-semiconductor source electrode also serves as ring retard as the power end of phase inverter
Input.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201720817612.9U CN206948288U (en) | 2017-07-06 | 2017-07-06 | A kind of voltage controlled oscillator biasing circuit with flow-route and temperature compensation |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201720817612.9U CN206948288U (en) | 2017-07-06 | 2017-07-06 | A kind of voltage controlled oscillator biasing circuit with flow-route and temperature compensation |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107332558A (en) * | 2017-07-06 | 2017-11-07 | 佛山科学技术学院 | A kind of voltage controlled oscillator biasing circuit compensated with flow-route and temperature |
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2017
- 2017-07-06 CN CN201720817612.9U patent/CN206948288U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107332558A (en) * | 2017-07-06 | 2017-11-07 | 佛山科学技术学院 | A kind of voltage controlled oscillator biasing circuit compensated with flow-route and temperature |
| CN107332558B (en) * | 2017-07-06 | 2024-04-30 | 佛山科学技术学院 | Voltage-controlled oscillator bias circuit with process and temperature compensation |
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