CN206849039U

CN206849039U - Ultrasonic fingerprint sensor

Info

Publication number: CN206849039U
Application number: CN201720397168.XU
Authority: CN
Inventors: 季锋; 闻永祥; 刘琛; 周浩
Original assignee: Hangzhou Silan Microelectronics Co Ltd
Current assignee: Hangzhou Silan Microelectronics Co Ltd
Priority date: 2017-04-14
Filing date: 2017-04-14
Publication date: 2018-01-05
Anticipated expiration: 2027-04-14

Abstract

This application discloses ultrasonic fingerprint sensor.The ultrasonic fingerprint sensor includes：Cmos circuit；And at least one ultrasonic transducer, wherein, at least one ultrasonic transducer includes：Template layer, the template layer include the first opening；Stop-layer on the template layer, the stop-layer conformally cover the template layer, so as to be formed and the described first corresponding cavity of opening；Mask layer on the stop-layer, the mask layer include extending at least one second opening of the cavity from surface；And the laminated piezoelectric on the mask layer, wherein, the stop-layer and the mask layer surround the cavity jointly.The ultrasonic fingerprint sensor forms cavity using template layer and stop-layer, so as to reduce manufacturing cost and improve the performance of sensor.

Description

Ultrasonic fingerprint sensor

Technical field

Fingerprint sensor is the utility model is related to, more particularly, to ultrasonic fingerprint sensor.

Background technology

Living things feature recognition is the technology for distinguishing different biological features, including fingerprint, palmmprint, face, DNA, sound Etc. identification technology.Fingerprint refers to the convex uneven lines of the positive surface skin fovea superior of the finger tips of people, the regular arrangement form of lines Different line types.Fingerprint recognition refers to by the details of more different fingerprints to carry out identity authentication.Due to lifelong Consistency, uniqueness and convenience, the application of fingerprint recognition are more and more extensive.

In fingerprint recognition, information in fingerprint is obtained using sensor.According to the difference of operation principle, fingerprint sensor Optics, electric capacity, pressure, sonac can be divided into.Optical sensor volume is larger, and price is relatively high, and for fingerprint Drying or dampness it is sensitive, belong to first generation fingerprint identification technology.Optical fingerprint identification system can not be penetrated due to light Skin surface, so can only be by scanning the surface of finger skin, it is impossible to be deep into skin corium.In this case, finger is dry The effect of net degree direct influence identification, if having glued more dust, sweat etc. in user's finger, may just occur identification The situation of error.Also, touched if people do a fingerprint hand according to finger, it is also possible to pass through identifying system.Therefore, for For family, optical sensor using for the use of there is safety and stability the problem of.Capacitive fingerprint sensor technology uses Array of capacitors detects the lines of fingerprint, belongs to second generation fingerprint sensor.Each capacitor includes two pole plates.Touched in finger When touching, the lines of fingerprint forms a dielectric part between pole plate, so as to detect fingerprint according to the change of electric capacity Lines.Capacitive fingerprint sensing device is lower and compact than optics sensor price, and stability is high, makes in actual product Use more attractive.For example, the fingerprint sensor used in many mobile phones is capacitive fingerprint sensing device.However, electric capacity Formula fingerprint sensor has the shortcomings that can not evading, i.e., is had a great influence by temperature, humidity, contamination.

As a further improvement, third generation fingerprint sensor has been developed, wherein the inverse piezoelectricity using piezoelectric Effect produces ultrasonic wave.The ultrasonic wave shows different reflectivity and transmission when touching fingerprint in the ridge, valley in fingerprint Rate.Finger print information can be read by the ultrasonic beam signal scanned in certain area.Surpass caused by ultrasonic fingerprint sensor Sound wave can penetrate the phone housing made of glass, aluminium, stainless steel, sapphire or plastics and be scanned, so that will Ultrasonic fingerprint sensor is arranged in phone housing.The advantage is graceful Customer design a new generation, innovation, the movement of differentiation Terminal provides flexibility.In addition, the experience of user also gets a promotion, scanning fingerprint can not be by there may be contamination on finger Influence, such as sweat, hand lotion etc., so as to improve the stability of fingerprint sensor and accuracy.

Existing ultrasonic fingerprint sensor includes the ultrasonic transducer and cmos circuit integrated.Eutectic bonding It is the effective ways of integrated CMOS circuit and ultrasonic transducer, but this kind of method alignment precision is low, manufacturing cost is high.More Economic scheme is directly to manufacture ultrasonic transducer on cmos circuit surface, is set between cmos circuit and ultrasonic transducer Insulating barrier is put to separate the two.Cmos circuit in the structure is used to handle ultrasonic signal, therefore ultrasonic fingerprint sensor can To read and identify fingerprint at a high speed.However, ultrasonic transducer includes the cavity structure below laminated piezoelectric, the cavity knot Structure not only manufactures difficulty, and due to process deviation cause the frequency of ultrasonic fingerprint sensor is unstable, parameter consistency is poor, And yield rate is poor.

Utility model content

In view of this, the purpose of this utility model is to provide ultrasonic fingerprint sensor, wherein, utilize template layer and stopping Layer forms cavity, with the performance for reducing manufacturing cost and improving sensor.

According to one side of the present utility model, there is provided a kind of method for manufacturing ultrasonic fingerprint sensor, including：Formed Cmos circuit；And ultrasonic transducer is formed on the cmos circuit, the cmos circuit and the ultrasonic transducer Connection, for driving the ultrasonic transducer and handling detection signal caused by the ultrasonic transducer, wherein, formed super The step of acoustic wave transducer, includes：Form template layer；The first opening is formed in the template layer；Formed on the template layer Stop-layer, the stop-layer conformally cover the template layer；Sacrifice layer, the sacrifice layer filling are formed on the stop-layer First opening；Mask layer is formed on the stop-layer and the sacrifice layer, the mask layer covers the sacrifice layer； The second opening for reaching the sacrifice layer is formed on the mask layer；The sacrifice layer, which is removed, via the described second opening forms sky Chamber；Laminated piezoelectric is formed on the mask layer；And the electrical connection formed between the laminated piezoelectric and the cmos circuit, Wherein, the stop-layer and the mask layer surround the cavity jointly.

Preferably, before template layer is formed, in addition to：The first insulating barrier is formed on the cmos circuit.

Preferably, before template layer is formed, in addition to：Passivation layer is formed on the cmos circuit.

Preferably, after the formation of the cavity, in addition to：Sealant is formed on the mask layer to open to close described second Mouthful.

Preferably, first opening is formed using etching, the surface for being etched in first insulating barrier stops, making Obtain first opening and penetrate the template layer.

Preferably, after the formation of the cavity, in addition to：The second insulating barrier is formed on the mask layer.

Preferably, the second insulating barrier closing second opening.

Preferably, etch-back is carried out to second insulating barrier with reduce thickness.

Preferably, the step of forming cmos circuit includes：At least one transistor is formed on substrate；And it is described extremely Multiple wiring layers and multiple interlayer dielectric layers are formed on a few transistor, wherein, the multiple wiring layer is by the multiple layer Between dielectric layer be separated into multiple different aspects.

Preferably, the step of forming laminated piezoelectric includes：First electrode is formed on second insulating barrier；Described Piezoelectric layer is formed on one electrode；And second electrode is formed on the piezoelectric layer, wherein, the first electrode and described second Electrode contacts the lower surface and upper surface of the piezoelectric layer respectively.

Preferably, the step of electrical connection formed between the laminated piezoelectric and the cmos circuit, includes：Form difference First contact of at least one wiring layer extended to from the first electrode and the second electrode in the multiple wiring layer With the second contact.

Preferably, first contact reaches first electricity from the upper surface of the piezoelectric layer through the piezoelectric layer Pole.

Preferably, the step of forming first contact and the described second contact includes：After the piezoelectric layer is formed, Form the first through hole and the second through hole that at least one wiring layer is reached from the piezoelectric layer upper surface；It is logical described first The 3rd insulating barrier is formed in the side wall of hole and second through hole；Conductive layer is formed in the piezoelectric layer surface so that described to lead Electric layer fills the first through hole and second through hole；And the conductive layer pattern is formed into first contact and institute State the second contact.

Preferably, the second electrode is formed by the conductive layer pattern, and is contacted and be connected to each other with described second.

Preferably, the step of forming first contact and the described second contact includes：Before the piezoelectric layer is formed, Form the first through hole that at least one wiring layer is reached from the second insulating barrier upper surface；In the side of the first through hole The 3rd insulating barrier is formed on wall；The first conductive layer is formed on second insulating barrier so that first conductive layer fills institute State first through hole；And first conductive layer pattern chemical conversion described first is contacted；After the piezoelectric layer is formed, formed The second through hole of at least one wiring layer is reached from the piezoelectric layer upper surface；Formed in the side wall of second through hole 4th insulating barrier；The second conductive layer is formed on the piezoelectric layer so that second conductive layer fills second through hole；With And second conductive layer pattern chemical conversion described second is contacted.

Preferably, the first electrode is formed by first conductive layer pattern, and is contacted each other with described first Connection, the second electrode is formed by second conductive layer pattern, and is contacted and be connected to each other with described second.

Preferably, the cmos circuit includes at least one transistor, and the piezoelectric layer is via the first electrode, described Second electrode, first contact, second contact and at least one wiring layer are connected at least one crystal Pipe.

Preferably, the piezoelectric layer is by selected from aluminium nitride, segregation PVF, segregation PVF-trifluoro-ethylene, lead zirconate titanate Any one composition in piezoelectric ceramics, lithium niobate piezoelectric ceramics.

Preferably, between form second insulating barrier the step of and the step of forming the piezoelectric layer, in addition to： Seed Layer is formed on second insulating barrier, wherein, the piezoelectric layer and the Seed Layer are respectively aluminium nitride.

Preferably, substantially 0.1 micron to 0.8 micron of the lateral dimension of second opening.

Preferably, the sacrifice layer is made up of silica.

Preferably, the step of forming cavity includes using vapor phase etchant, wherein the etching gas used is HF.

Preferably, the mask layer and the stop-layer are made up of corrosion resistant material respectively.

Preferably, the corrosion resistant material includes any one in tantalum, gold, aluminium nitride, aluminum oxide and non-crystalline silicon.

According to another aspect of the present utility model, there is provided a kind of ultrasonic fingerprint sensor, including：Cmos circuit；And At least one ultrasonic transducer, wherein, the cmos circuit is connected with least one ultrasonic transducer, for driving Detection signal caused by least one ultrasonic transducer and processing at least one ultrasonic transducer, wherein, institute Stating at least one ultrasonic transducer includes：Template layer, the template layer include the first opening；Stop on the template layer Only layer, the stop-layer conformally cover the template layer, so as to be formed and the described first corresponding cavity of opening；Positioned at described Mask layer on stop-layer, the mask layer include extending to the second opening of the cavity from surface；And covered positioned at described Laminated piezoelectric in mold layer, wherein, the stop-layer and the mask layer surround the cavity jointly.

Preferably, in addition to：The first insulating barrier below the template layer.

Preferably, first opening penetrates the template layer.

Preferably, in addition to：Sealant on the mask layer, sealant closing second opening.

Preferably, in addition to the second insulating barrier on the mask layer.

Preferably, the second insulating barrier closing second opening.

Preferably, the laminated piezoelectric includes：First electrode, piezoelectric layer and the second electrode of stacking, wherein, described first Electrode and the second electrode contact the lower surface and upper surface of the piezoelectric layer respectively.

Preferably, in addition to：Seed Layer between second insulating barrier and the piezoelectric layer, wherein, the pressure Electric layer and the Seed Layer are respectively aluminium nitride.

Preferably, the template layer is by selected from metal, semiconductor, non-crystalline silicon, silica and any material of silicon nitride Composition.

Preferably, in addition to：Connected with the first electrode and provide the first of external connection and contacted；And with described Two electrodes connect and provide the second contact of external connection.

Preferably, the first electrode contacts with described first and is formed and be connected to each other by identical conductive layer patternization.

Preferably, the second electrode contacts with described second and is formed and be connected to each other by identical conductive layer patternization.

Preferably, the cmos circuit includes substrate and at least one transistor formed on substrate.

Preferably, the cmos circuit also includes multiple wiring layers at least one transistor and multiple layers Between dielectric layer, the multiple wiring layer is separated into multiple different aspects by the multiple interlayer dielectric layer.

Preferably, the piezoelectric layer is via the first electrode, the second electrode, first contact, described second Contact and at least one wiring layer are connected at least one transistor.

Preferably, at least one ultrasonic transducer also includes：Described in being reached from the piezoelectric layer upper surface at least The first through hole and the second through hole of one wiring layer；And in the first through hole and the side wall of second through hole Three insulating barriers, wherein, first contact and the described second contact are prolonged via the first through hole and second through hole respectively Extend at least one wiring layer.

Preferably, at least one ultrasonic transducer also includes：Described in being reached from the piezoelectric layer lower surface at least The first through hole of one wiring layer；The second through hole of at least one wiring layer is reached from the piezoelectric layer upper surface；It is located at The 3rd insulating barrier in the side wall of the first through hole, the 4th insulating barrier in the side wall of second through hole, wherein, institute State the first contact and it is described second contact extended to respectively via the first through hole and second through hole it is described at least one Wiring layer.

Preferably, in addition to：Passivation layer on the cmos circuit.

Preferably, at least one ultrasonic transducer forms array.

According to the ultrasonic fingerprint sensor of the utility model embodiment, ultrasonic transducer is stacked on cmos circuit, Different tube cores need not be thus connected using eutectic bonding, thus reduces manufacturing cost and improves yield rate.In this method In, cavity is formed using template layer and stop-layer, can not only reduce the difficulty of cavity formation, and can more accurately be limited Determine the size of cavity.

In a preferred embodiment, template layer, stop-layer, sacrifice layer and mask layer are sequentially formed, then, is lost using gas phase Carve and remove sacrifice layer to form cavity.First in template layer is open for the positions and dimensions for limiting cavity, so as to essence Really control the lateral dimension and longitudinal size of cavity.This method can provide structural support above cavity, for further Make piezoelectric layer.Compared with wet etching, the vapor phase etchant technique avoids the submergence of solution, has dry method, wet processing concurrently Two-fold advantage.Vapor phase etchant can avoid moisture or etch products from residuing in cavity, further improve ultrasonic transducer Acoustical behavior.

In a further preferred embodiment, sacrifice layer is made up of silica, the etching gas used in vapor phase etchant For HF.Etch products are SiF₄And water, both at gaseous state, easily discharged from cavity.With using XeF₂As the normal of etchant Rule technology is compared, and not only cost is low for the etch process, and pollution-free, can further reduce etch products residual.

In a further preferred embodiment, template layer is formed on the first insulating barrier, the material of the two is different so that the One opening can penetrate template layer and stop at the top of the first insulating barrier.Therefore, can be with by the thickness of Control architecture layer Accurately control the longitudinal size of cavity.In patterned template layer, mask can be utilized to accurately control the horizontal chi of cavity It is very little.The material of the template layer can select any material different from the first insulating barrier corrosion resistance, such as metal, so as to subtract Small stress, unnecessary stress is avoided to the adverse effect of the piezoelectric layer subsequently formed, the parameter of maintenance ultrasonic fingerprint sensor Uniformity.

The features such as ultrasonic fingerprint transducer sensitivity of this method manufacture is high, it is small to be affected by the external environment, high speed, simultaneously Manufacturing cost is significantly reduced again and improves processing compatibility.

Brief description of the drawings

By the description to the utility model embodiment referring to the drawings, of the present utility model above-mentioned and other mesh , feature and advantage will be apparent from, in the accompanying drawings：

Fig. 1 shows the flow chart of the ultrasonic fingerprint sensor manufacturing process according to the utility model first embodiment；

Fig. 2 shows to form the flow chart of ultrasonic transducer in the method shown in Fig. 1；

Fig. 3 a-3l show each rank in the ultrasonic fingerprint sensor manufacturing process according to the utility model first embodiment The schematic sectional view of section；

Fig. 4 shows the schematic cross-section of the ultrasonic fingerprint sensor according to the utility model second embodiment；

Fig. 5 shows the schematic cross-section of the ultrasonic fingerprint sensor according to the utility model 3rd embodiment；

Fig. 6 shows the schematic cross-section of the ultrasonic fingerprint sensor according to the utility model fourth embodiment；

Fig. 7 shows the schematic cross-section of the ultrasonic fingerprint sensor according to the embodiment of the utility model the 5th；

Fig. 8 shows the operation principle schematic diagram of ultrasonic fingerprint sensor.

Embodiment

The utility model is more fully described hereinafter with reference to accompanying drawing.In various figures, identical element is using similar Reference represent.For the sake of clarity, the various pieces in accompanying drawing are not necessarily to scale.Furthermore, it is possible to it is not shown Some known parts.

It describe hereinafter many specific details of the present utility model, such as the structure of device, material, size, place Science and engineering skill and technology, to be more clearly understood that the utility model.But just as the skilled person will understand, The utility model can not be realized according to these specific details.

The utility model can be presented in a variety of manners, some of examples explained below.

Fig. 1 shows the flow chart of the ultrasonic fingerprint sensor manufacturing process according to the utility model first embodiment.Should Method includes forming the cmos circuit and ultrasonic transducer of stacking, the active area of cmos circuit and the piezoelectricity of ultrasonic transducer It is spaced apart between lamination using insulating barrier.

In step slo, the cmos circuit for signal processing circuit is formed on substrate.The cmos circuit is included at least One transistor, multiple wiring layers and multiple interlayer dielectric layers.The transistor include the source region that is formed in the substrate and drain region, The gate-dielectric and grid conductor formed on substrate.The multiple wiring layer is separated into more by the multiple interlayer dielectric layer Individual different aspect.For example, the first wiring layer in the multiple wiring layer is used for source region and the drain region for connecting the transistor At least one, the second wiring layer is used to connect ultrasonic transducer.First wiring layer and the second wiring layer are situated between via through interlayer The conductive channel of matter layer is connected to each other.

In step S20, ultrasonic transducer is formed on cmos circuit.The ultrasonic transducer includes using template The cavity that layer, stop-layer, sacrifice layer and mask layer are formed, and the laminated piezoelectric formed on mask layer.Laminated piezoelectric is for example First electrode and second electrode including piezoelectric layer and on its apparent surface.The active area and ultrasonic waves of cmos circuit It can be spaced apart between the laminated piezoelectric of device using insulating barrier.

The ultrasonic fingerprint sensor for example also includes leading to from reach at least one wiring layer from piezoelectric layer respectively first Hole and the second through hole, and the first contact extended at least partially in first through hole and at least a portion are in the second through hole Second contact of extension.The first electrode and second electrode of ultrasonic transducer respectively via first contact and second contact and Transistor in cmos circuit is connected.

In the method, the cmos circuit and ultrasonic transducer of stacking are formed in same tube core, thus need not be adopted Different tube cores is connected with eutectic bonding, thus reduces manufacturing cost and improves yield rate.In same tube core, CMOS Circuit is electrically connected to each other with ultrasonic transducer, and the cmos circuit is used to drive the ultrasonic transducer and handles the ultrasound Detection signal caused by wave transducer, thus reading speed can be improved.

Fig. 2 shows to form the flow chart of ultrasonic transducer in the method shown in Fig. 1.Step shown in Fig. 1 is described below Each step in rapid S20.

In the step s 21, template layer is formed.

In step S22, the first opening is formed in template layer.

In step S23, stop-layer is formed on the template layer, the stop-layer conformally covers the template layer.

In step s 24, sacrifice layer, sacrifice layer filling first opening are formed on the stop-layer.

In step s 25, mask layer is formed on the stop-layer and the sacrifice layer, the mask layer covering is described sacrificial Domestic animal layer.

In step S26, the second opening for reaching the sacrifice layer is formed on the mask layer.

In step s 27, vapor phase etchant is carried out via the described second opening, cavity is formed so as to remove the sacrifice layer. The stop-layer and the mask layer surround the cavity jointly.

In step S28, laminated piezoelectric is formed on the mask layer.Laminated piezoelectric for example including piezoelectric layer and is located at First electrode and second electrode on its apparent surface.

In the method, template layer, stop-layer, sacrifice layer and mask layer are sequentially formed, then, is removed using vapor phase etchant Sacrifice layer is to form cavity.First in template layer is open for the positions and dimensions for limiting cavity, so as to accurately control The lateral dimension and longitudinal size of cavity processed.This method can provide structural support above cavity, for further making pressure Electric layer.Compared with wet etching, vapor phase etchant technique avoids the submergence of solution, has dry method, the two-fold advantage of wet processing concurrently. Vapor phase etchant can avoid moisture or etch products from residuing in cavity, further improve the acoustical behavior of ultrasonic transducer. The features such as ultrasonic fingerprint transducer sensitivity of this method manufacture is high, it is small to be affected by the external environment, high speed, while notable drop again Low manufacturing cost and improvement processing compatibility.

In alternate embodiments, if template layer has corrosion resistance, for example, the sacrifice layer is made up of silica, it is described Template layer is made up of non-crystalline silicon, then can save the step S23 to form stop-layer.In step s 24, the direct shape on template layer Into sacrifice layer, the opening of sacrifice layer filling first.In step s 25, formed and covered on the template layer and the sacrifice layer Mold layer, the mask layer cover the sacrifice layer.Then, step S26 and S28 are continued.In step s 27, in vapor phase etchant, It is stop-layer that template layer, which doubles as,.

Fig. 3 a-3l show each stage in the ultrasonic fingerprint sensor manufacturing process according to the utility model embodiment Schematic sectional view.Each step shown in Fig. 1 and 2 is described in detail below in conjunction with Fig. 3 a-3l.

In step slo, the cmos circuit 110 for signal processing circuit is formed.Show in fig. 3 a the step it Schematic structure afterwards.

The step forms the cmos circuit 110 for signal processing circuit.The cmos circuit is for example including at least a portion Form multiple transistors in the substrate 101, and the first interlayer dielectric layer stacked gradually above the multiple transistor 106th, the first wiring layer 107, the second interlayer dielectric layer 108 and the second wiring layer 109.As an example, shown only in Fig. 3 a One P-type transistor and only one N-type transistor.N-type well region 102 is formed in P type substrate 101.Then, in N-type well region The source/drain region 103 of P-type transistor is formed in 102.The source/drain region 104 of N-type transistor is formed in P type substrate 101.In p-type The gate-dielectric 111 and grid conductor 105 stacked gradually is formed on substrate 101 and N-type well region 102.In P-type transistor, Separated between grid conductor 105 and N-type well region 102 by gate-dielectric 111, grid conductor 105 is between adjacent source/drain region Extend laterally so that N-type well region 102 is located at a part for the lower section of grid conductor 105 as channel region.In N-type transistor, grid Separated between pole conductor 105 and P type substrate 101 by gate-dielectric 111, grid conductor 105 is horizontal between adjacent source/drain region To extension so that P type substrate 101 is located at a part for the lower section of grid conductor 105 as channel region.The source/drain region of P-type transistor 103 and the source/drain region 104 of N-type transistor and grid conductor 105 can be via conductive channel and the first wiring layer 107 and Any one electrical connection in two wiring layers 109.

In alternate embodiments, the transistor in cmos circuit 110 is not limited to two, but can include at least one Transistor, the interlayer dielectric layer in cmos circuit 110 can include at least one interlayer dielectric layer not only in two, Wiring layer in cmos circuit 110 is not limited to two, but can include at least one wiring layer.

Technique for forming cmos circuit 110 is known, be will not be described in detail herein.

In step S20, ultrasonic transducer 120 is formed on cmos circuit 110.Step is shown in Fig. 3 b-3l S20 more detailed step.

In the step s 21, such as by deposition, insulating barrier 121 and template layer are sequentially formed on interlayer dielectric layer 108 122.Insulating barrier 121 selected from any material of silica, silicon nitride for example by forming.Template layer 122 is for example by selected from amorphous Silicon, silica and silicon nitride it is any material composition, for example with plasma enhanced chemical vapor deposition (PE-CVD) shape Into.E.g., about 0.2 micron to 5 microns of the thickness of template layer 122.

In step S22, using including gluing, exposed and developed photoetching process, photoresist mask is formed.Via photoetching Glue mask is etched, and template layer 122 is patterned, so as to form opening 151 in template layer 122, as shown in Figure 3 b.The erosion It for example can be the wet etching process for using etching solution to carve, or the dry method etch technology carried out in the reactor chamber, example Such as plasma etching.After the etching, photoresist mask is removed by dissolving or being ashed in a solvent.

Insulating barrier 121 and template layer 122 are made up of different materials, for example, insulating barrier 121 is made up of silica, template Layer 122 is made up of non-crystalline silicon, and so as to be formed in the template layer in the technique of opening 151, insulating barrier 121 can be used as etching Stop-layer.A part of surface of the exposure insulating barrier 121 of opening 151.

In step S23, such as by depositing, conformal stop-layer 123 is formed on insulating barrier 121 and template layer 122, As shown in Figure 3 c.Stop-layer 123 is made up of corrosion resistant material, such as by the metal material selected from tantalum or gold or selected from aluminium nitride, oxygen Change the nonmetallic materials composition of aluminium and non-crystalline silicon.The thickness of stop-layer 123 is, for example, 0.1 micron to 1 micron.Due to stop-layer 123 is consistent with the shape on surface, therefore after stop-layer 123 is formed, the stop-layer 123 still surrounds opening 151.In the work In skill, the surface configuration of stop-layer 123 is consistent with the surface configuration of template layer 122, is formed and opening 151 1 in stop-layer 123 The opening of cause, thus pattern of the template layer 122 for limiting stop-layer 123.

In step s 24, such as by deposition, sacrifice layer 124 is formed on stop-layer 123, as shown in Figure 3 d.Sacrifice layer 124 are for example made up of silica, for example with plasma enhanced chemical vapor deposition (PE-CVD) formation.Sacrifice layer 124 Thickness is, for example, 1 micron to 5 microns, so as to fill the opening 151 formed in stop-layer 123.Using chemical machinery plane Change (CMP) smooth part for removing sacrifice layer 124 so that the part that only sacrifice layer 124 is located inside opening 151 retains, And obtain smooth body structure surface.

In step s 25, such as by deposition, mask layer 125 is formed on stop-layer 123 and sacrifice layer 124.Mask layer 125 are made up of corrosion resistant material, such as by the metal material selected from tantalum or gold or the non-gold selected from aluminium nitride, aluminum oxide and non-crystalline silicon Belong to material composition.The thickness of mask layer 125 is, for example, 0.2 micron to 0.3 micron.

In step S26, using above-mentioned photoetching process and etch process, mask layer 125 is patterned to comprising opening 152 mask pattern, as shown in Figure 3 e.Substantially 0.1 micron to 0.8 micron of the lateral dimension of opening 152.The opening 152 will As etchant into passage and the passing away of etch products.

In step s 27, sacrifice layer 124 is further etched via the opening 152 of mask layer 125, as illustrated in figure 3f.Utilize The selectivity of etchant so that the surface for being etched in mask layer 125 and stop-layer 123 stops, so as to remove sacrifice layer 124, cavity 153 is formed in stop-layer 123.Opening 152 communicates with each other with cavity 153.

Preferably, cavity 153 is formed using different etch process patterned mask layers 125 and in insulating barrier 121. For example, using wet etching process in patterned mask layer 125, vapor phase etchant technique is used when forming cavity 153.It is preferred that Ground, sacrifice layer 124 are made up of silica, and stop-layer 123 and mask layer 125 are made up of non-crystalline silicon, then are adopted when forming cavity 153 Etchant is gas HF.

Chemical reaction in the vapor phase etchant is：SiO₂+ HF=SiF₄+H₂O.Etch products are SiF₄And water, both at Gaseous state, easily discharged from cavity.

Even if opening 152 is small-sized, etchant can also reach sacrifice layer 124, etch products via opening 152 It can be discharged via opening 152.Therefore, 152 size of being open there is no and be limited by etch process.Due to each to same The etching characteristic of property, can form large-sized cavity 153 via opening 152.

In step s 27, the step shown in Fig. 3 g to 3l is further performed, laminated piezoelectric is formed on mask layer 125.

As shown in figure 3g, such as by deposition, insulating barrier 126 is formed on mask layer 125.Insulating barrier 126 is for example by selecting A kind of composition in autoxidation silicon and silicon nitride.Preferably, insulating barrier 126 is made up of silica, is increased for example with plasma Extensive chemical vapour deposition (PE-CVD) formation.Insulating barrier 126 is located at the top of mask layer 125, closes the opening in mask layer 125 152 so that cavity 153 is also closing.In a kind of alternative embodiment, if there is Seed Layer, then Seed Layer can be made For insulating barrier.In another alternative embodiment, additional sealant can be used to replace the closing opening of insulating barrier 126.Should Sealant can be made up of any materials, such as non-crystalline silicon or metal.

Preferably, according to the size of the deposition characteristics of insulating barrier 126 selection opening 152 so that insulating barrier 126 is in opening 152 top can continuously extend.In this embodiment, 152 diameter of being open is about 0.1 micron to 0.8 micron so that insulation Layer 126 can close opening 152, and the inside of non-entry cavity 153.Select to insulate according to the acoustic characteristic of ultrasonic transducer The thickness of layer 126.In this embodiment, the thickness of insulating barrier 126 is, for example, 0.2 micron to 2 microns.If insulating barrier 126 Thickness is excessive, then can carry out etch-back after deposition with reduce thickness.

Further, as illustrated in figure 3h, such as by deposition, first electrode 132 and pressure are sequentially formed on insulating barrier 126 Electric layer 133.Technique for forming piezoelectric layer 133 is, for example, reactive sputter-deposition, for forming the technique example of first electrode 132 Conventional ion sputters in this way.First electrode 132 is for example made up of Mo, and thickness is about 0.2 micron to 1 micron.Piezoelectric layer 133 is for example It is made up of aluminium nitride, thickness is about 0.5 micron to 2 microns.

Preferably, if piezoelectric layer 133 is made up of aluminium nitride, before first electrode 132 is formed, such as by depositing, Seed Layer 131 is formed on insulating barrier 126.Technique for forming Seed Layer 131 is, for example, reactive sputtering.Seed Layer 131 Such as it is made up of aluminium nitride, thickness is about 0.1 micron to 0.5 micron.

In alternate embodiments, piezoelectric layer 133 is by selected from aluminium nitride, segregation PVF (PVDF), segregation PVF-three Any one group in PVF (PVDF-TrFE), lead zirconate titanate (PZT) piezoelectric ceramics, lithium niobate (LiNbO3) piezoelectric ceramics Into.

Further, as shown in figure 3i, using above-mentioned photoetching process and etch process, formed and reach the second wiring layer 109 through hole 154.The through hole 154 sequentially passes through piezoelectric layer 133, first electrode 132, Seed Layer 131, insulating barrier from top to bottom 126th, mask layer 125, sacrifice layer 124 and insulating barrier 121.Utilize the selectivity of etchant so that be etched in the second wiring layer 109 Surface stop.

Further, as shown in Fig. 3 j, such as by deposition, formed altogether in the surface of piezoelectric layer 133 and through hole 154 The insulating barrier 134 of shape, then, the portion on the surface of piezoelectric layer 133 is located at using anisotropic dry etching removal insulating barrier 134 Point, and positioned at the part of the bottom of through hole 154.So that insulating barrier 134 covers the inwall of through hole 154, and it is attached in through hole 154 The surface of near piezoelectric layer 133 extends laterally a part.The insulating barrier 134 is used as lining so that by the conduction of formation in through hole Isolate between passage and piezoelectric layer 133 and first electrode 132.

Further, as shown in figure 3k, the second electrode 135 with the upper surface of piezoelectric layer 133 is formed, and is passed through Piezoelectric layer reaches the first contact 136 of first electrode 132, and contacts 137 with the second of the connection of second electrode 135.First connects Touch 136 and second contact 137 be spaced apart.The step can use same conductive layer to form second electrode 135, first and contact 136 and second contact 137.For example, using above-mentioned photoetching process and etch process, formation penetrates piezoelectric layer and reaches first electrode 132 through hole.Then, the conductive layer of filling through hole is formed by depositing conductive material, the conductive layer is not only filled with through piezoelectricity The through hole of layer 133, and the through hole 154 that cmos circuit is reached from piezoelectric layer is filled at least in part.Using above-mentioned photoetching Technique and etch process, by the contact 136 of conductive layer pattern chemical conversion second electrode 135, first and the second contact 137.Second electrode 135th, the first contact 136 and the second contact 137 are made up of any conductor material, for example, the metal selected from one of Au, Ag and Al.

Alternatively, the step of patterned conductive layer can use and peel off (Lift-off) technique, wherein, forming conductive layer Before, photoresist mask is formed using photoetching process, after conductive layer is formed, removes and lead while photoresist mask is removed The part of electric layer, so as to by conductive layer pattern.

First contact 136 is connected to the first electrode positioned at the lower section of piezoelectric layer 133 via the through hole through piezoelectric layer 133 132, and it is connected to the second wiring layer 109 via the through hole 154 being previously formed.Second contact 137 is connected to second electrode 135, and it is connected to the second wiring layer 109 via the through hole 154 being previously formed.Further, the second wiring layer 109 can connect Connect and be connected to the first wiring layer 107 via conductive channel, and then be connected to the active area of cmos circuit 110.In this embodiment, Conductive material in through hole 154 forms conductive channel.Therefore, two of the piezoelectric layer 133 in ultrasonic transducer it is relative Surface, it is utilized respectively the first contact 136 and second and contacts 137 cmos circuits 110 being connected to below ultrasonic transducer.

Further, as shown in Fig. 3 l, such as by deposition, passivation layer 138 is formed to cover second electrode 135, first The contact of contact 136, second 137 and piezoelectric layer 133, so as to complete ultrasonic fingerprint sensor 100.

In the method for the embodiment, vapor phase etchant sacrifice layer is used to form cavity, can not only be reduced cavity and be formed Difficulty, and can more accurately limit the size of cavity.Further, this method can provide structure above cavity Support, for further making piezoelectric layer.Compared with wet etching, the vapor phase etchant technique avoids the submergence of solution, has concurrently Dry method, the two-fold advantage of wet processing.Vapor phase etchant can avoid moisture or etch products from residuing in cavity, further improve The acoustical behavior of ultrasonic transducer.The ultrasonic fingerprint transducer sensitivity of this method manufacture is high, it is small to be affected by the external environment, The features such as high speed, while manufacturing cost is significantly reduced again.In a preferred embodiment, using gas HF as etchant.With adopting Use XeF₂Routine techniques as etchant is compared, and not only cost is low for the etch process, and pollution-free, can further reduce Etch products remain.

Further, the shape and size of cavity ultimately formed are determined according to the design parameter of ultrasonic transducer.It is logical The thickness of Control architecture layer is crossed, the longitudinal size of cavity can be accurately controlled.In patterned template layer, mask can be utilized Accurately control the lateral dimension of cavity.The material of the template layer can select any material different from the first insulating barrier corrosion resistance Material, such as metal, so as to reduce stress, and unnecessary stress is avoided to the adverse effect of the piezoelectric layer subsequently formed, Maintain the parameter consistency of ultrasonic fingerprint sensor.

Fig. 4 shows the schematic cross-section of the ultrasonic fingerprint sensor 100 according to the utility model second embodiment.This is super Sound wave fingerprint sensor 100 is formed for example with the above-mentioned manufacture method according to first embodiment.The ultrasonic fingerprint sensor 100 include the cmos circuit 110 and ultrasonic transducer 120 of stacking.

The cmos circuit 110 includes the multiple transistors of at least a portion formation in the substrate 101, and the multiple The multiple wiring layers and multiple interlayer dielectric layers stacked gradually above transistor.As an example, show only one P in Fig. 4 Transistor npn npn and only one N-type transistor, the first interlayer dielectric layer 106, the first wiring layer 107, the second interlayer dielectric layer 108 With the second wiring layer 109.N-type well region 102 is formed in P type substrate 101.Then, P-type transistor is formed in N-type well region 102 Source/drain region 103.The source/drain region 104 of N-type transistor is formed in P type substrate 101.In P type substrate 101 and N-type well region 102 It is upper to form the gate-dielectric 111 and grid conductor 105 stacked gradually.In P-type transistor, grid conductor 105 and N-type well region Separated between 102 by gate-dielectric 111, grid conductor 105 extends laterally between adjacent source/drain region so that N-type well region 102 part below grid conductor 105 is as channel region.In N-type transistor, grid conductor 105 and P type substrate Separated between 101 by gate-dielectric 111, grid conductor 105 extends laterally between adjacent source/drain region so that P type substrate 101 part below grid conductor 105 is as channel region.The source/drain region 103 of P-type transistor and N-type transistor Source/drain region 104 and grid conductor 105 can be via appointing in conductive channel and the first wiring layer 107 and the second wiring layer 109 One electrical connection.

The ultrasonic transducer 120 includes the insulating barrier 121, template layer 122, stopping being located on the cmos circuit 110 Layer 123, mask layer 125 and insulating barrier 126, and the laminated piezoelectric on mask layer 125.Template layer 122 is located at insulating barrier The template layer 122 is conformally covered on 121 and including the first opening, the stop-layer 123, so as in the described first opening Middle formation cavity 153.First in template layer 122 is open for the positions and dimensions for limiting cavity, so as to accurately control The lateral dimension and longitudinal size of cavity processed.Mask layer 125 includes the second opening 152, and second opening 152 is used in cavity There is provided in 153 forming process etchant into passage and the passing away of etch products.In a preferred embodiment, Substantially 0.1 micron to 0.8 micron of the lateral dimension of two openings 152.The stop-layer 123 and mask layer 125 are jointly around sky Chamber 153.Insulating barrier 126 is located on cavity 153.The opening 152 of the closing of insulating barrier 126 second, and the piezo stack to subsequently form Layer provides mechanical support effect.

The laminated piezoelectric of the ultrasonic transducer 120 includes the Seed Layer 131, first electrode 132, piezoelectric layer stacked gradually 133 and second electrode 135.In an alternative embodiment, if forming Seed Layer 131, the envelope of Seed Layer 131 can be used The second opening 152 closed in mask layer 125, so as to save insulating barrier 126.In another alternative embodiment, it can cover The sealant formed in mold layer 125 with close in mask layer 125 second opening 152, then formed insulating barrier 126, so as to To improve the intensity of mechanical support.

Further, ultrasonic fingerprint sensor 100 also includes being used for cmos circuit 110 and ultrasonic transducer 120 The first contact 136 being electrically connected to each other and the second contact 137.Same conductive layer can be used to form second electrode 135, first The contact 137 of contact 136 and second.First contact 136 is connected under piezoelectric layer 133 via the through hole through piezoelectric layer 133 The first electrode 132 of side, and it is connected to the second wiring layer via the through hole that the second wiring layer 109 is reached from piezoelectric layer 133 109.Second contact 137 is connected to second electrode 135, and via the through hole that the second wiring layer 109 is reached from piezoelectric layer 133 154 are connected to the second wiring layer 109.The side wall of the through hole 154 could be formed with insulating barrier 134 and be used as lining so that first connects Touch 136 and second contact 137 be dielectrically separated from the remainder of laminated piezoelectric.Further, the second wiring layer 109 can connect The first wiring layer 107 is connected to via conductive channel, and then is connected to the active area of cmos circuit 110.In this embodiment, position Conductive material in through hole 154 forms conductive channel.Therefore, two of the piezoelectric layer 133 in ultrasonic transducer relative tables Face, it is utilized respectively the first contact 136 and second and contacts 137 cmos circuits 110 being connected to below ultrasonic transducer.

In this embodiment, ultrasonic fingerprint sensor 100 is included in the ultrasonic transducer stacked on cmos circuit 110 120, it is spaced apart by insulating barrier 121 therebetween.Therefore, the ultrasonic fingerprint sensor 100 need not be connected using eutectic bonding Different tube cores is connect, thus reduces manufacturing cost and improves yield rate.In ultrasonic transducer 120, template layer is utilized Cavity is formed with stop-layer, can not only reduce the difficulty of cavity formation, and can more accurately limit the size of cavity.

Fig. 5 shows the schematic cross-section of the ultrasonic fingerprint sensor 200 according to the utility model 3rd embodiment.This is super Sound wave fingerprint sensor 200 includes the cmos circuit 110 and ultrasonic transducer 220 stacked.

Cmos circuit 110 in the ultrasonic fingerprint sensor 200 of 3rd embodiment with according to second embodiment Cmos circuit 110 in ultrasonic fingerprint sensor 100 is identical, will not be described in detail herein.The difference of the two is only described below Place.

The ultrasonic transducer 220 includes template layer 122, stop-layer 123, mask on the cmos circuit 110 Layer 125 and insulating barrier 126, and the laminated piezoelectric on mask layer 125.Template layer 122 is located at the interlayer of cmos circuit 110 The template layer 122 is conformally covered on dielectric layer and including the first opening, the stop-layer 123, so as to described first Cavity 153 is formed in opening.First in template layer 122 is open for the positions and dimensions for limiting cavity, so as to accurate Ground controls the lateral dimension and longitudinal size of cavity.Mask layer 125 includes the second opening 152, and second opening 152 is used in sky There is provided in the forming process of chamber 153 etchant into passage and the passing away of etch products.In a preferred embodiment, Substantially 0.1 micron to 0.8 micron of the lateral dimension of second opening 152.The stop-layer 123 and mask layer 125 surround jointly Cavity 153.Insulating barrier 126 is located on cavity 153.The opening 152 of the closing of insulating barrier 126 second, and the piezoelectricity to subsequently form Lamination provides mechanical support effect.

The laminated piezoelectric of the ultrasonic transducer 220 includes the Seed Layer 131, first electrode 132, piezoelectric layer stacked gradually 133 and second electrode 135.In an alternative embodiment, if forming Seed Layer 131, the envelope of Seed Layer 131 can be used The second opening 152 closed in mask layer 125, so as to save insulating barrier 126.In another alternative embodiment, it can cover The sealant formed in mold layer 125 with close in mask layer 125 second opening 152, then formed insulating barrier 126, so as to To improve the intensity of mechanical support.

Further, ultrasonic fingerprint sensor 200 also includes being used for cmos circuit 110 and ultrasonic transducer 220 The first contact 136 being electrically connected to each other and the second contact 137.Same conductive layer can be used to form second electrode 135, first The contact 137 of contact 136 and second.First contact 136 is connected under piezoelectric layer 133 via the through hole through piezoelectric layer 133 The first electrode 132 of side, and it is connected to the second wiring layer via the through hole 154 that the second wiring layer 109 is reached from piezoelectric layer 133 109.Second contact 137 is connected to second electrode 135, and via the through hole that the second wiring layer 109 is reached from piezoelectric layer 133 154 are connected to the second wiring layer 109.The side wall of the through hole 154 could be formed with insulating barrier 134 and be used as lining so that first connects Touch 136 and second contact 137 be dielectrically separated from the remainder of laminated piezoelectric.Further, the second wiring layer 109 can connect The first wiring layer 107 is connected to via conductive channel, and then is connected to the active area of cmos circuit 110.In this embodiment, position Conductive material in through hole 154 forms conductive channel.Therefore, two of the piezoelectric layer 133 in ultrasonic transducer relative tables Face, it is utilized respectively the first contact 136 and second and contacts 137 cmos circuits 110 being connected to below ultrasonic transducer.

In this embodiment, ultrasonic fingerprint sensor 200 is included in the ultrasonic transducer stacked on cmos circuit 110 220, any one in the second interlayer dielectric layer 108 of cmos circuit 110, stop-layer 123, insulating barrier 126 and Seed Layer 131 can Formed with insulating materials, and as the insulating barrier for being used to cmos circuit 110 and ultrasonic transducer 220 being spaced apart.With Compared according to the ultrasonic fingerprint sensor 100 of second embodiment, can according to the ultrasonic fingerprint sensor 200 of 3rd embodiment Further to reduce the quantity of insulating barrier, so as to reduce device volume and reduce manufacturing cost.

Fig. 6 shows the schematic cross-section of the ultrasonic fingerprint sensor 300 according to the utility model fourth embodiment.This is super Sound wave fingerprint sensor 300 includes the cmos circuit 110 and ultrasonic transducer 320 stacked.

Cmos circuit 110 in the ultrasonic fingerprint sensor 300 of fourth embodiment with according to second embodiment Cmos circuit 110 in ultrasonic fingerprint sensor 100 is identical, will not be described in detail herein.The difference of the two is only described below Place.

The ultrasonic transducer 320 includes the insulating barrier 121, template layer 122, stopping being located on the cmos circuit 110 Layer 123, mask layer 125 and insulating barrier 126, and the laminated piezoelectric on mask layer 125.Template layer 122 is located at insulating barrier The template layer 122 is conformally covered on 121 and including the first opening, the stop-layer 123, so as in the described first opening Middle formation cavity 153.First in template layer 122 is open for the positions and dimensions for limiting cavity, so as to accurately control The lateral dimension and longitudinal size of cavity processed.Mask layer 125 includes the second opening 152, and second opening 152 is used in cavity There is provided in 153 forming process etchant into passage and the passing away of etch products.In a preferred embodiment, Substantially 0.1 micron to 0.8 micron of the lateral dimension of two openings 152.The stop-layer 123 and mask layer 125 are jointly around sky Chamber 153.Insulating barrier 126 is located on cavity 153.The opening 152 of the closing of insulating barrier 126 second, and the piezo stack to subsequently form Layer provides mechanical support effect.

The laminated piezoelectric of the ultrasonic transducer 320 includes the Seed Layer 131, first electrode 132, piezoelectric layer stacked gradually 133 and second electrode 135.In an alternative embodiment, if forming Seed Layer 131, the envelope of Seed Layer 131 can be used The second opening 152 closed in mask layer 125, so as to save insulating barrier 126.In another alternative embodiment, it can cover The sealant formed in mold layer 125 with close in mask layer 125 second opening 152, then formed insulating barrier 126, so as to To improve the intensity of mechanical support.

Further, ultrasonic fingerprint sensor 300 also includes being used for cmos circuit 110 and ultrasonic transducer 320 The first contact 136 being electrically connected to each other and the second contact 137.Same conductive layer can be used to form first electrode 132 and the One contact 136, and same conductive layer form the contact of second electrode 135 and second 137.First contact 136 and first electrode 132 are connected to each other, and the second wiring is connected to via the first through hole that the second wiring layer 109 is reached from the lower surface of piezoelectric layer 133 Layer 109.Second contact 137 is connected to each other with second electrode 135, and reaches the second cloth via from the upper surface of piezoelectric layer 133 Second through hole of line layer 109 is connected to the second wiring layer 109.First through hole and the side wall of the second through hole could be formed with insulating barrier 134 are used as lining so that the first contact 136 and the second contact 137 and the remainder of laminated piezoelectric are dielectrically separated from.First contact 136 can further fill first through hole positioned at the side wall and bottom, piezoelectric layer 133 of first through hole.Further, the second wiring Layer 109 can connect is connected to the first wiring layer 107 via conductive channel, and then is connected to the active area of cmos circuit 110. In the embodiment, the conductive material in through hole forms conductive channel.Therefore, piezoelectric layer 133 in ultrasonic transducer Two apparent surfaces, it is utilized respectively the first contact 136 and second and contacts 137 CMOS being connected to below ultrasonic transducer Circuit 110.

In this embodiment, ultrasonic fingerprint sensor 300 is included in the ultrasonic transducer stacked on cmos circuit 110 320, it is spaced apart by insulating barrier 121 therebetween.First contact 136 extends to the second wiring from the lower surface of piezoelectric layer 133 Layer 109, the second contact 137 extend to the second wiring layer 109 from the upper surface of piezoelectric layer 133.With surpassing according to second embodiment Sound wave fingerprint sensor 100 is compared, according to the first of the ultrasonic fingerprint sensor 300 of fourth embodiment the contact 133 positioned at pressure The lower surface of electric layer 133, thus through hole need not be formed on piezoelectric layer 133.The ultrasonic fingerprint sensor 300 can maintain The integrality and mechanical strength of piezoelectric layer 133, so as to further improve the reliability of ultrasonic transducer, and improve ultrasonic wave The acoustical behavior of transducer.

Fig. 7 shows the schematic cross-section of the ultrasonic fingerprint sensor 400 according to the embodiment of the utility model the 5th.This is super Sound wave fingerprint sensor 400 includes the cmos circuit 110 and ultrasonic transducer 420 stacked.

Cmos circuit 110 in the ultrasonic fingerprint sensor 400 of the 5th embodiment with according to second embodiment Cmos circuit 110 in ultrasonic fingerprint sensor 100 is identical, will not be described in detail herein.The difference of the two is only described below Place.

The ultrasonic transducer 420 includes the insulating barrier 121, template layer 122, stopping being located on the cmos circuit 110 Layer 123, mask layer 125 and insulating barrier 126, and the laminated piezoelectric on mask layer 125.Template layer 122 is located at insulating barrier The template layer 122 is conformally covered on 121 and including the first opening, the stop-layer 123, so as in the described first opening Middle formation cavity 153.First in template layer 122 is open for the positions and dimensions for limiting cavity, so as to accurately control The lateral dimension and longitudinal size of cavity processed.Mask layer 125 includes the second opening 152, and second opening 152 is used in cavity There is provided in 153 forming process etchant into passage and the passing away of etch products.In a preferred embodiment, Substantially 0.1 micron to 0.8 micron of the lateral dimension of two openings 152.The stop-layer 123 and mask layer 125 are jointly around sky Chamber 153.Insulating barrier 126 is located on cavity 153.The opening 152 of the closing of insulating barrier 126 second, and the piezo stack to subsequently form Layer provides mechanical support effect.

The laminated piezoelectric of the ultrasonic transducer 420 includes the Seed Layer 131, first electrode 132, piezoelectric layer stacked gradually 133 and second electrode 135.In an alternative embodiment, if forming Seed Layer 131, the envelope of Seed Layer 131 can be used The second opening 152 closed in mask layer 125, so as to save insulating barrier 126.In another alternative embodiment, it can cover The sealant formed in mold layer 125 with close in mask layer 125 second opening 152, then formed insulating barrier 126, so as to To improve the intensity of mechanical support.

Further, ultrasonic fingerprint sensor 400 also includes being used for cmos circuit 110 and ultrasonic transducer 420 The first contact 136 being electrically connected to each other and the second contact 137.Same conductive layer can be used to form first electrode 132 and the One contact 136, and same conductive layer form the contact of second electrode 135 and second 137.First contact 136 and first electrode 132 are connected to each other, and the second wiring is connected to via the first through hole that the second wiring layer 109 is reached from the lower surface of piezoelectric layer 133 Layer 109.Second contact 137 is connected to each other with second electrode 135, and reaches the first cloth via from the upper surface of piezoelectric layer 133 Second through hole of line layer 107 is connected to the first wiring layer 107.First through hole and the side wall of the second through hole could be formed with insulating barrier 134 are used as lining so that the first contact 136 and the second contact 137 and the remainder of laminated piezoelectric are dielectrically separated from.First contact 136 can further fill first through hole positioned at the side wall and bottom, piezoelectric layer 133 of first through hole.Further, the first wiring The wiring layer 109 of layer 107 and second can be connected to the active area of cmos circuit 110.In this embodiment, leading in through hole Electric material forms conductive channel.Therefore, two apparent surfaces of the piezoelectric layer 133 in ultrasonic transducer, are utilized respectively first The contact 137 of contact 136 and second is connected to the cmos circuit 110 below ultrasonic transducer.

In this embodiment, ultrasonic fingerprint sensor 400 is included in the ultrasonic transducer stacked on cmos circuit 110 420, it is spaced apart by insulating barrier 121 therebetween.First contact 136 extends to the second wiring from the lower surface of piezoelectric layer 133 Layer 109, the second contact 137 extend to the first wiring layer 107 from the upper surface of piezoelectric layer 133.With surpassing according to second embodiment Sound wave fingerprint sensor 100 is compared, according to the first of the ultrasonic fingerprint sensor 400 of the 5th embodiment the contact 133 positioned at pressure The lower surface of electric layer 133, thus through hole need not be formed on piezoelectric layer 133.The ultrasonic fingerprint sensor 400 can maintain The integrality and mechanical strength of piezoelectric layer 133, so as to further improve the reliability of ultrasonic transducer, and improve ultrasonic wave The acoustical behavior of transducer.Further, ultrasonic transducer 420 the first contact 136 and the second contact 137 can directly connect The wiring layer of different aspects is connected to, so as to avoid the rewiring in wiring layer from producing dead resistance and parasitic capacitance, is further carried The response speed of praetersonic transducer.

Fig. 8 shows the operation principle schematic diagram of ultrasonic fingerprint sensor.According to fingerprint sensor bag of the present utility model Include the cmos circuit 210 and ultrasonic transducer 220 being connected to each other.Preferably, ultrasonic transducer 220 includes multiple ultrasonic waves The M N array that transducer unit 240 forms, wherein, M and N are respectively natural number.Multiple cmos circuits 210 form signal transacting Circuit, ultrasonic transducer unit 240 are stacked on the top of cmos circuit 210.

The stage is produced in ultrasonic wave, signal processing circuit provides pulse electrical signal, makes the piezoelectricity in ultrasonic transducer 220 Inverse piezoelectric effect occurs for layer, and high frequency machinery deformation produces ultrasonic signal.The stage is received in ultrasonic wave, because ultrasonic wave runs into difference Sound-resistance material, ultrasonic signal have a different reflectivity, and different convex, recessed figures causes ultrasonic transducer receiving in fingerprint To different ultrasonic signals, stronger direct piezoelectric effect occurs in ultrasonic reflection cavity region.Signal processing circuit is according to electric signal The ultrasonic signal that ultrasonic transducer 220 feeds back is handled, reads the fingerprint signal of formation.

The array of multiple ultrasonic transducer units 240 composition in ultrasonic transducer 220 is only shown in fig. 8. The ultrasonic transducer unit 240 by direct piezoelectric effect produce ultrasonic wave, ultrasonic wave vertically advance use " ↑ " symbol expression, surpass Sound reflecting meets expression with " ↓ ".In the convex domain of the finger part of people, ultrasonic wave can largely pass through human skin tissue, quilt Human skin tissue absorbs；In the concave region of finger, ultrasonic wave is largely reflected, and is returned inside ultrasonic transducer, production Raw direct piezoelectric effect.The difference of signal, identification identification finger print information are received by fingerprint sensor array.

In terms of the manufacturing, the ultrasonic fingerprint sensor manufacturing process is compatible with CMOS technology, can be produced in CMOS Line is directly processed.In terms of ultrasonic transducer subsequent applications, application neck of the ultrasonic fingerprint sensor in subsequent movement terminal Domain can penetrate the media such as glass and directly apply, reduce follow-up application cost without the perforate on the media such as glass.In terminal Application aspect, compared with capacitive fingerprint sensing device, the ultrasonic signal of ultrasonic fingerprint sensor is influenceed by greasy dirt, sweat etc. It is small, small, the high accuracy for examination of identification is influenceed with humidity by temperature.

It should be noted that herein, such as first and second or the like relational terms are used merely to a reality Body or operation make a distinction with another entity or operation, and not necessarily require or imply and deposited between these entities or operation In any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant are intended to Nonexcludability includes, so that process, method, article or equipment including a series of elements not only will including those Element, but also the other element including being not expressly set out, or it is this process, method, article or equipment also to include Intrinsic key element.In the absence of more restrictions, the key element limited by sentence "including a ...", it is not excluded that Other identical element also be present in process, method, article or equipment including the key element.

According to embodiment of the present utility model as described above, these embodiments do not have all details of detailed descriptionthe, Also it is only described specific embodiment not limit the utility model.Obviously, as described above, many modification and change can be made Change.This specification is chosen and specifically describes these embodiments, is to preferably explain that principle of the present utility model and reality should With so that skilled artisan can repairing using the utility model and on the basis of the utility model well Change use.The utility model is only limited by claims and its four corner and equivalent.

Claims

A kind of 1. ultrasonic fingerprint sensor, it is characterised in that including：

Cmos circuit；And

At least one ultrasonic transducer,

Wherein, the cmos circuit is connected with least one ultrasonic transducer, for driving at least one ultrasound Detection signal caused by wave transducer and processing at least one ultrasonic transducer,

Wherein, at least one ultrasonic transducer includes：

Template layer, the template layer include the first opening；

Stop-layer on the template layer, the stop-layer conformally cover the template layer, so as to be formed and described Cavity corresponding to one opening；

Mask layer on the stop-layer, the mask layer include extending at least one the second of the cavity from surface Opening；And

Laminated piezoelectric on the mask layer,

Wherein, the stop-layer and the mask layer surround the cavity jointly.
2. ultrasonic fingerprint sensor according to claim 1, it is characterised in that also include：Under the template layer First insulating barrier of side.
3. ultrasonic fingerprint sensor according to claim 1, it is characterised in that first opening penetrates the template Layer.
4. ultrasonic fingerprint sensor according to claim 1, it is characterised in that also include：On the mask layer Sealant, sealant closing at least one second opening.
5. the ultrasonic fingerprint sensor according to any one of claim 2 to 4, in addition on the mask layer Second insulating barrier.
6. ultrasonic fingerprint sensor according to claim 5, it is characterised in that described in the second insulating barrier closing extremely Few one second opening.
7. ultrasonic fingerprint sensor according to claim 5, it is characterised in that the laminated piezoelectric includes：Stack First electrode, piezoelectric layer and second electrode, wherein, the first electrode and the second electrode contact the piezoelectric layer respectively Lower surface and upper surface.
8. ultrasonic fingerprint sensor according to claim 7, it is characterised in that the piezoelectric layer by selected from aluminium nitride, Any one group in segregation PVF, segregation PVF-trifluoro-ethylene, lead titanate piezoelectric ceramics, lithium niobate piezoelectric ceramics Into.
9. ultrasonic fingerprint sensor according to claim 8, it is characterised in that also include：

Seed Layer between second insulating barrier and the piezoelectric layer,

Wherein, the piezoelectric layer and the Seed Layer are respectively aluminium nitride.
10. ultrasonic fingerprint sensor according to claim 1, it is characterised in that at least one second opening Lateral dimension is 0.1 micron to 0.8 micron.
11. ultrasonic fingerprint sensor according to claim 1, it is characterised in that the template layer is by selected from metal, half Conductor, non-crystalline silicon, silica and silicon nitride it is any material composition.
12. ultrasonic fingerprint sensor according to claim 1, it is characterised in that the mask layer and the stop-layer It is made up of respectively corrosion resistant material.
13. ultrasonic fingerprint sensor according to claim 12, it is characterised in that the corrosion resistant material includes being selected from Any one in tantalum, gold, aluminium nitride, aluminum oxide and non-crystalline silicon.
14. ultrasonic fingerprint sensor according to claim 7, it is characterised in that also include：

Connected with the first electrode and provide the first of external connection and contacted；And

Connected with the second electrode and provide the second of external connection and contacted.
15. ultrasonic fingerprint sensor according to claim 14, it is characterised in that described first contacts from the piezoelectricity The upper surface of layer reaches the first electrode through the piezoelectric layer.
16. ultrasonic fingerprint sensor according to claim 14, it is characterised in that the first electrode and described first Contact is formed and is connected to each other by identical conductive layer patternization.
17. ultrasonic fingerprint sensor according to claim 14, it is characterised in that the second electrode and described second Contact is formed and is connected to each other by identical conductive layer patternization.
18. ultrasonic fingerprint sensor according to claim 14, it is characterised in that the cmos circuit include substrate and At least one transistor formed on substrate.
19. ultrasonic fingerprint sensor according to claim 18, it is characterised in that the cmos circuit also includes being located at Multiple wiring layers and multiple interlayer dielectric layers at least one transistor, the multiple wiring layer is by the multiple interlayer Dielectric layer is separated into multiple different aspects.
20. ultrasonic fingerprint sensor according to claim 19, it is characterised in that the piezoelectric layer is via described One electrode, the second electrode, first contact, second contact and at least one wiring layer be connected to it is described extremely A few transistor.
21. ultrasonic fingerprint sensor according to claim 20, it is characterised in that at least one ultrasonic wave transducer Device also includes：

The first through hole and the second through hole of at least one wiring layer are reached from the piezoelectric layer upper surface；And

The 3rd insulating barrier in the first through hole and the side wall of second through hole,

Wherein, first contact and the described second contact extend to institute via the first through hole and second through hole respectively State at least one wiring layer.
22. ultrasonic fingerprint sensor according to claim 20, it is characterised in that at least one ultrasonic wave transducer Device also includes：

The first through hole of at least one wiring layer is reached from the piezoelectric layer lower surface；

The second through hole of at least one wiring layer is reached from the piezoelectric layer upper surface；

The 3rd insulating barrier in the side wall of the first through hole,

The 4th insulating barrier in the side wall of second through hole,

Wherein, first contact and the described second contact extend to institute via the first through hole and second through hole respectively State at least one wiring layer.
23. ultrasonic fingerprint sensor according to claim 7, it is characterised in that also include：Positioned at the cmos circuit On passivation layer.
24. ultrasonic fingerprint sensor according to claim 7, it is characterised in that at least one ultrasonic wave transducer Device forms array.