CN206452392U - PCM signal test system inside a kind of emitter - Google Patents
PCM signal test system inside a kind of emitter Download PDFInfo
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- CN206452392U CN206452392U CN201621299714.8U CN201621299714U CN206452392U CN 206452392 U CN206452392 U CN 206452392U CN 201621299714 U CN201621299714 U CN 201621299714U CN 206452392 U CN206452392 U CN 206452392U
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Abstract
PCM signal test system inside a kind of emitter that the utility model is provided;Including external switch control unit, transmitter unit, the utility model circuit is simple, only needs to additionally increase by 4 resistance inside emitter, and external testing cable only needs to 2 either-or switch and the utility model can be achieved.Emitter itself provides PCM test signal forms using internal, function signal generator is saved during test, remove the complicated setting of function signal generator from, testing crew, which can be prevented effectively from, adds wrong signal to cause test data mistake or the risk brought to product, not only lowering apparatus cost of use, simultaneously using after this method, the emitter of the program is taken to test very convenient in field trial.
Description
Technical field
The present invention relates to PCM signal test system inside a kind of emitter.
Background technology
Indicator transmitter needs externally fed and applies PCM signal when testing, PCM signal often uses function signal generator
Simulation, exports " the 01010101 ... " code and length " 0 " of rule, long " 1 " signal, and this is heavy for aptitude test emitter modulation index
Want index.And all experiments of emitter are required to function signal generator and simulate PCM codes for it, make product normal work.So
One, which carrys out transmitter test, takes that the function signal generator time is very long, and especially temperature cycles and seasoned experiment believe function
The abrasion of number generator is larger.Emitter is in field testing or investigation problem, and function signal generator shortage causes work to be difficult
Carry out.Every kind of model emitter needs the PCM signal code check applied and signal amplitude to differ substantially simultaneously, and range of code rates exists
409.6kbps to 10Mbps, signal amplitude has 0~3.3V, 0~5V, ± 2.5V, RS422 level etc., for testing crew requirement
It is higher, if the PCM signal of function signal generator simulation sets mistake, product work can be made abnormal, can also be damaged when serious
Product.
Solve the problems, such as that indicator transmitter test relies on function signal generator, it is necessary to adopt an effective measure in this context,
Make product test convenient, reduction testing crew signal adds wrong probability, takes the function signal generator testing time less as far as possible, very
To independent of function signal generator.Product draws control under conditions of original function and interface is not influenceed by testing mouth
Line, makes the PCM signal of confession product needs inside emitter be used for test.
The content of the invention
In order to solve the above technical problems, the invention provides PCM signal test system inside a kind of emitter.
The present invention is achieved by the following technical programs.
PCM signal test system inside a kind of emitter that the present invention is provided;Including switch control unit, emitter list
Member, pull-up protective resistance network, control scanning element, PCM gating units, the signal that the transmitter unit includes being sequentially connected is defeated
Go out on unit, the PCM gating units to be also associated with the synchronous receiving units of PCM and simulation PCM signal generation unit, the switch
Control unit is by testing mouth and pull-up protective resistance network connection, and it is defeated that the synchronous receiving units of the PCM are additionally provided with exterior PC M
Incoming interface.
The switch control unit is provided with KZ1 and KZ2 double switch signals, connects between test mouth and scan control unit
It is connected to two paths of signals.Protective resistance R3, R4 is provided with two paths of signals and power supply is connected to by pull-up resistor R1 and R2
VCC。
The synchronous receiving units of the PCM, control scanning element, simulation PCM signal generation unit, PCM gating units composition
FPGA。
The beneficial effects of the present invention are:Circuit is simple, only needs to additionally increase by 4 resistance inside emitter, outside
Test cable only needs to 2 either-or switch and the present invention can be achieved.Emitter itself provides PCM test signal shapes using internal
Formula, saves function signal generator during test, remove the complicated setting of function signal generator from, can be prevented effectively from testing crew and add
Wrong signal causes test data mistake or the risk brought to product, not only lowering apparatus cost of use, while using this method
Afterwards, the emitter of the program is taken to test very convenient in field trial.
Brief description of the drawings
Fig. 1 is the structural representation of the present invention;
Fig. 2 is present invention confession PCM test signal design principle block diagrams;
Embodiment
Be described further below technical scheme, but claimed scope be not limited to it is described.
PCM signal test system inside a kind of emitter;Including switch control unit, transmitter unit, the transmitting list
Member includes pull-up protective resistance network, control scanning element, PCM gating units, the signal output unit being sequentially connected, described
The synchronous receiving units of PCM and simulation PCM signal generation unit are also associated with PCM gating units, the switch control unit leads to
Test mouth and pull-up protective resistance network connection are crossed, the synchronous receiving units of the PCM are additionally provided with exterior PC M input interfaces.
The switch control unit is provided with KZ1 and KZ2 double switch signals, connects between test mouth and scan control unit
It is connected to two paths of signals.Protective resistance R3, R4 is provided with two paths of signals and power supply is connected to by pull-up resistor R1 and R2
VCC。
The synchronous receiving units of the PCM, control scanning element, simulation PCM signal generation unit, PCM gating units composition
FPGA。
Such as Fig. 1, a kind of emitter confesses the design of PCM test signals, including switch control unit 1, test mouth 2, pull-up
And the synchronous receiving unit 5 of protective resistance network 3, exterior PC M input interfaces 4, PCM, control scanning element 6, simulation PCM signal production
Raw unit 7, PCM gating units 8, modulation variable-frequency filtering amplifier section 9 etc..Wherein, switch control unit 1, test mouth 2, pull-up
And protective resistance network 3 is sequentially connected, PCM synchronizations receiving unit 5, control scanning element 6, simulation PCM signal generation unit 7,
PCM gating units 8 belong to FPGA software sections, and modulation variable-frequency filtering amplifier section 9 belongs to transmitter signal processing hardware components.
3 wires are externally drawn in described product test mouthful 2, wherein 1 is ground, 2 are connected to for control signal wire in addition
FPGA, and VCC is pulled to by pull-up resistor R1 and R2, for protection FPGA, the outer output end of control pair add protective resistance R3 and
R4。
By being programmed to FPGA, FPGA obtains reference clock frequency dividing to simulate PCM signal, and the control moment of scanning element 6 exists
The control signal level of scanning switch control unit 1, according to 2 control signal level states, is exported not by PCM gating units 8
Same PCM signal, control signal level state gating PCM signal state table is as shown in Table 1.
The controlling switch of table one gates PCM signal state table
As shown in Table 1, normal operating conditions or test cable when the test cable of emitter is not connected with emitter task
When 2 switches are not closed after connection, KZ1 and KZ2 control signals are high level, after the outside PCM signal of FPGA gatings enters
Level modulating unit;When KZ1 and KZ2 switches are closed, KZ1 and KZ2 control signals are the PCM productions inside low level, FPGA
Raw unit output " 0101010101 ... " code check enters rear class modulating unit for f Ω PCM signal, and now emitter is output as
Centre frequency f0;When KZ1 switchs closure and KZ2 switches are opened, KZ1 control signals are low level, and KZ2 control signals are high electricity
Flat, long " 0 " signal of PCM generation units output inside FPGA enters rear class modulating unit, and now emitter is output as frequency fL;
When KZ1 switchs opening and KZ2 switch closures, KZ1 control signals are high level, and KZ2 control signals are inside low level, FPGA
Long " 1 " signal of PCM generation units output enter rear class modulating unit, now emitter is output as frequency fH.The tune of emitter
Exponent m f processed can be calculated by below equation and obtained:
Modulated exponent m fL:
Upper modulation index m fH:
Such as Fig. 2, described resistor network is pull-up and protective resistance inside emitter, and switch controlling signal is connected to
In FPGA.
The present invention enables emitter by switching control, and emitter itself provides simulation PCM signal and tested, when tearing open
During the test cable of lower emitter, emitter receives outside PCM signal, performs normal tasks.
Claims (3)
1. PCM signal test system inside a kind of emitter, it is characterised in that:Including switch control unit, transmitter unit, institute
State pull-up protective resistance network, scan control unit, PCM gating units, signal output list that transmitter unit includes being sequentially connected
The synchronous receiving units of PCM and simulation PCM signal generation unit, the switch control are also associated with member, the PCM gating units
Unit is additionally provided with exterior PC M inputs and connect by testing mouth and pull-up protective resistance network connection, the synchronous receiving units of the PCM
Mouthful.
2. PCM signal test system inside emitter as claimed in claim 1, it is characterised in that:The switch control unit
KZ1 and KZ2 double switch signals are provided with, are connected between test mouth and scan control unit on two paths of signals, two paths of signals
It is provided with protective resistance R3, R4 and power supply VCC is connected to by pull-up resistor R1 and R2.
3. PCM signal test system inside emitter as claimed in claim 1, it is characterised in that:The PCM synchronously receives single
Member, scan control unit, simulation PCM signal generation unit, PCM gating units composition FPGA.
Priority Applications (1)
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CN201621299714.8U CN206452392U (en) | 2016-11-30 | 2016-11-30 | PCM signal test system inside a kind of emitter |
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CN201621299714.8U CN206452392U (en) | 2016-11-30 | 2016-11-30 | PCM signal test system inside a kind of emitter |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110225211A (en) * | 2019-05-07 | 2019-09-10 | 武汉船舶通信研究所(中国船舶重工集团公司第七二二研究所) | Multichannel pulse modified modulating voice exchange system and method |
-
2016
- 2016-11-30 CN CN201621299714.8U patent/CN206452392U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110225211A (en) * | 2019-05-07 | 2019-09-10 | 武汉船舶通信研究所(中国船舶重工集团公司第七二二研究所) | Multichannel pulse modified modulating voice exchange system and method |
CN110225211B (en) * | 2019-05-07 | 2021-02-26 | 武汉船舶通信研究所(中国船舶重工集团公司第七二二研究所) | Multichannel pulse code modulation voice exchange system and method |
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