CN206389365U - A kind of multi-tap is non-to wait work(point Full-Duplex Analog self-interference cancellation element - Google Patents
A kind of multi-tap is non-to wait work(point Full-Duplex Analog self-interference cancellation element Download PDFInfo
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Abstract
The utility model waits work(point Full-Duplex Analog self-interference cancellation element there is provided a kind of multi-tap is non-, and described device includes：Non- constant power power splitter, RF switch, vector modulator, combiner, the transmission signal received is divided into by power different transmission signal in N roads by non-constant power power splitter, RF switch control signal by whether, multilevel vector modulator by the transmission signal of RF switch to carrying out I/Q Vector Modulations, realize the regulation of signal amplitude and phase, make transmission signal and self-interference signal constant amplitude after coupling work(point anti-phase, integrated finally by combiner, it is superimposed with self-interference signal, realizes the elimination of self-interference signal.More preferably high-power coupled signal can be adjusted for self-interference cancellation element of the present utility model, improve elimination performance, cost is lower, be more easy to algorithm control；It is compared to single-stage vector modulator performance more preferable, it is to avoid input power limitation.
Description
Technical Field
The utility model belongs to wireless communication full duplex system field, concretely relates to full duplex simulation self-interference remove device is divided to unequal merit of taking a percentage more.
Background
Increasing data traffic demands are driving communication networks to increase their rates, and for the rate of communication networks, spectral efficiency is particularly important. A conventional Half Duplex (HD) wireless communication system transmits and receives signals through different time slots or frequency bands, so that the spectral efficiency is greatly reduced. Researchers have therefore proposed Full Duplex (FD) wireless communication techniques with simultaneous common frequencies. Simultaneous co-frequency full duplex wireless communication enables simultaneous transmission and reception of signals on a single (time/frequency) channel, avoiding the use of two independent channels for bi-directional end-to-end transmission as in half duplex. This theoretically improves spectral efficiency and achieves twice the throughput. But current technology does not achieve theoretically twice the throughput. Since the simultaneous co-frequency full-duplex model always suffers from Self-Interference (SI) signal Interference under practical circumstances, a series of problems are generated. Therefore, it is agreed by both academia and industry that suppression and cancellation of self-interference signals is key to the implementation of an underlying full-duplex communication system.
Self-interference cancellation is divided into analog cancellation and digital cancellation. Analog cancellation by designing the radio frequency circuit and programming the dynamic tuning algorithm control circuit, the transmit noise can be cancelled to the thermal noise level and both linear and non-linear distortions are reduced. The remaining distortion can be further removed by digital cancellation.
At present, an analog domain radio frequency elimination circuit mostly adopts an equal-power divider, coupling signal power is divided into a plurality of paths of multi-tap cancellation signals with equal power, and self-interference signals with different powers cannot be reasonably fitted. Thus, some attenuators are made to be dummy and not to function; and also overload some attenuators, greatly affecting cancellation performance.
In the prior art, for the cancellation module, an attenuator plus phase shifter combination or a single vector modulator is mostly used to perform fading and phase shifting of signals. The scheme of the multi-tap attenuator and the phase shifter has high cost, the phase shifter is expensive, a plurality of I/O ports are needed when the attenuator and the phase shifter are controlled, the design area is increased, the I/O ports of a chip are wasted, and the algorithm design is not easy. The technical scheme of adopting a vector modulator has poor elimination performance and input power limitation.
Meanwhile, the traditional signal control module adopts a low-speed DAC, the signal acquisition module adopts a low-speed ADC, and the convergence speed of an analog elimination algorithm is directly limited in hardware.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a technical problem that solve is to the defect among the suppression of self-interference signal and the remove device among the prior art, provides a take a percentage not isopower merit more and divides full duplex simulation self-interference remove device, divides the transmitted signal of coupling into the unequal four-way signal of power by the power merit of non-isopower, and the different coupling signal of taking a percentage adoption different power can make the vector modulator eliminate better.
According to the utility model discloses an aspect provides a take a percentage more and divide full duplex simulation self-interference remove device such as unequal merit, the device includes: the power divider comprises a non-equal power divider, a radio frequency switch, a vector modulator and a combiner; the power divider comprises a plurality of unequal power dividers, a plurality of radio frequency switches, a plurality of vector modulators and a combiner, wherein the number of the unequal power dividers is one;
the unequal power divider is used for dividing the received transmitting signals into N paths of transmitting signals with different powers and is connected with the N radio frequency switches;
the radio frequency switch is connected with the vector modulator and used for transmitting the transmitting signal to the vector modulator connected with the radio frequency switch through the divided transmitting signal with corresponding power;
the vector modulators are connected with the combiner and used for carrying out I/Q vector modulation on the transmitting signals passing through the radio frequency switch, so that the amplitude and the phase of the signals are adjusted, and the transmitting signals after coupling power division and self-interference signals are in equal amplitude and opposite phase;
the combiner is used for integrating a plurality of tap signals from all the vector modulators connected with the combiner, and the tap signals are superposed with the self-interference signals to achieve elimination of the self-interference signals.
Preferably, in the above scheme, the number of the radio frequency switches is four, and the number of the vector modulators is six;
the unequal power divider is used for dividing the received transmitting signals into four paths of transmitting signals with different powers, transmitting the two paths of transmitting signals with higher power to the vector modulator through the first radio frequency switch and the second radio frequency switch, and transmitting the two paths of transmitting signals with lower power to the vector modulator through the third radio frequency switch and the fourth radio frequency switch;
the first radio frequency switch and the second radio frequency switch are respectively connected with the two vector modulators in sequence to form a two-stage vector modulator; the third radio frequency switch and the fourth radio frequency switch are respectively connected with a vector modulator;
in the vector modulator, a two-stage vector modulator connected with the first radio frequency switch and a two-stage vector modulator connected with the second radio frequency switch are respectively a high input power vector modulator and a low input power vector modulator;
the two low-input-power vector modulators and the vector modulators connected with the third and fourth radio frequency switches are connected with the combiner;
the combiner is used for receiving four paths of signals of the four vector modulators connected with the combiner, and the four paths of signals are superposed with the self-interference signals to achieve elimination of the self-interference signals.
Preferably, in the above scheme, the two paths of transmission signals with higher power are used for eliminating transmission signals leaked by the circulator and reflected by the antenna; the two paths of transmitting signals with lower power are used for eliminating multipath self-interference signals in a wireless channel.
Preferably, in the above scheme, the apparatus further includes a circulator, and the circulator is configured to separate the transmitting end and the receiving end, so that the transmission and the reception of the signal are implemented at one antenna.
The utility model discloses following beneficial effect has:
first, the use of different taps with different power coupled signals allows the vector modulator to perform better cancellation than conventional radio frequency cancellation modules.
Second, a two-stage vector modulator is used, including a high input power vector modulator and a low input power vector modulator. The high-power coupling signal can be better adjusted, and the elimination performance is improved. Compared with a phase shifter attenuator, the attenuator has simpler structure, lower cost and easier algorithm control; compared with a single-stage vector modulator, the performance is better, and the input power limitation is avoided.
Thirdly, compared with the traditional low-speed control and power detection circuit, the convergence time is greatly shortened by adopting a high-speed chip.
Drawings
Fig. 1 is a schematic structural view of a multi-tap unequal power division full-duplex simulation self-interference cancellation device according to a first embodiment of the present invention;
fig. 2 is a schematic structural view of a multi-tap unequal power division full-duplex simulation self-interference cancellation device according to a second embodiment of the present invention;
fig. 3 is a schematic diagram of an application architecture of a self-interference cancellation apparatus according to a second embodiment of the present invention;
fig. 4 is a timing diagram illustrating an operation of a self-interference cancellation apparatus according to a second embodiment of the present invention.
Detailed Description
With reference to the exemplary embodiments, technical problems, aspects, and advantages of the present invention will be clarified. However, the present invention is not limited to the exemplary embodiments disclosed below; it can be implemented in different forms. The nature of the description is merely to assist those skilled in the relevant art in a comprehensive understanding of the specific details of the invention.
The utility model aims at the elimination problem of the full duplex self-interference signal in the prior art, and mainly solves the problem that the self-interference signals with different powers are difficult to accurately match due to the equal-power division coupling signal of the current multi-tap radio frequency eliminator; the problems that the scheme areas of the phase shifter and the attenuator are too large, the cost is high, the control is not easy, and the algorithm convergence time is long are solved; the problems of poor input power limitation and elimination performance of a single vector modulator are solved. And a high-speed ADC (analog-to-digital converter) and a DAC (digital-to-analog converter) circuit are adopted, and a vector modulator is matched as an amplitude phase adjusting device, so that high-speed convergence of a cancellation algorithm is realized.
The present invention will be further explained by the following specific embodiments with reference to the attached drawings.
First embodiment
Fig. 1 is a schematic structural diagram of a multi-tap unequal power division full-duplex analog self-interference cancellation device according to this embodiment. As shown in fig. 1, the present embodiment provides a multi-tap unequal power division full duplex analog self-interference cancellation apparatus, including: the power divider comprises a non-equal power divider, a radio frequency switch, a vector modulator and a combiner; the power divider comprises a plurality of unequal power dividers, a plurality of radio frequency switches, a plurality of vector modulators and a combiner, wherein the number of the unequal power dividers is one;
the unequal power divider is used for dividing the received transmitting signals into N paths of transmitting signals with different powers and is connected with the N radio frequency switches;
the radio frequency switch is connected with the vector modulator and used for transmitting the transmitting signal to the vector modulator connected with the radio frequency switch through the divided transmitting signal with corresponding power;
the vector modulators are connected with the combiner and used for carrying out I/Q vector modulation on the transmitting signals passing through the radio frequency switch, so that the amplitude and the phase of the signals are adjusted, and the transmitting signals after coupling power division and self-interference signals are in equal amplitude and opposite phase;
the combiner is used for integrating a plurality of tap signals from all the vector modulators connected with the combiner, and the tap signals are superposed with the self-interference signals to achieve elimination of the self-interference signals.
Second embodiment
Fig. 2 is a schematic structural diagram of the multi-tap unequal power division full-duplex analog self-interference cancellation device according to the embodiment. As shown in fig. 2, the multi-tap unequal power division full-duplex analog self-interference cancellation apparatus of this embodiment includes: one unequal power divider, four radio frequency switches, six vector modulators and one combiner.
The unequal power divider is connected with the four radio frequency switches, and is used for dividing the received transmitting signals into four paths of transmitting signals with different powers, transmitting the two paths of transmitting signals with higher power to the vector modulator through the first radio frequency switch and the second radio frequency switch, and transmitting the two paths of transmitting signals with lower power to the vector modulator through the third radio frequency switch and the fourth radio frequency switch.
The first radio frequency switch and the second radio frequency switch are respectively connected with the two vector modulators in sequence to form a two-stage vector modulator; the third radio frequency switch and the fourth radio frequency switch are respectively connected with a vector modulator; for passing the divided transmit signal of corresponding power and for passing the transmit signal to a vector modulator connected to the radio frequency switch.
Preferably, the two paths of transmitting signals with higher power are used for eliminating transmitting signals leaked by the circulator and reflected by the antenna; the two paths of transmitting signals with lower power are used for eliminating multipath self-interference signals in a wireless channel.
The vector modulator is used for carrying out I/Q vector modulation on the transmitting signal passing through the radio frequency switch, so that the amplitude and the phase of the signal are adjusted, and the transmitting signal after coupling power division and the self-interference signal are in equal amplitude and opposite phase.
In the vector modulator, a two-stage vector modulator connected with the first radio frequency switch and a two-stage vector modulator connected with the second radio frequency switch are respectively and sequentially a high input power vector modulator and a low input power vector modulator.
In this embodiment, a two-stage vector modulator is adopted, and the original attenuator and phase shifter are replaced by a large input power vector modulator HMC631 and a small input power vector modulator QHX 220. The manufacturing cost of the radio frequency elimination module is reduced, and the elimination algorithm design and implementation are facilitated.
In particular, the two-stage vector modulator (HMC631& QHX220) is used for signal amplitude and phase adjustment for the taps with higher power, which can be used to cancel the self-interference signals with higher power since the HMC631 does not have too low an input power limit. Such as: the circulator leaks and the antenna reflects a transmitting signal, and the multipath in the wireless channel is the main path of a self-interference signal. For the taps with lower power, the first-stage vector modulator QHX220 is adopted, which has better cancellation effect, but the input power is limited to be below-46 dBm, so the method is suitable for canceling multipath low-power signals in a wireless channel.
Here, it should be noted that the rf switch can control the input of the transmission signal to the vector modulator. Each tap contains a radio frequency switch and a vector modulator. The radio frequency switch is used for controlling the tap to be opened and closed, and the multipath influence in a wireless channel is better matched. For complex environments with more reflectors and more multipath signals, more taps work through the radio frequency switch. For an open environment, the number of working taps can be reduced, the hardware complexity is reduced, algorithm control is facilitated, and energy consumption is reduced.
The two low input power vector modulators, and the vector modulators connected with the third and fourth radio frequency switches are connected with the combiner.
The combiner is used for receiving four paths of signals of the four vector modulators connected with the combiner, and the four paths of signals are superposed with the self-interference signals to achieve elimination of the self-interference signals.
Preferably, the apparatus may further comprise a circulator for separating the transmitting end and the receiving end such that the transmission and reception of the signal are implemented at one antenna.
Fig. 3 is a schematic diagram of an application architecture of a self-interference cancellation apparatus according to a second embodiment of the present invention.
Fig. 3 is a schematic diagram of a multi-tap interference cancellation apparatus used in a full-duplex architecture. The whole framework is provided with a signal acquisition module and a signal control module besides the radio frequency elimination module. The signal acquisition module consists of a power detector, an amplifier and an ADC. The power detector collects the power values of the cancellation signal, the receiving signal and the output signal, and the power values are properly amplified by the amplifier so that the power values enter the linear working range of the ADC. And finally, the ADC converts the acquired analog value into a digital value and transmits the digital value to the FPGA. The signal control module consists of an FPGA and a DAC. The FPGA runs an analog elimination algorithm through the power values of three signals. Optimal cancellation of analog domain self-interference signals is achieved by configuring the optimal parameters into the vector modulator HMC631 through the DAC and configuring the parameters into QHX220 through the SPI bus.
Preferably, the device adopts 32MSPS DAC to control the vector modulator, and adopts 32MSPS ADC to collect the signal power. Compared with the traditional low-speed DAC and low-speed ADC, the speed of the operation of the analog elimination algorithm is improved directly from the hardware.
Fig. 4 is a timing diagram illustrating an operation of a self-interference cancellation apparatus according to a second embodiment of the present invention.
As shown in fig. 4, the working timing of the self-interference cancellation apparatus of this embodiment is divided into a training phase and a data transmission phase, and is continuously performed in a loop. And in the training stage, the FPGA runs an analog elimination algorithm, and configures parameters of the vector modulator through the power value fed back by the signal acquisition module, so that the optimal elimination of the self-interference signal is realized. And in the data transmission stage, the value of the vector modulator is kept, the on-off of the radio frequency switch is stabilized, and data transmission is carried out under the condition of eliminating self-interference signals.
As shown in fig. 4, for four taps, the number of on/off of the rf switches is controlled according to the environment complexity adjustment algorithm during the training phase. The radio frequency switch in the device is used for controlling the tap to be opened or not, then the elimination algorithm is operated from the tap with the highest power in sequence, and all the radio frequency switches are opened after all the taps are operated, so that the cancellation signals are combined.
In the data transmission stage, the antennas transmit and receive signals at the same frequency, all the configured taps in the system are in a working state, and the parameter values are kept to be the same as those in the training stage.
As can be seen from the above process, the self-interference cancellation apparatus of this embodiment has the following beneficial effects:
firstly, a non-equal power divider is adopted. The taps with unequal power can better fit self-interference signals with various powers. Including signals leaked from the circulator and reflected from the antenna, and self-interference signals in the wireless channel.
Second, a two-stage vector modulator is employed. The high input power vector modulator HMC631 avoids the low input power limitation and enhances the cancellation effect in conjunction with the two-stage vector modulator QHX 220.
Thirdly, a multi-level vector modulator is adopted to replace a phase shifter and an attenuator. The scale, the volume and the hardware cost of the circuit are greatly reduced. The control algorithm is also made more flexible.
Fourthly, a vector modulator is adopted to match with a high-speed ADC and a DAC. The convergence rate of the analog elimination algorithm is greatly improved from the aspect of hardware.
Fifthly, a radio frequency switch is adopted. The on-off of each tap is controlled, and the multipath effect can be better fitted according to the actual environment. And the hardware complexity can be reduced in an open environment, and the algorithm is convenient to realize.
Sixth, a circulator is used. The transmitting end and the receiving end are isolated, and the simultaneous same-frequency signal receiving and transmitting is realized at one antenna.
The foregoing is a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations should also be regarded as the protection scope of the present invention.
Claims (4)
1. A multi-tap unequal power division full-duplex analog self-interference cancellation device, the device comprising: one unequal power divider, a plurality of radio frequency switches, a plurality of vector modulators and one combiner; wherein,
the unequal power divider is used for dividing the received transmitting signals into N paths of transmitting signals with different powers and is connected with the N radio frequency switches;
the radio frequency switch is connected with the vector modulator and used for enabling the divided transmitting signals with corresponding power to pass through and transmitting the transmitting signals to the vector modulator connected with the radio frequency switch;
the vector modulators are connected with the combiner and used for carrying out I/Q vector modulation on the transmitting signals passing through the radio frequency switch, so that the amplitude and the phase of the signals are adjusted, and the transmitting signals after coupling power division and self-interference signals are in equal amplitude and opposite phase;
the combiner is used for integrating a plurality of tap signals from all the vector modulators connected with the combiner, and the tap signals are superposed with the self-interference signals to achieve elimination of the self-interference signals.
2. The analog self-interference cancellation apparatus according to claim 1, wherein the number of said radio frequency switches is four, and the number of vector modulators is six;
the unequal power divider is used for dividing the received transmitting signals into four paths of transmitting signals with different powers, transmitting the two paths of transmitting signals with higher power to the vector modulator through the first radio frequency switch and the second radio frequency switch, and transmitting the two paths of transmitting signals with lower power to the vector modulator through the third radio frequency switch and the fourth radio frequency switch;
the first radio frequency switch and the second radio frequency switch are respectively connected with the two vector modulators in sequence to form a two-stage vector modulator; the third radio frequency switch and the fourth radio frequency switch are respectively connected with a vector modulator;
in the vector modulator, a two-stage vector modulator connected with the first radio frequency switch and a two-stage vector modulator connected with the second radio frequency switch are respectively a high input power vector modulator and a low input power vector modulator;
the two low-input-power vector modulators and the vector modulators connected with the third and fourth radio frequency switches are connected with the combiner;
the combiner is used for receiving four paths of signals of the four vector modulators connected with the combiner, and the four paths of signals are superposed with the self-interference signals to achieve elimination of the self-interference signals.
3. The analog self-interference cancellation apparatus according to claim 2, wherein the two higher power transmit signals are used to cancel transmit signals reflected by the antenna and circulator leakage; the two paths of transmitting signals with lower power are used for eliminating multipath self-interference signals in a wireless channel.
4. The analog self-interference cancellation apparatus according to claim 1, further comprising a circulator for separating a transmitting end and a receiving end, wherein the transmitting and receiving of the signal are implemented at one antenna.
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| CN107888226A (en) * | 2017-12-28 | 2018-04-06 | 浙江中智海通信科技有限公司 | Radio communication is the same as frequency while full duplex receiver frequency domain framework and signal acceptance method |
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