CN206302185U - A kind of dual input battery charging switching circuit and intelligent electronic device - Google Patents
A kind of dual input battery charging switching circuit and intelligent electronic device Download PDFInfo
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- CN206302185U CN206302185U CN201621424482.4U CN201621424482U CN206302185U CN 206302185 U CN206302185 U CN 206302185U CN 201621424482 U CN201621424482 U CN 201621424482U CN 206302185 U CN206302185 U CN 206302185U
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- switching tube
- divider resistance
- switch pipe
- gate logic
- logic chip
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Abstract
The utility model belongs to electronics charge control technical field, more particularly to a kind of dual input battery charging switching circuit and intelligent electronic device.In the utility model embodiment, make charger insertion detection using divider resistance, detection signal is by the combinational circuit of switching tube come switched charge path, can be charged when realizing that D/C adapter and USB charger are inserted separately into, preferentially charged with USB adapter when accessing simultaneously, identical function and performance are realized with the circuitry instead integrated chip that low cost, supply of material stabilization, the convenient conventional discrete device of buying are constituted, R&D risk is overcome, the cost of material is reduced.
Description
Technical field
The utility model belongs to electronics charge control technical field, more particularly to a kind of dual input battery charging switching circuit
And intelligent electronic device.
Background technology
Universal intelligent electronic devices are charged using Micro USB ports, but cannot be connected by USB port when charging
Peripheral hardware (such as mouse, keyboard, USB flash disk).To solve this problem, each scheme business adds independent DC mouthfuls of charging one after another, while retaining
The function that Micro USB ports charge, to realize carrying out data interaction using Micro USB ports in charging.But so need
Realize the problem that DC charges and how USB charge paths coexist, switch, principal and subordinate is set.The scheme of current main flow has two kinds, and one is
Double switching controls chip (FPF3042) that come in and go out are added in traditional charging chip leading portion, one kind is cut with inherently possessing dual input
The chip solution (BQ24168) changed.
But, the intelligent electronic device for possessing double charge paths still belongs to a small number of, accordingly, it is capable to the chip selected is not conventional
Material.No matter which kind of chip is selected, and the supply of material friendship phase will be maximum risk.Other chip on the high side in itself, brings larger
Cost pressure.
Utility model content
The purpose of the utility model embodiment is that a kind of dual input battery charging switching circuit of offer and smart electronicses set
It is standby, it is intended to solve the problems, such as that present charging switching circuit has that R&D risk is high, Material Cost is high.
The utility model embodiment is achieved in that a kind of dual input battery charging switching circuit, the dual input electricity
Pond charging switching circuit includes:
Divider resistance R1, divider resistance R2, divider resistance R3, divider resistance R4, divider resistance R5, the first simple gate logic core
Piece U1, the second simple gate logic chip U2, first switch pipe, second switch pipe, the 3rd switching tube and the 4th switching tube;
The first input end A of the first simple gate logic chip U1 meets anode+VBAT by the divider resistance R1,
The divider resistance R2 and divider resistance R3 are connected between USB input+USB_IN and ground, the first simple gate logic chip U1
The second input B connect the public connecting end of the divider resistance R2 and divider resistance R3, the first simple gate logic chip U1
Power end VCC connect anode+VBAT, the first simple gate logic chip U1 ground terminal ground connection, the first simple gate logic
The output end Y of chip U1 connects the Enable Pin EN of the second simple gate logic chip U2 and the control end of the 4th switching tube, institute simultaneously
The power end VCC for stating the second simple gate logic chip U2 meets anode+VBAT, the ground terminal of the second simple gate logic chip U2
GND is grounded, and the divider resistance R4 and divider resistance R5 is connected between DC input+DC_IN and ground, the first simple gate logic
The input A of chip U2 connects the public connecting end of the divider resistance R4 and divider resistance R5, the first simple gate logic chip
The output end B of U2 connects the control end of the second switch pipe, the first termination first switch pipe of the second switch pipe
Control end, the second end ground connection of the second switch pipe, the first termination charging input+VCHG_IN of the first switch pipe, institute
State the second termination DC inputs+DC_IN of first switch pipe, the control of the first termination the 3rd switching tube of the 4th switching tube
End processed, the second end ground connection of the 4th switching tube, the first termination charging input+VCHG_IN of the 3rd switching tube is described
Second termination USB inputs+USB_IN of the 3rd switching tube.
In said structure, the first switch pipe is the first switch for the drain electrode of PMOS Q1, the PMOS Q1
The first end of pipe, the source electrode of the PMOS Q1 is the second end of the first switch pipe, and the grid of the PMOS Q1 is institute
State the control end of first switch pipe.
In said structure, the second switch pipe is the second switch for the drain electrode of NMOS tube Q2, the NMOS tube Q2
The first end of pipe, the source electrode of the NMOS tube Q2 is the second end of the second switch pipe, and the grid of the NMOS tube Q2 is institute
State the control end of second switch pipe.
In said structure, the 3rd switching tube is PMOS Q3, and the drain electrode of the PMOS Q3 is the described 3rd switch
The first end of pipe, the source electrode of the PMOS Q3 is the second end of the 3rd switching tube, and the grid of the PMOS Q3 is institute
State the control end of the 3rd switching tube.
In said structure, the 4th switching tube is NMOS tube Q4, and the drain electrode of the NMOS tube Q4 is the described 4th switch
The first end of pipe, the source electrode of the NMOS tube Q4 is the second end of the 4th switching tube, and the grid of the NMOS tube Q4 is institute
State the control end of the 4th switching tube.
The another object of the utility model embodiment is to provide a kind of intelligent electronic device, the intelligent electronic device bag
Include dual input battery charging switching circuit as described above.
In the utility model embodiment, charger insertion detection is made using divider resistance, detection signal passes through switching tube
Combinational circuit carry out switched charge path, can be charged when realizing that D/C adapter and USB charger are inserted separately into, at the same access when
Preferential USB adapter charges, with the circuitry instead collection that low cost, supply of material stabilization, the convenient conventional discrete device of buying are constituted
Identical function and performance are realized into chip, R&D risk is overcome, the cost of material is reduced.
Brief description of the drawings
Fig. 1 is the circuit structure diagram of the dual input battery charging switching circuit that the utility model embodiment is provided.
Specific embodiment
In order that the purpose of this utility model, technical scheme and advantage become more apparent, below in conjunction with accompanying drawing and implementation
Example, is further elaborated to the utility model.It should be appreciated that specific embodiment described herein is only used to explain
The utility model, is not used to limit the utility model.
Fig. 1 shows the structure of the dual input battery charging switching circuit that the utility model embodiment is provided, for the ease of
Illustrate, illustrate only the part related to the utility model embodiment.
A kind of dual input battery charging switching circuit, the dual input battery charging switching circuit includes:
Divider resistance R1, divider resistance R2, divider resistance R3, divider resistance R4, divider resistance R5, the first simple gate logic core
Piece U1, the second simple gate logic chip U2, first switch pipe 1, second switch pipe 2, the 3rd switching tube 3 and the 4th switching tube 4;
The first input end A of the first simple gate logic chip U1 meets anode+VBAT by the divider resistance R1,
The divider resistance R2 and divider resistance R3 are connected between USB input+USB_IN and ground, the first simple gate logic chip U1
The second input B connect the public connecting end of the divider resistance R2 and divider resistance R3, the first simple gate logic chip U1
Power end VCC connect anode+VBAT, the first simple gate logic chip U1 ground terminal ground connection, the first simple gate logic
The output end Y of chip U1 connects the Enable Pin EN of the second simple gate logic chip U2 and the control end of the 4th switching tube 4, institute simultaneously
The power end VCC for stating the second simple gate logic chip U2 meets anode+VBAT, the ground terminal of the second simple gate logic chip U2
GND is grounded, and the divider resistance R4 and divider resistance R5 is connected between DC input+DC_IN and ground, the first simple gate logic
The input A of chip U2 connects the public connecting end of the divider resistance R4 and divider resistance R5, the first simple gate logic chip
The output end B of U2 connects the control end of the second switch pipe 2, the first termination first switch pipe 1 of the second switch pipe 2
Control end, the second end ground connection of the second switch pipe 2, the first termination charging input+VCHG_ of the first switch pipe 1
IN, the second termination DC inputs+DC_IN of the first switch pipe 1, the first termination the described 3rd of the 4th switching tube 4 is opened
Close pipe 3 control end, the 4th switching tube 4 the second end ground connection, the 3rd switching tube 3 first termination charge input+
VCHG_IN, the second termination USB inputs+USB_IN of the 3rd switching tube 3.
Used as the embodiment of the utility model one, the first switch pipe 1 is PMOS Q1, and the drain electrode of the PMOS Q1 is
The first end of the first switch pipe 1, the source electrode of the PMOS Q1 is the second end of the first switch pipe 1, the PMOS
The grid of pipe Q1 is the control end of the first switch pipe 1.
Used as the embodiment of the utility model one, the second switch pipe 2 is NMOS tube Q2, and the drain electrode of the NMOS tube Q2 is
The first end of the second switch pipe 2, the source electrode of the NMOS tube Q2 is the second end of the second switch pipe 2, the NMOS
The grid of pipe Q2 is the control end of the second switch pipe 2.
Used as the embodiment of the utility model one, the 3rd switching tube 3 is PMOS Q3, and the drain electrode of the PMOS Q3 is
The first end of the 3rd switching tube 3, the source electrode of the PMOS Q3 is the second end of the 3rd switching tube 3, the PMOS
The grid of pipe Q3 is the control end of the 3rd switching tube 3.
Used as the embodiment of the utility model one, the 4th switching tube 4 is NMOS tube Q4, and the drain electrode of the NMOS tube Q4 is
The first end of the 4th switching tube 4, the source electrode of the NMOS tube Q4 is the second end of the 4th switching tube 4, the NMOS
The grid of pipe Q4 is the control end of the 4th switching tube 4.
1st, using divider resistance make charger insertion detection, detection signal by the combinational circuit of NMOS tube and PMOS come
Switched charge path:When charger is accessed, detection signal is high level, and high level turns on NMOS tube, NMOS tube conducting post-tensioning
The grid of low PMOS opens charging path.The purpose controlled from NMOS be initial conditions detection signal for it is low will not NMOS
Mislead, select PMOS because its relatively low Rdson on charging path, the pressure drop on so rechargeable MOS is smaller, heating
Amount is also small.
2nd, USB charging priorities judge and lock:USB chargings detection signal controls DC detection signals between control NMOS
Shut-off, when there is no USB charging detection signals, DC detection signals open DC charge paths.DC detection signals are cut off if having to arrive
Path between control NMOS, disconnects DC charge paths, and USB charging paths are also opened in addition.
The utility model embodiment also provides a kind of intelligent electronic device, and the intelligent electronic device includes as described above
Dual input battery charging switching circuit.
The intelligent electronic device includes mobile phone, panel computer etc..
In the utility model embodiment, charger insertion detection is made using divider resistance, detection signal passes through switching tube
Combinational circuit carry out switched charge path, can be charged when realizing that D/C adapter and USB charger are inserted separately into, at the same access when
Preferential USB adapter charges, with the circuitry instead collection that low cost, supply of material stabilization, the convenient conventional discrete device of buying are constituted
Identical function and performance are realized into chip, R&D risk is overcome, the cost of material is reduced.
Preferred embodiment of the present utility model is the foregoing is only, is not used to limit the utility model, it is all at this
Any modification, equivalent and improvement made within the spirit and principle of utility model etc., should be included in the utility model
Protection domain within.
Claims (6)
1. a kind of dual input battery charging switching circuit, it is characterised in that the dual input battery charging switching circuit includes:
Divider resistance R1, divider resistance R2, divider resistance R3, divider resistance R4, divider resistance R5, the first simple gate logic chip
U1, the second simple gate logic chip U2, first switch pipe, second switch pipe, the 3rd switching tube and the 4th switching tube;
The first input end A of the first simple gate logic chip U1 meets anode+VBAT by the divider resistance R1, described
Divider resistance R2 and divider resistance R3 are connected between USB input+USB_IN and ground, and the of the first simple gate logic chip U1
Two input B connect the public connecting end of the divider resistance R2 and divider resistance R3, the electricity of the first simple gate logic chip U1
Source VCC connects the ground terminal ground connection of anode+VBAT, the first simple gate logic chip U1, the first simple gate logic chip
The output end Y of U1 connects the Enable Pin EN of the second simple gate logic chip U2 and the control end of the 4th switching tube simultaneously, and described the
The power end VCC of two simple gate logic chip U2 meets anode+VBAT, and the ground terminal GND of the second simple gate logic chip U2 connects
Ground, the divider resistance R4 and divider resistance R5 is connected between DC input+DC_IN and ground, the first simple gate logic chip
The input A of U2 connects the public connecting end of the divider resistance R4 and divider resistance R5, the first simple gate logic chip U2's
Output end B connects the control end of the second switch pipe, the control of the first termination first switch pipe of the second switch pipe
End, the second end ground connection of the second switch pipe, the first termination charging input+VCHG_IN of the first switch pipe, described the
Second termination DC inputs+DC_IN of one switching tube, the control of the first termination the 3rd switching tube of the 4th switching tube
End, the second end ground connection of the 4th switching tube, the first termination charging input+VCHG_IN of the 3rd switching tube, described the
Second termination USB inputs+USB_IN of three switching tubes.
2. dual input battery charging switching circuit as claimed in claim 1, it is characterised in that the first switch pipe is PMOS
The drain electrode of pipe Q1, the PMOS Q1 is the first end of the first switch pipe, and the source electrode of the PMOS Q1 is described first
Second end of switching tube, the grid of the PMOS Q1 is the control end of the first switch pipe.
3. dual input battery charging switching circuit as claimed in claim 1, it is characterised in that the second switch pipe is NMOS
The drain electrode of pipe Q2, the NMOS tube Q2 is the first end of the second switch pipe, and the source electrode of the NMOS tube Q2 is described second
Second end of switching tube, the grid of the NMOS tube Q2 is the control end of the second switch pipe.
4. dual input battery charging switching circuit as claimed in claim 1, it is characterised in that the 3rd switching tube is PMOS
The drain electrode of pipe Q3, the PMOS Q3 is the first end of the 3rd switching tube, and the source electrode of the PMOS Q3 is the described 3rd
Second end of switching tube, the grid of the PMOS Q3 is the control end of the 3rd switching tube.
5. dual input battery charging switching circuit as claimed in claim 1, it is characterised in that the 4th switching tube is NMOS
The drain electrode of pipe Q4, the NMOS tube Q4 is the first end of the 4th switching tube, and the source electrode of the NMOS tube Q4 is the described 4th
Second end of switching tube, the grid of the NMOS tube Q4 is the control end of the 4th switching tube.
6. a kind of intelligent electronic device, it is characterised in that the intelligent electronic device is included as described in claim any one of 1-5
Dual input battery charging switching circuit.
Priority Applications (1)
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CN201621424482.4U CN206302185U (en) | 2016-12-22 | 2016-12-22 | A kind of dual input battery charging switching circuit and intelligent electronic device |
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CN201621424482.4U CN206302185U (en) | 2016-12-22 | 2016-12-22 | A kind of dual input battery charging switching circuit and intelligent electronic device |
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CN206302185U true CN206302185U (en) | 2017-07-04 |
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ID=59205906
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CN201621424482.4U Active CN206302185U (en) | 2016-12-22 | 2016-12-22 | A kind of dual input battery charging switching circuit and intelligent electronic device |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107733010A (en) * | 2017-09-30 | 2018-02-23 | 深圳市艾特智能科技有限公司 | Charging circuit |
-
2016
- 2016-12-22 CN CN201621424482.4U patent/CN206302185U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107733010A (en) * | 2017-09-30 | 2018-02-23 | 深圳市艾特智能科技有限公司 | Charging circuit |
CN107733010B (en) * | 2017-09-30 | 2020-04-21 | 深圳市艾特智能科技有限公司 | Charging circuit |
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