CN206283692U - A kind of shared digital simulation light adjusting circuit in port - Google Patents
A kind of shared digital simulation light adjusting circuit in port Download PDFInfo
- Publication number
- CN206283692U CN206283692U CN201621405534.3U CN201621405534U CN206283692U CN 206283692 U CN206283692 U CN 206283692U CN 201621405534 U CN201621405534 U CN 201621405534U CN 206283692 U CN206283692 U CN 206283692U
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- comparator
- gate
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- input
- buffer
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Abstract
The utility model discloses the digital simulation light adjusting circuit that a kind of port shares, including comparator module, buffer module, gate logic module;Wherein, comparator module includes first, second comparator A1 and A2, first comparator A1 processes digital dimming and passes through buffer module B1, B2 and electric capacity C controls the Enable Pin EN working conditions of the second comparator A2, second comparator A2 treatment simulation light modulations, dim signal after being processed through two comparators is exported by the OR gate or of gate logic module and with door and again, it is the input interface for incorporating simulation light modulation and digital dimming that the beneficial effects of the utility model are, so that an input port is while have the function of analog- and digital- light modulation, while simple structure, save chip area and packaging cost.
Description
Technical field
The utility model is related to electronic circuit technology field, especially a kind of shared digital simulation light adjusting circuit in port.
Background technology
LED power chip generally has the function of simulation light modulation and digital dimming, but LED power chip is simulated and numeral
Dimming function is usually different input ports, and different circuit modular structures is also increased while increased circuit complexity
Chip area and packaging cost.
Therefore, for LED power driving, the shared digital simulation light adjusting circuit in port can well integrate simulation
With the function of digital dimming, and it is input into by a port, so as to save chip area and packaging cost.
Utility model content
Technical problem to be solved in the utility model is:There is provided a kind of port shared digital simulation light adjusting circuit, can
To realize the function of simulation and digital dimming by an input port, to overcome the deficiencies in the prior art.
What the utility model was realized in:
A kind of shared digital simulation light adjusting circuit in port, including comparator module, buffer module, gate logic module,
Comparator module is made up of first comparator A1 and the second comparator A2, first comparator A1 in-phase input ends connection reference voltage
Vref, inverting input connection the second comparator A2 in-phase ends P and OR gate or input IN2, output end connection buffer B1
Input;Second comparator A2 in-phase input ends connect first comparator A1 reverse input ends and OR gate or input IN2, reversely
Input connects sawtooth signal Vpeak, Enable Pin EN connection buffer B2 output ends and OR gate or input IN1, output
End connection gate logic module with door and inputs;Buffer module is made up of two buffers B1, B2 and electric capacity C, wherein slow
Device B1 inputs connection first comparator A1 output ends are rushed, output end connection electric capacity C and buffer B2, the electric capacity C other ends are grounded,
Buffer B2 output ends connect the second comparator A2 EN ends and OR gate or inputs IN1;Gate logic module by OR gate or and
With door and compositions, wherein OR gate or inputs IN1 connection buffer B2 output ends, A1 is anti-for input IN2 connection first comparators
Phase input and the second comparator A2 in-phase input ends, output end connection and door and inputs IN2;It is connected with door and inputs
Second comparator A2 output ends.
In a kind of shared digital simulation light adjusting circuit in foregoing port, the second comparator A2 Enable Pins EN is high level
When, comparator normal work;When comparator A2 Enable Pins EN is low level, comparator is output as high level.
In a kind of shared digital simulation light adjusting circuit in foregoing port, first comparator A1 treatment digital dimmings are simultaneously controlled
The working condition of the second comparator A2, the second comparator A2 treatment simulation light modulations.
In a kind of shared digital simulation light adjusting circuit in foregoing port, during simulation light modulation input, comparator A1 backward ends
Input signal Vin, comparator A1 hold reference voltage Vref, and comparator A2 backward ends to be input into the peak value of sawtooth signal in the same direction
The relation of Vpeak meets:Vin < Vpeak < Vref.
In a kind of shared digital simulation light adjusting circuit in foregoing port, buffer B1 have to electric capacity C the velocity of discharge it is fast,
The slow function of charging rate.
In a kind of shared digital simulation light adjusting circuit in foregoing port, gate logic module is respectively with door and inputs
Simulation dim signal DIM_A and digital dim signal DIM_D.
In a kind of shared digital simulation light adjusting circuit in foregoing port, the second comparator A2 output ends are simulation light modulation letter
Number DIM_A, gate logic module OR gate or output ends are digital dimming signal DIM_D.
Compared with prior art, it is the input for incorporating simulation light modulation and digital dimming that the beneficial effects of the utility model are
Interface a so that input port has the function of analog- and digital- light modulation simultaneously, while simple structure, saves chip area
With packaging cost.
Brief description of the drawings
Accompanying drawing 1 is principle schematic of the present utility model;
Input voltage and output voltage graph of a relation when accompanying drawing 2 is the utility model simulation light modulation input;
Accompanying drawing 3 is input voltage and output voltage graph of a relation when the utility model digital dimming is input into.
Specific embodiment
Embodiment of the present utility model:A kind of shared digital simulation light adjusting circuit in port, as shown in drawings, including compares
Device module, buffer module, gate logic module, comparator module are made up of first comparator A1 and the second comparator A2, and first
Comparator A1 in-phase input ends connect reference voltage Vref, inverting input connection the second comparator A2 in-phase ends P and OR gate
Or input IN2, output end connection buffer B1 inputs;A1 is anti-for second comparator A2 in-phase input ends connection first comparator
To input and OR gate or input IN2, reverse input end connection sawtooth signal Vpeak, Enable Pin EN connection buffer B2
Output end and OR gate or input IN1, output end connection gate logic module with door and inputs;Buffer module is by two
Individual buffer B1, B2 and electric capacity C are constituted, wherein buffer B1 inputs connection first comparator A1 output ends, output end connection
Electric capacity C and buffer B2, electric capacity the C other end are grounded, the connection of buffer B2 output ends the second comparator A2 EN ends and OR gate or
Input IN1;Gate logic module is constituted by OR gate or and with door and, and B2 is defeated for wherein OR gate or inputs IN1 connection buffers
Go out end, input IN2 connection first comparator A1 inverting inputs and the second comparator A2 in-phase input ends, output end connection with
Door and inputs IN2;The second comparator A2 output ends are connected with door and inputs.
When wherein the second comparator A2 Enable Pins EN is high level, comparator normal work;Comparator A2 Enable Pins EN is
During low level, comparator is output as high level;First comparator A1 processes digital dimming and controls the work of the second comparator A2
State, the second comparator A2 treatment simulation light modulations.
During simulation light modulation input, comparator A1 backward end input signals Vin, comparator A1 hold reference voltage Vref in the same direction,
And the relation of the peak value Vpeak of comparator A2 backward ends input sawtooth signal meets:Vin < Vpeak < Vref, and buffer
Device B1 has the function that the velocity of discharge is fast, charging rate is slow to electric capacity C, and gate logic module is respectively simulation with door and inputs
Dim signal DIM_A1 and digital dim signal DIM_D2, the second comparator A2 output ends are simulation dim signal DIM_A1, door
Logic module OR gate or output ends are digital dimming signal DIM_D2.
Comparator module includes first, second comparator A1 and A2, first comparator A1 treatment numerals in the present embodiment
Dim and by buffer module B1, B2 and the Enable Pin EN working conditions of the second comparator A2 of electric capacity C controls, the second comparator
A2 treatment simulation light modulations, dim signal after being processed through two comparators again by the OR gate or of gate logic module and with door and
Output.
Specifically operation principle is:
When second comparator A2 Enable Pins EN is high level, comparator normal work;Second comparator A2 Enable Pins EN is
During low level, comparator is output as high level.
During simulation light modulation input, first comparator A1 backward end input signals Vin, first comparator A1 hold with reference to electricity in the same direction
Pressure Vref, and the relation of the peak value Vpeak of the second comparator A2 backward ends input sawtooth signal meets:Vin < Vpeak <
Vref.Now, first comparator A1 is output as high level, is still high level, i.e. Enable Pin after buffered device B1, B2 and electric capacity C
EN is high level, the second comparator A2 normal works, because the input of comparator A2 inverting inputs N and in-phase input end P is believed
Number sawtooth waveforms and Vin are respectively, comparator output DIM_A is square-wave signal after comparing, and mono- input IN1 of OR gate or is
Height, then be height with mono- input IN2 input DIM_D of door and.Then output end out output signals are and DIM_A identical square waves
Signal, and Vin is bigger, the dutycycle of square-wave signal is bigger, as shown in Figure 2.
When digital dimming is input into, buffer B1 has the function that the velocity of discharge is fast, charging rate is slow to electric capacity C, when first
During comparator A1 backward end supplied with digital signal, first comparator A1 is output as and input signal identical data signal.Now,
Due to the effect of buffer B1 and electric capacity C, the output end signal of buffer B2 remains low level, i.e. the second comparator A2 is enabled
EN is invalid at end, and the second comparator A2 is output as high level, and an input IN1 of OR gate or is low level, and OR gate or's is another
Individual input IN2 is input signal Vin, is high level with mono- input IN1 inputs DIM_A of door and, then output end out is defeated
Go out with input signal Vin identical data signals, as shown in Figure 3.
The description of such scheme is the utility model for being understood that and using for ease of those skilled in the art,
Person skilled in the art obviously can easily make various modifications to embodiment, therefore, the utility model is not limited
In above-mentioned real scheme, those skilled in the art do not depart from what the utility model category was made according to method of the present utility model
Improve and modification all should be within protection domain of the present utility model.
Claims (7)
1. the digital simulation light adjusting circuit that a kind of port shares, including comparator module, buffer module, gate logic module, its
It is characterised by:Comparator module is made up of first comparator A1 and the second comparator A2, and first comparator A1 in-phase input ends connect
Reference voltage Vref is connect, inverting input connection the second comparator A2 in-phase ends P and OR gate or input IN2, output end connects
Connect buffer B1 inputs;Second comparator A2 in-phase input ends connect first comparator A1 reverse input ends and OR gate or inputs
End IN2, reverse input end connection sawtooth signal Vpeak, Enable Pin EN connection buffer B2 output ends and OR gate or inputs
End IN1, output end connection gate logic module with door and inputs;Buffer module is by two buffers B1, B2 and electric capacity C
Composition, wherein buffer B1 inputs connection first comparator A1 output ends, output end connection electric capacity C and buffer B2, electric capacity C
The other end is grounded, the connection of buffer B2 output ends the second comparator A2 EN ends and OR gate or inputs IN1;Gate logic module
Constituted by OR gate or and with door and, wherein OR gate or inputs IN1 connection buffer B2 output ends, input IN2 connections the
One comparator A1 inverting inputs and the second comparator A2 in-phase input ends, output end connection and door and inputs IN2;With door
And inputs connect the second comparator A2 output ends.
2. the digital simulation light adjusting circuit that a kind of port according to claim 1 shares, it is characterised in that:Second comparator
When A2 Enable Pins EN is high level, comparator normal work;When comparator A2 Enable Pins EN is low level, comparator is output as height
Level.
3. the digital simulation light adjusting circuit that a kind of port according to claim 1 shares, it is characterised in that:First comparator
A1 processes digital dimming and controls the working condition of the second comparator A2, the second comparator A2 treatment simulation light modulations.
4. the digital simulation light adjusting circuit that a kind of port according to claim 1 shares, it is characterised in that:Simulation light modulation is defeated
Fashionable, comparator A1 backward end input signals Vin, comparator A1 hold reference voltage Vref, and comparator A2 backward ends in the same direction
The relation for being input into the peak value Vpeak of sawtooth signal meets:Vin < Vpeak < Vref.
5. the digital simulation light adjusting circuit that a kind of port according to claim 1 shares, it is characterised in that:B1 pairs, buffer
Electric capacity C has the function that the velocity of discharge is fast, charging rate is slow.
6. the digital simulation light adjusting circuit that a kind of port according to claim 1 shares, it is characterised in that:Gate logic module
Simulation dim signal DIM_A is respectively with door and inputs(1)With digital dim signal DIM_D(2).
7. the digital simulation light adjusting circuit that a kind of port according to claim 1 shares, it is characterised in that:Second comparator
A2 output ends are simulation dim signal DIM_A(1), gate logic module OR gate or output ends are digital dimming signal DIM_D(2).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201621405534.3U CN206283692U (en) | 2016-12-21 | 2016-12-21 | A kind of shared digital simulation light adjusting circuit in port |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201621405534.3U CN206283692U (en) | 2016-12-21 | 2016-12-21 | A kind of shared digital simulation light adjusting circuit in port |
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Publication Number | Publication Date |
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CN206283692U true CN206283692U (en) | 2017-06-27 |
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CN201621405534.3U Withdrawn - After Issue CN206283692U (en) | 2016-12-21 | 2016-12-21 | A kind of shared digital simulation light adjusting circuit in port |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106535412A (en) * | 2016-12-21 | 2017-03-22 | 贵州恒芯微电子科技有限公司 | Digital-analogue dimming circuit with shared port |
-
2016
- 2016-12-21 CN CN201621405534.3U patent/CN206283692U/en not_active Withdrawn - After Issue
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106535412A (en) * | 2016-12-21 | 2017-03-22 | 贵州恒芯微电子科技有限公司 | Digital-analogue dimming circuit with shared port |
CN106535412B (en) * | 2016-12-21 | 2018-07-10 | 贵州恒芯微电子科技有限公司 | The digital simulation light adjusting circuit that a kind of port shares |
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GR01 | Patent grant | ||
AV01 | Patent right actively abandoned |
Granted publication date: 20170627 Effective date of abandoning: 20180710 |
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AV01 | Patent right actively abandoned |
Granted publication date: 20170627 Effective date of abandoning: 20180710 |
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AV01 | Patent right actively abandoned | ||
AV01 | Patent right actively abandoned |