CN206149215U - Passive first detector - Google Patents
Passive first detector Download PDFInfo
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- CN206149215U CN206149215U CN201621267884.8U CN201621267884U CN206149215U CN 206149215 U CN206149215 U CN 206149215U CN 201621267884 U CN201621267884 U CN 201621267884U CN 206149215 U CN206149215 U CN 206149215U
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- nmos tube
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Abstract
The utility model relates to a passive first detector, include mutual conductance amplifier stage circuit, switch mixer stage circuit and stride and hinder the amplifier stage circuit, mutual conductance amplifier stage circuit increase mutual conductance value inserts radio frequency voltage signal, turns into the radio frequency current signal through the electric current is multiplexing with radio frequency voltage signal, switch mixer stage circuit inserts the local oscillator signal, with radio frequency current signal and the mixing of local oscillator signal modulate to carry out filtering, output intermediate frequency current signal to the signal after the mixing, stride and hinder the amplifier stage circuit and put unit BN through supplementary fortune and put unit BP with supplementary fortune and reduce input impedance, the equivalent mutual conductance value of increase and gain, become intermediate frequency voltage signal with intermediate frequency electric current signal conversion and export. Compared with the prior art, the utility model discloses the broadband, conversion gain is high, and port isolation is good, the low power dissipation.
Description
Technical field
This utility model is related to a kind of passive frequency mixer.
Background technology
In rf signal reception link, the effect of frequency mixer is that input radio frequency signal is downconverted to into intermediate frequency or base band
Processed in order to subsequent module.Consider from whole receives link, after frequency mixer there should be higher conversion gain to suppress
Level IF amplifier circuit, and impact of the noise of filter circuit to whole receives link noise coefficient.Additionally, frequency mixer itself
There should be preferable interport isolation to reduce the local-oscillator leakage at intermediate frequency end.It is important that this causes research high-gain frequency mixer to have
Meaning.
Traditional mixer architecture is divided into active mixer and passive frequency mixer.Open due to flowing through mixing without DC current
Guan Guan, the flicker noise of passive frequency mixer is much smaller than the flicker noise of active mixer, and the linearity of passive frequency mixer is usual
Can be higher than active mixer, so that passive frequency mixer is favored by many designers.
Typical passive frequency mixer is constituted by mutual conductance amplifier stage, switch mixer stage and across resistance amplifier stage.Wherein, amplify across resistance
Level is generally made up of the operation transconductance amplifier with resistive degeneration, due to provide the input of base band Low ESR across resistance amplifier stage
Node, this causes operation transconductance amplifier to need to provide sufficiently high baseband gain.Conventional operation trsanscondutance amplifier is adopted and is based on
The two-stage cascade structure of miller compensation, is to obtain sufficiently large gain bandwidth product and closed feedback loop is stablized, this side
Method needs to consume great power consumption, there is the defect that gain, bandwidth and phase margin are mutually restricted；Additionally, operation transconductance is put
The radio-frequency current of big device input can be by load capacitance feedthrough to its outfan, so as to produce undesirable radio frequency in outfan
Voltage, reduces interport isolation.
Utility model content
The purpose of this utility model is to provide a kind of passive frequency mixer, and technical problem to be solved is：How broadening frequency
Band, lifts conversion gain, reduces power consumption.
The technical scheme that this utility model solves above-mentioned technical problem is as follows：A kind of passive frequency mixer, including mutual conductance amplification
Level circuit, switch mixing stage circuits and across resistance amplification grade circuit；
The mutual conductance amplification grade circuit increases transconductance value, accesses radio frequency voltage signal, by current multiplexing by radio-frequency voltage
Signal is converted into current radio frequency signal；
The switch mixing stage circuits are connected with the mutual conductance amplification grade circuit, access local oscillation signal, and radio-frequency current is believed
Number mixing is modulated with local oscillation signal, and the signal after mixing is filtered, output current intermediate frequency signal；
It is described to be connected with the switch mixing stage circuits across resistance amplification grade circuit, by auxiliary OP AMP unit B N and auxiliary fortune
Putting unit B P reduces input impedance, increase equivalent transconductance value and gain, current intermediate frequency signal is converted into into voltage intermediate frequency signal defeated
Go out.
The beneficial effects of the utility model are：Mutual conductance amplification grade circuit, switch mixing stage circuits and across resistance amplification grade circuit
Coordinate operation, can realize being mixed signal, while can broadening frequency band, conversion gain be high, low in energy consumption, interport isolation is good, linear
Degree is high.
On the basis of above-mentioned technical proposal, this utility model can also do following improvement.
Further, the mutual conductance amplification grade circuit includes input transconductance modulator, common-mode feedback module and biasing module, described
Common-mode feedback module and biasing module are connected with the input transconductance modulator；The common-mode feedback module is used for the input
The stable quiescent voltage of transconductance modulator output；The biasing module is used to access external voltage, to the input transconductance modulator output
Bias current；The input transconductance modulator is used for according to bias current and stablizes static voltage stability operation, accesses radio-frequency voltage
Signal, by radio frequency voltage signal current radio frequency signal is converted into.
It is using the beneficial effect of above-mentioned further scheme：Mutual conductance amplification grade circuit is phase inverter mutual conductance structure for amplifying, is adopted
Electric current multiplex technique is used, the transconductance value of mutual conductance amplifier stage is improve, the conversion gain of whole frequency mixer is improve, suppresses rear class to make an uproar
Sound.
Further, the input transconductance modulator includes NMOS tube M1, NMOS tube M2, PMOS M3, PMOS M4, electric capacity C1
～C4 and resistance R1～R4, the grid Jing electric capacity C1 of NMOS tube M1 is connected with signal input positive terminal Vin1, also Jing resistance
R1 accesses bias voltage vb03；The drain electrode of NMOS tube M1 is connected with the drain electrode of PMOS M3；The source electrode of NMOS tube M1
It is connected with the biasing module；The grid Jing electric capacity C2 of NMOS tube M2 is connected with signal input negative pole end Vin2, and also Jing is electric
Resistance R2 accesses bias voltage vb03；The drain electrode of NMOS tube M2 is connected with the drain electrode of PMOS M4, also with the switch mixing
Level circuit connection；The source electrode of NMOS tube M2 is connected with the biasing module；The grid Jing electric capacity C3 of PMOS M3 with
Signal input positive terminal Vin1 connects, and also Jing resistance R3 accesses bias voltage vb02；The drain electrode of PMOS M3 is opened with described
Close mixing stage circuits connection；The source electrode of PMOS M4 is connected with the biasing module；The grid Jing of PMOS M4 is electric
Hold C4 to be connected with signal input negative pole end Vin2, also Jing resistance R4 accesses bias voltage vb02；The source electrode of PMOS M3 with
The biasing module connection；The grid of PMOS M7 accesses bias voltage vb01, and the source electrode of PMOS M7 accesses electricity
Pressure VDD.
It is using the beneficial effect of above-mentioned further scheme：Input transconductance modulator adopts current multiplexing structure, increases mutual conductance,
Radio frequency voltage signal is converted into by radio frequency with static voltage stability operation, access radio frequency voltage signal is stablized according to bias current
Electric current is believed.
Further, the common-mode feedback module includes NMOS tube M8, NMOS tube M9, NMOS tube M10, PMOS M11, PMOS
Pipe M12, resistance R5 and resistance R6, the grid Jing resistance R5 of NMOS tube M8 respectively with NMOS tube M1 and PMOS M3
Drain electrode connection, the grid also Jing resistance R6 of NMOS tube M8 is connected respectively with the drain electrode of NMOS tube M2 and PMOS M4,
Its drain electrode is connected with the drain electrode of PMOS M11, and its source electrode is connected with the drain electrode of NMOS tube M10；NMOS tube M9
Grid access bias voltage vcm, its source electrode be connected with the drain electrode of NMOS tube M10, its drain respectively with PMOS M12
Drain electrode and biasing module connection；The grid of NMOS tube M10 accesses bias voltage vb05, its source ground；The PMOS
The grid of M11 is connected with the grid of the PMOS pipes M12, and the grid of PMOS M11 also drains with it and is connected, described
The grid of PMOS M12 also drains with it and is connected, and the source electrode of PMOS M11 and PMOS M12 accesses voltage VDD.
It is using the beneficial effect of above-mentioned further scheme：Common mode feedback circuit can stably be input into transconductance modulator static work
Point, ensures input transconductance modulator stable operation.
Further, the biasing module includes NMOS tube M5, NMOS tube M6 and PMOS M7, the drain electrode of NMOS tube M5
It is connected with the source electrode of NMOS tube M1 and the source electrode of NMOS tube M2 respectively, the grid of NMOS tube M5 and NMOS tube M9
Drain electrode connection, the source grounding of NMOS tube M5 and NMOS tube M6, the grid of NMOS tube M6 accesses bias voltage
Vb04, the drain electrode of NMOS tube M6 is connected respectively with the source electrode of NMOS tube M1 and the source electrode of NMOS tube M2.
It is using the beneficial effect of above-mentioned further scheme：Biasing module can provide bias voltage to be input into transconductance modulator,
Ensure input transconductance modulator stable operation.
Further, it is described switch mixing stage circuits include NMOS tube M13, NMOS tube M14, NMOS tube M15, NMOS tube M16,
Electric capacity C5, electric capacity C6 and electric capacity C7, the source electrode Jing electric capacity C5 of NMOS tube M13 is connected with the drain electrode of PMOS M3, also
It is connected with the source electrode of NMOS tube M14；The grid of NMOS tube M13 is connected with local oscillation signal input positive terminal LO+, described
The drain electrode of NMOS tube M13 is connected with described across resistance amplification grade circuit；The grid of NMOS tube M14 and the grid of NMOS tube M15
It is connected with local oscillation signal input negative terminal LO-；The drain electrode of NMOS tube M14 is connected with the drain electrode of NMOS tube M16；It is described
The source electrode Jing electric capacity C6 of NMOS tube M15 is connected with the drain electrode of NMOS tube M2, is also connected with the source electrode of NMOS tube M16；
The drain electrode of NMOS tube M15 is connected with the drain electrode of NMOS tube M15；The grid of NMOS tube M16 is believed with the local oscillator
Number input positive terminal LO+ connection, the drain electrode of NMOS tube M16 is connected with described across resistance amplification grade circuit；The one of the electric capacity C7
End is connected with the drain electrode of NMOS tube M13, and the other end is connected with the drain electrode of NMOS tube M16.
It is using the beneficial effect of above-mentioned further scheme：Two groups of mixing switch of switch mixing stage circuits drains it to pipe
Indirectly filter capacitor, constitutes low impedance at high frequency node, and the radio-frequency current that mutual conductance amplification grade circuit is produced is sucked as much as possible
Switch mixing stage circuits, while the intermediate-freuqncy signal produced beneficial to lower mixing injects load stage and reduces local oscillation signal to load stage
Feedthrough, current radio frequency signal and local oscillation signal are modulated into mixing, and the signal after mixing is filtered.
Further, it is described across resistance amplification grade circuit include NMOS tube M17, NMOS tube M18, NMOS tube M19, NMOS tube M20,
PMOS M21, PMOS M22, PMOS M23, PMOS M24, resistance R7, resistance R8, auxiliary OP AMP unit B P, auxiliary OP AMP
Unit B N and common-mode feedback amplifier unit A1；NMOS tube M17 drain electrode respectively with the source electrode and auxiliary of NMOS tube M19
The grid of the input connection of amplifier unit B P, the grid of NMOS tube M17 and NMOS tube M18 accesses bias voltage
Vb00, the source electrode of NMOS tube M17 and the source grounding of NMOS tube M18；The drain electrode of NMOS tube M18 respectively with it is described
The source electrode of NMOS tube M20 and the input connection of auxiliary OP AMP unit B P；The source electrode of NMOS tube M19 and the NMOS tube
The drain electrode connection of M13, the grid of NMOS tube M19 is connected with the outfan of auxiliary OP AMP unit B P, the NMOS tube
The drain electrode of M19 is connected with the drain electrode of PMOS M21, and the source electrode of NMOS tube M20 connects with the drain electrode of NMOS tube M16
Connect, the grid of NMOS tube M20 is connected with the outfan of auxiliary OP AMP unit B P, the drain electrode of NMOS tube M20 with
The drain electrode connection of PMOS M22；The drain electrode of PMOS M21 is connected with signal output part Vout1, its source electrode and PMOS
The drain electrode connection of pipe M23；Its grid is connected with the outfan of auxiliary OP AMP unit B N；The drain electrode of PMOS M22 with
Signal output part Vout2 connects, and its source electrode is connected with the drain electrode of PMOS M24, its grid and auxiliary OP AMP unit B N
Outfan connects；The input of auxiliary OP AMP unit B N connects respectively with the drain electrode of PMOS M23 and PMOS M24
Connect；The grid of PMOS M23 is connected with the grid of PMOS M24, the source electrode of PMOS M23 and PMOS M24
Source electrode accesses voltage VDD；The common-mode feedback amplifier unit A1 input positive terminals pass through the leakage of resistance R7 and NMOS tube M19
Pole connects, and is also connected with the drain electrode of NMOS tube M20 by resistance R8；The input negative terminal of the common-mode feedback amplifier unit A1
Access voltage VCM；The outfan of the common-mode feedback amplifier unit A1 respectively with the grid and PMOS of PMOS M23
The grid connection of M24.
It is using the beneficial effect of above-mentioned further scheme：Gain bootstrap structure, mutual conductance have been used across resistance amplification grade circuit
Strengthen and input impedance is further reduced, improve current utilization efficiency and interport isolation；Simultaneously gain bootstrap is caused
Output impedance increases, and conversion gain is greatly improved under relatively low bias current.Using the differential characteristic of circuit itself, effectively
The electric current of intermediate frequency of switch mixing stage circuits output is converted to into voltage of intermediate frequency output, while overcoming the fortune with resistive degeneration
Calculate the restriction in trsanscondutance amplifier between power consumption, gain and bandwidth and noise and radiofrequency signal passes through load capacitance feedthrough extremely
The defects such as outfan.
Further, auxiliary OP AMP unit B P includes PMOS BPM0, PMOS BPM1, PMOS BPM2, NMOS tube
BPM3, NMOS tube BPM4, NMOS tube BPM5, NMOS tube BPM6, PMOS BPM7PMOS BPM8, PMOS BPM9, PMOS
BPM10, PMOS BPM11With PMOS BPM12；
NMOS tube BPM3Drain electrode be connected with the grid of NMOS tube M19, PMOS BPM4Drain electrode and institute
State the grid connection of NMOS tube M20, NMOS tube BPM3Grid and NMOS tube BPM4Grid access bias voltage vb1,
NMOS tube BPM3Source electrode respectively with PMOS BPM1Drain electrode and NMOS tube BPM5Drain electrode connection；The NMOS tube
BPM4Source electrode respectively with PMOS BPM2Drain electrode and NMOS tube BPM6Drain electrode connection；NMOS tube BPM5Grid and
NMOS tube BPM6Grid access bias voltage vb0, NMOS tube BPM5Source electrode and NMOS tube BPM6Source electrode connect
Ground；
PMOS BPM1Grid be connected with the drain electrode of NMOS tube M17, PMOS BPM2Grid and institute
State the drain electrode connection of NMOS tube M18, PMOS BPM1Source electrode and PMOS BPM1Source electrode with PMOS BPM0
Drain electrode connection, PMOS BPM0Grid access bias voltage vb2, PMOS BPM0Source electrode respectively with it is described
PMOS BPM11Drain electrode and PMOS BPM12Drain electrode connection, PMOS BPM11Grid and PMOS BPM8
Drain electrode connection, PMOS BPM12Grid and PMOS BPM7Drain electrode connection, PMOS BPM11With
PMOS BPM12Source electrode access voltage VDD；
PMOS BPM7Drain electrode be connected with the grid of NMOS tube M19, PMOS BPM8Drain electrode and institute
State the grid connection of NMOS tube M20, PMOS BPM8Grid and PMOS BPM7Grid access bias voltage vb2,
PMOS BPM7Source electrode and PMOS BPM9Drain electrode connection, PMOS BPM8Source electrode and the PMOS
Pipe BPM10Drain electrode connection, PMOS BPM9Grid and PMOS BPM10Grid access bias voltage vb2, it is described
PMOS BPM9Source electrode and PMOS BPM10Source electrode access voltage VDD.
It is using the beneficial effect of above-mentioned further scheme：It is effectively that switch is mixed using the differential characteristic of circuit itself
The electric current of intermediate frequency of frequency level circuit output is converted to voltage of intermediate frequency output, while overcome the operation transconductance with resistive degeneration putting
Restriction and noise and radiofrequency signal in big device between power consumption, gain and bandwidth is by load capacitance feedthrough to outfan etc.
Defect.
Further, auxiliary OP AMP unit B N includes NMOS tube BNM0, NMOS tube BNM1, NMOS tube BNM2, PMOS
BNM3, PMOS BNM4, PMOS BNM5, PMOS BNM6, NMOS tube BNM7, NMOS tube BNM8, NMOS tube BNM9, NMOS tube
BNM10, NMOS tube BNM11With NMOS tube BNM12；
NMOS tube BNM1Source electrode and NMOS tube BNM2Source electrode with NMOS tube BNM0Drain electrode connection, institute
State NMOS tube BNM1Grid be connected with the source electrode of NMOS tube M21, NMOS tube BNM2Grid and the NMOS tube
The source electrode connection of M22, NMOS tube BNM1Grid drain electrode and PMOS BNM3Source electrode connection, the NMOS tube
BNM2Grid drain electrode and PMOS BNM4Source electrode connection；
NMOS tube BNM0Grid access bias voltage vb2, NMOS tube BNM0Source electrode respectively with the NMOS
Pipe BNM11Drain electrode and NMOS tube BNM12Drain electrode connection, NMOS tube BNM11Grid and PMOS BNM4Leakage
Pole connects, NMOS tube BNM12Grid and PMOS BNM3Drain electrode connection, NMOS tube BNM11Source electrode and
NMOS tube BNM12Source grounding；
PMOS BNM3Source electrode and PMOS BNM5Drain electrode connection, PMOS BNM4Source electrode with
PMOS BNM6Drain electrode connection, PMOS BNM5Grid and PMOS BNM6Grid access bias voltage
Vb3, PMOS BNM5Source electrode and PMOS BNM6Source electrode access voltage VDD, PMOS BNM3Grid and
PMOS BNM4Grid access bias voltage vb2, PMOS BNM3The grid of drain electrode and NMOS tube M21 connect
Connect, PMOS BNM4Drain electrode be connected with the grid of NMOS tube M22；
NMOS tube BNM7Grid and NMOS tube BNM8Grid access bias voltage vb1, NMOS tube BNM7
Drain electrode and PMOS BNM3Drain electrode connection, NMOS tube BNM8Drain electrode and PMOS BNM4Drain electrode connect
Connect, NMOS tube BNM7Source electrode and PMOS BNM9Drain electrode connection, NMOS tube BNM8Source electrode with it is described
PMOS BNM10Drain electrode connection, NMOS tube BNM9Grid and NMOS tube BNM10Grid access bias voltage vb0,
NMOS tube BNM9Source electrode and NMOS tube BNM10Source grounding.
It is using the beneficial effect of above-mentioned further scheme：Auxiliary OP AMP unit B N is primarily used to improve across resistance amplifier stage
The transimpedance gain of circuit, so greatly reduces the power consumption and chip area of overall amplifier.
Description of the drawings
Fig. 1 is a kind of module frame chart of passive frequency mixer of this utility model；
Fig. 2 is a kind of circuit theory diagrams of passive frequency mixer of this utility model；
Fig. 3 is the module frame chart of mutual conductance amplification grade circuit；
Fig. 4 is the circuit theory diagrams of mutual conductance amplification grade circuit；
Fig. 5 is the circuit theory diagrams of auxiliary OP AMP unit B P；
Fig. 6 is the circuit theory diagrams of auxiliary OP AMP unit B N；
Fig. 7 is the schematic diagram of gain bootstrap；
Fig. 8 is a kind of conversion gain simulation result figure of passive frequency mixer of this utility model；
Fig. 9 is a kind of linearity simulation result figure of passive frequency mixer of this utility model；
Figure 10 is a kind of noise coefficient simulation result figure of passive frequency mixer of this utility model.
In accompanying drawing, the list of parts representated by each label is as follows：
1st, mutual conductance amplification grade circuit, 2, switch mixing stage circuits, 3, across resistance amplification grade circuit, 4, input transconductance modulator, 5,
Common-mode feedback module, 6, biasing module.
Specific embodiment
Principle of the present utility model and feature are described below in conjunction with accompanying drawing, example is served only for explaining this practicality
It is new, it is not intended to limit scope of the present utility model.
Embodiment 1：
As depicted in figs. 1 and 2, a kind of passive frequency mixer, including mutual conductance amplification grade circuit 1, switch mixing stage circuits 2 and across
Resistance amplification grade circuit 3；
The mutual conductance amplification grade circuit 1 increases transconductance value, accesses radio frequency voltage signal, by current multiplexing by radio-frequency voltage
Signal is converted into current radio frequency signal；
The switch mixing stage circuits 2 are connected with the mutual conductance amplification grade circuit 1, for accessing local oscillation signal, by radio frequency
Current signal is modulated mixing with local oscillation signal, and the signal after mixing is filtered, and exports current intermediate frequency signal；
It is described to be connected with the switch mixing stage circuits 2 across resistance amplification grade circuit 3, for by auxiliary OP AMP unit B P and
Auxiliary OP AMP unit B N reduces input impedance, increase equivalent transconductance value and gain, and current intermediate frequency signal is converted into into voltage of intermediate frequency
Signal output.
Mutual conductance amplification grade circuit 1, switch mixing stage circuits 2 and across resistance the coordinate operation of amplification grade circuit 3, can realize to signal
Mixing, at the same can broadening frequency band, conversion gain is high, low in energy consumption, interport isolation is good, the linearity is high.
In above-described embodiment, mutual conductance amplification grade circuit 1, switch mixing stage circuits 2 and across resistance amplification grade circuit 3 coordinate fortune
Make, can realize to signal mixing, while the broadening frequency band of energy, conversion gain is high, low in energy consumption, interport isolation is good, the linearity is high.
Alternatively, as this utility model one embodiment, as shown in Figure 3 and Figure 4, mutual conductance amplification grade circuit 1 includes defeated
Enter transconductance modulator 4, common-mode feedback module 5 and biasing module 6, the common-mode feedback module 5 and biasing module 6 with the input
Transconductance modulator 4 connects；The common-mode feedback module 5 is used for quiescent voltage stable to input transconductance modulator 4 output；It is described inclined
Module 6 is put for accessing external voltage, to the input output bias current of transconductance modulator 4；The input transconductance modulator 4 is used for
Radio frequency voltage signal is converted into by radio frequency with static voltage stability operation, access radio frequency voltage signal is stablized according to bias current
Current signal.
In above-described embodiment, mutual conductance amplification grade circuit 1 is phase inverter mutual conductance structure for amplifying, using current multiplexing technology, is carried
The high transconductance value of mutual conductance amplifier stage, improves the conversion gain of whole frequency mixer, suppresses rear class noise.
Alternatively, as this utility model one embodiment, as shown in Figure 1 and Figure 4, input transconductance modulator 4 includes NMOS
Pipe M1, NMOS tube M2, PMOS M3, PMOS M4, electric capacity C1～C4 and resistance R1～R4, the grid Jing of NMOS tube M1 is electric
Hold C1 to be connected with signal input positive terminal Vin1, also Jing resistance R1 accesses bias voltage vb03；The drain electrode of NMOS tube M1 with
The drain electrode connection of PMOS M3；The source electrode of NMOS tube M1 is connected with the biasing module 6；The grid Jing of NMOS tube M2
Electric capacity C2 is connected with signal input negative pole end Vin2, and also Jing resistance R2 accesses bias voltage vb03；The drain electrode of NMOS tube M2
It is connected with the drain electrode of PMOS M4, is also connected with the switch mixing stage circuits 2；The source electrode of NMOS tube M2 and the biasing
Module 6 connects；The grid Jing electric capacity C3 of PMOS M3 is connected with signal input positive terminal Vin1, and also Jing resistance R3 accesses inclined
Put voltage vb02；The drain electrode of PMOS M3 is connected with the switch mixing stage circuits 2；The source electrode of PMOS M4 and institute
State biasing module 6 to connect；The grid Jing electric capacity C4 of PMOS M4 is connected with signal input negative pole end Vin2, also Jing resistance R4
Access bias voltage vb02；The source electrode of PMOS M3 is connected with the biasing module 6；The grid of PMOS M7 is accessed
Bias voltage vb01, the source electrode of PMOS M7 accesses voltage VDD.
In above-described embodiment, input transconductance modulator 4 adopts current multiplexing structure, increases mutual conductance, according to bias current and surely
Determine static voltage stability operation, access radio frequency voltage signal, radio frequency voltage signal is converted into into radio-frequency current letter.
Alternatively, as this utility model one embodiment, as shown in Figure 1 and Figure 4, common-mode feedback module 5 includes NMOS
Pipe M8, NMOS tube M9, NMOS tube M10, PMOS M11, PMOS M12, resistance R5 and resistance R6, the grid of NMOS tube M8
Jing resistance R5 is connected respectively with the drain electrode of NMOS tube M1 and PMOS M3, grid also Jing resistance R6 point of NMOS tube M8
Be not connected with the drain electrode of NMOS tube M2 and PMOS M4, its drain electrode is connected with the drain electrode of PMOS M11, its source electrode with
The drain electrode connection of NMOS tube M10；The grid of NMOS tube M9 accesses bias voltage vcm, its source electrode and the NMOS tube
The drain electrode connection of M10, its drain electrode is connected respectively with the drain electrode of PMOS M12 and biasing module 6；The grid of NMOS tube M10
Access bias voltage vb05, its source ground；The grid of PMOS M11 is connected with the grid of PMOS M12, described
The grid of PMOS M11 also drains with it and is connected, and the grid of PMOS M12 also drains with it and is connected, PMOS M11
Voltage VDD is accessed with the source electrode of PMOS M12.
Common mode feedback circuit 5 can stably be input into the quiescent point of transconductance modulator 4, ensure input transconductance modulator stable operation.
Alternatively, as this utility model one embodiment, as shown in Figure 1 and Figure 4, biasing module 6 include NMOS tube M5,
NMOS tube M6 and PMOS M7, NMOS tube M5 drain electrode respectively with the source electrode and the source electrode of NMOS tube M2 of NMOS tube M1
Connection, the grid of NMOS tube M5 is connected with the drain electrode of NMOS tube M9, the source electrode of NMOS tube M5 and NMOS tube M6
Be grounded, the grid of NMOS tube M6 accesses bias voltage vb04, the drain electrode of NMOS tube M6 respectively with the NMOS tube
The source electrode of M1 and the source electrode connection of NMOS tube M2.
In above-described embodiment, biasing module 6 can provide bias voltage for input transconductance modulator 4, ensure input transconductance modulator 4
Stable operation.
Mutual conductance amplification grade circuit 1 is phase inverter mutual conductance structure for amplifying, using current multiplexing technology, NMOS tube M1, NMOS tube
M2, PMOS M3 and PMOS M4 provide mutual conductance as input mutual conductance pipe simultaneously, and total mutual conductance of mutual conductance amplifier stage is gmN+gmP
(wherein gmN represents the transconductance value of NMOS tube, and gmP represents the transconductance value of PMOS), so as to improve the mutual conductance of mutual conductance amplifier stage
Value, improves the conversion gain of whole frequency mixer, suppresses rear class noise.
Alternatively, as this utility model one embodiment, as shown in figure 1, switch mixing stage circuits 2 include NMOS tube
M13, NMOS tube M14, NMOS tube M15, NMOS tube M16, electric capacity C5, electric capacity C6 and electric capacity C7, the source electrode Jing of NMOS tube M13
Electric capacity C5 is connected with the drain electrode of PMOS M3, is also connected with the source electrode of NMOS tube M14；The grid of NMOS tube M13
Pole is connected with local oscillation signal input positive terminal LO+, and the drain electrode of NMOS tube M13 is connected with described across resistance amplification grade circuit 3；It is described
The grid of NMOS tube M14 and the grid of NMOS tube M15 are connected with local oscillation signal input negative terminal LO-；The leakage of NMOS tube M14
Pole is connected with the drain electrode of NMOS tube M16；The source electrode Jing electric capacity C6 of NMOS tube M15 connects with the drain electrode of NMOS tube M2
Connect, be also connected with the source electrode of NMOS tube M16；The drain electrode of NMOS tube M15 is connected with the drain electrode of NMOS tube M15；
The grid of NMOS tube M16 is connected with local oscillation signal input positive terminal LO+, the drain electrode of NMOS tube M16 with it is described across
Resistance amplification grade circuit 3 connects；One end of the electric capacity C7 is connected with the drain electrode of NMOS tube M13, the other end and the NMOS
The drain electrode connection of pipe M16.
In above-described embodiment, switch mixing stage circuits 2 are modulated simultaneously to the radio-frequency current that mutual conductance amplification grade circuit 1 is exported
Filtering, the electric current of intermediate frequency of output；The drain electrode of switching tube NMOS tube M13, M15 of switch mixing stage circuits 2 and NMOS tube M14, M16
Drain electrode indirect electric capacity C7, constitute low impedance at high frequency node, so as to filter mixing switching tube output current in high fdrequency components；
The radio-frequency current that mutual conductance amplification grade circuit 1 is produced suction cock mixing stage circuits 2 as much as possible, while producing beneficial to lower mixing
Raw intermediate-freuqncy signal injects load stage and reduces local oscillation signal to the feedthrough of load stage, by current radio frequency signal and local oscillation signal
Mixing is modulated, and the signal after mixing is filtered.
Alternatively, as this utility model one embodiment, as shown in figure 1, including NMOS tube across resistance amplification grade circuit 3
M17, NMOS tube M18, NMOS tube M19, NMOS tube M20, PMOS M21, PMOS M22, PMOS M23, PMOS M24, electricity
Resistance R7, resistance R8, auxiliary OP AMP unit B P, auxiliary OP AMP unit B N and common-mode feedback amplifier unit A1；NMOS tube M17
Drain electrode is connected respectively with the source electrode of NMOS tube M19 and the input of auxiliary OP AMP unit B P, the grid of NMOS tube M17
The grid of pole and NMOS tube M18 accesses bias voltage vb00, the source electrode of NMOS tube M17 and the source of NMOS tube M18
Extremely it is grounded；NMOS tube M18 drain electrode respectively with the source electrode and the input of auxiliary OP AMP unit B P of NMOS tube M20
Connection；The source electrode of NMOS tube M19 is connected with the drain electrode of NMOS tube M13, and the grid of NMOS tube M19 is auxiliary with described
The outfan for helping amplifier unit B P connects, and the drain electrode of NMOS tube M19 is connected with the drain electrode of PMOS M21, described
The source electrode of NMOS tube M20 is connected with the drain electrode of NMOS tube M16, the grid of NMOS tube M20 and the auxiliary OP AMP list
The outfan connection of first BP, the drain electrode of NMOS tube M20 is connected with the drain electrode of PMOS M22；PMOS M21
Drain electrode is connected with signal output part Vout1, and its source electrode is connected with the drain electrode of PMOS M23；Its grid and the auxiliary OP AMP list
The outfan connection of first BN；The drain electrode of PMOS M22 is connected with signal output part Vout2, its source electrode and PMOS M24
Drain electrode connection, its grid is connected with the outfan of auxiliary OP AMP unit B N；The input of auxiliary OP AMP unit B N point
It is not connected with the drain electrode of PMOS M23 and PMOS M24；The grid of PMOS M23 and the grid phase of PMOS M24
Even, the source electrode of PMOS M23 and the source electrode of PMOS M24 access voltage VDD；The common-mode feedback amplifier unit A1 is defeated
Enter anode to be connected with the drain electrode of NMOS tube M19 by resistance R7, also connected with the drain electrode of NMOS tube M20 by resistance R8
Connect；The input negative terminal of the common-mode feedback amplifier unit A1 accesses voltage VCM；The outfan of the common-mode feedback amplifier unit A1
It is connected with the grid of PMOS M23 and the grid of PMOS M24 respectively.
In above-described embodiment, gain bootstrap structure is adopted across resistance amplification grade circuit 3, realize that low input impedance and height increase across resistance
Benefit.The indirect auxiliary OP AMP BP of NMOS tube M19, the grid of NMOS tube M20 and source electrode, PMOS M21, the grid of PMOS M22
With the indirect auxiliary OP AMP BN of source electrode；Because adding auxiliary OP AMP, NMOS tube M19, the equivalent transconductance of NMOS tube M20 become big, i.e.,
The input impedance entered from terms of NMOS tube M19, the source class of NMOS tube M20 diminishes, so as to realize Low ESR input node；Additionally,
Enter from terms of outfan, the output impedance increase of main amplifier, so as to transimpedance gain raising；Using the differential characteristic of circuit itself,
Overcome the restriction in the operation transconductance amplifier with resistive degeneration between power consumption, gain and bandwidth and noise and penetrate
Frequency signal passes through load capacitance feedthrough to defects such as outfans, and causes have simple structure, low work(across resistance amplification grade circuit 3
The features such as consumption, low noise.
Alternatively, as this utility model one embodiment, as shown in figure 5, auxiliary OP AMP unit B P includes PMOS
BPM0, PMOS BPM1, PMOS BPM2, NMOS tube BPM3, NMOS tube BPM4, NMOS tube BPM5, NMOS tube BPM6, PMOS
BPM7PMOS BPM8, PMOS BPM9, PMOS BPM10, PMOS BPM11With PMOS BPM12；
NMOS tube BPM3Drain electrode be connected with the grid of NMOS tube M19, PMOS BPM4Drain electrode and institute
State the grid connection of NMOS tube M20, NMOS tube BPM3Grid and NMOS tube BPM4Grid access bias voltage vb1,
NMOS tube BPM3Source electrode respectively with PMOS BPM1Drain electrode and NMOS tube BPM5Drain electrode connection；The NMOS tube
BPM4Source electrode respectively with PMOS BPM2Drain electrode and NMOS tube BPM6Drain electrode connection；NMOS tube BPM5Grid and
NMOS tube BPM6Grid access bias voltage vb0, NMOS tube BPM5Source electrode and NMOS tube BPM6Source electrode connect
Ground；
PMOS BPM1Grid be connected with the drain electrode of NMOS tube M17, PMOS BPM2Grid and institute
State the drain electrode connection of NMOS tube M18, PMOS BPM1Source electrode and PMOS BPM1Source electrode with PMOS BPM0
Drain electrode connection, PMOS BPM0Grid access bias voltage vb2, PMOS BPM0Source electrode respectively with it is described
PMOS BPM11Drain electrode and PMOS BPM12Drain electrode connection, PMOS BPM11Grid and PMOS BPM8
Drain electrode connection, PMOS BPM12Grid and PMOS BPM7Drain electrode connection, PMOS BPM11With
PMOS BPM12Source electrode access voltage VDD；
PMOS BPM7Drain electrode be connected with the grid of NMOS tube M19, PMOS BPM8Drain electrode and institute
State the grid connection of NMOS tube M20, PMOS BPM8Grid and PMOS BPM7Grid access bias voltage vb2,
PMOS BPM7Source electrode and PMOS BPM9Drain electrode connection, PMOS BPM8Source electrode and the PMOS
Pipe BPM10Drain electrode connection, PMOS BPM9Grid and PMOS BPM10Grid access bias voltage vb2, it is described
PMOS BPM9Source electrode and PMOS BPM10Source electrode access voltage VDD.
In above-described embodiment, using the differential characteristic of circuit itself, the intermediate frequency for effectively exporting switch mixing stage circuits 2
Electric current be converted to voltage of intermediate frequency output, while overcome power consumption in the operation transconductance amplifier with resistive degeneration, gain and
Restriction and noise and radiofrequency signal between bandwidth is by load capacitance feedthrough to defects such as outfans.
Alternatively, as this utility model one embodiment, as shown in fig. 6, auxiliary OP AMP unit B N includes NMOS tube
BNM0, NMOS tube BNM1, NMOS tube BNM2, PMOS BNM3, PMOS BNM4, PMOS BNM5, PMOS BNM6, NMOS tube
BNM7, NMOS tube BNM8, NMOS tube BNM9, NMOS tube BNM10, NMOS tube BNM11With NMOS tube BNM12；
NMOS tube BNM1Source electrode and NMOS tube BNM2Source electrode with NMOS tube BNM0Drain electrode connection, institute
State NMOS tube BNM1Grid be connected with the source electrode of NMOS tube M21, NMOS tube BNM2Grid and the NMOS tube
The source electrode connection of M22, NMOS tube BNM1Grid drain electrode and PMOS BNM3Source electrode connection, the NMOS tube
BNM2Grid drain electrode and PMOS BNM4Source electrode connection；
NMOS tube BNM0Grid access bias voltage vb2, NMOS tube BNM0Source electrode respectively with the NMOS
Pipe BNM11Drain electrode and NMOS tube BNM12Drain electrode connection, NMOS tube BNM11Grid and PMOS BNM4Leakage
Pole connects, NMOS tube BNM12Grid and PMOS BNM3Drain electrode connection, NMOS tube BNM11Source electrode and
NMOS tube BNM12Source grounding；
PMOS BNM3Source electrode and PMOS BNM5Drain electrode connection, PMOS BNM4Source electrode with
PMOS BNM6Drain electrode connection, PMOS BNM5Grid and PMOS BNM6Grid access bias voltage
Vb3, PMOS BNM5Source electrode and PMOS BNM6Source electrode access voltage VDD, PMOS BNM3Grid and
PMOS BNM4Grid access bias voltage vb2, PMOS BNM3The grid of drain electrode and NMOS tube M21 connect
Connect, PMOS BNM4Drain electrode be connected with the grid of NMOS tube M22；
NMOS tube BNM7Grid and NMOS tube BNM8Grid access bias voltage vb1, NMOS tube BNM7
Drain electrode and PMOS BNM3Drain electrode connection, NMOS tube BNM8Drain electrode and PMOS BNM4Drain electrode connect
Connect, NMOS tube BNM7Source electrode and PMOS BNM9Drain electrode connection, NMOS tube BNM8Source electrode with it is described
PMOS BNM10Drain electrode connection, NMOS tube BNM9Grid and NMOS tube BNM10Grid access bias voltage vb0,
NMOS tube BNM9Source electrode and NMOS tube BNM10Source grounding.
In above-described embodiment, auxiliary OP AMP unit B N is primarily used to improve the transimpedance gain across resistance amplification grade circuit 3, this
Sample greatly reduces the power consumption and chip area of overall amplifier.
In above-described embodiment, auxiliary OP AMP unit B P and auxiliary OP AMP unit B N can use fully differential Foldable cascade
Circuit realiration, input stage BPM1, BPM2 of PMOS is connected on the source electrode of NMOS tube M19, NMOS tube M20 in auxiliary OP AMP unit B P,
Signal amplifies the grid for being followed by metal-oxide-semiconductor M19, M20 through auxiliary OP AMP unit B P, auxiliary OP AMP unit B P be NMOS tube M19,
NMOS tube M20 is provided and is operated in the bias voltage of saturation region, thus need not be too big output voltage swing；Auxiliary OP AMP unit B N
Structure is similar with the structure of auxiliary OP AMP unit B P；Auxiliary OP AMP unit B N, BP be primarily used to improve main amplifier unit across
Lead and gain, therefore speed that they need not be too fast and setup time；Therefore the tail current of auxiliary OP AMP unit B N is generally
The 1/10～1/4 of main amplifier tail current can just meet the requirement of design, so greatly reduce overall amplifier power consumption and
Chip area.
The principle of gain bootstrap, as shown in fig. 7, drain voltage of the input signal of auxiliary OP AMP unit for metal-oxide-semiconductor M1, its
Gain is Av, the grid of the output signal control transistor M1 of auxiliary OP AMP unit；The source electrode ac potential change of metal-oxide-semiconductor M1
Vin, it is A after auxiliary OP AMP unit amplifiesvVin, then the gate source voltage of metal-oxide-semiconductor M1 be changed into Vgs1=(Av-1)Vin≈AvVin, then
The leakage current i=g of transistor M1m1Vgs1=gm1AvVin, then i/Vin=gm1Av, the mutual conductance g of metal-oxide-semiconductor M1m1It is changed into original AvTimes,
Therefore the equivalent input impedance entered from terms of the source electrode of M1 is by 1/gm1It is changed into：1/gm1Av；See entrance from the drain electrode of M1 accordingly
Resistance is by gm1ro1RloadIt is changed into：Rout=Avgm1ro1Rload。
Therefore adding can reduce equivalent input impedance after gain bootstrap technology, improve from switch mixing stage circuits 2 to across
The current utilization rate of resistance amplification grade circuit 3, while the low frequency output impedance of cascade can be improved so as to improve the increasing of amplifier
Benefit；For across resistance amplification grade circuit 3, need to NMOS tube M19, NMOS tube M20 and PMOS M21, PMOS M22 point
The design of auxiliary OP AMP unit is not carried out；Pmos type auxiliary OP AMP unit B P is added, nmos type auxiliary OP AMP unit B N is added, it is auxiliary
The gain for helping amplifier unit B P and auxiliary OP AMP unit B N is respectively Ap、An。
Do not add the output impedance across resistance amplification grade circuit 3 of auxiliary OP AMP unit B P and auxiliary OP AMP unit B N can be with table
It is shown as：
Ro=gm19ro19ro17||gm21ro21ro23
After adding auxiliary OP AMP unit B P and auxiliary OP AMP unit B N, it is across the output impedance of resistance amplification grade circuit 3：
Ro1=Apgm19ro19ro17||Angm21ro21ro23
The gain of whole amplifier is
Wherein, ApForgm1pFor the mutual conductance of BPM1, gm3p、gm7pRespectively
The mutual conductance of BPM3, BPM7, ro1p,ro3p,ro5p,ro7p,ro9pThe respectively output resistance of BPM1, BPM3, BPM5, BPM7, BPM9；
AnFor gm1n[gm3nro3n(ro5n||ro1n)||gm7nro7nro9n], gm1nFor the mutual conductance of BNM1, gm3n、gm7nRespectively BNM3, BNM7
Mutual conductance, ro1n,ro3n,ro5n,ro7n,ro9nThe respectively output resistance of BNM1, BNM3, BNM5, BNM7, BNM9.
As seen from Figure 8, the technical program with gain bootstrap across resistance amplification grade circuit 3 for load passive frequency mixer
When 0.81GHz radiofrequency signals are input into, the conversion gain near 10MHz intermediate frequency output frequencies works as input up to 33.3dB
During 4.01GHz radiofrequency signals, up to 31dB, both differ very little to the conversion gain near 10MHz intermediate frequency output frequencies, only
About 2dB, it is seen that this passive frequency mixer has more stable conversion gain between 0.8GHz to 4GHz, has reached broadband and height
The performance of conversion gain.As seen from Figure 9, the technical program with gain bootstrap across resistance amplification grade circuit 3 for load nothing
IIP3 of the source frequency mixer when local oscillation signal is 2.5GHz is -1.5dBm, and OIP3 is 21dBm, with preferable linearity performance.
As seen from Figure 10, the technical program with gain bootstrap across resistance amplification grade circuit 3 for load passive frequency mixer work as local oscillator
Single-side-band noise figure when signal is 2.5GHz is only 12.7dB.Therefore, this utility model has high-gain, broadband and low noise
The characteristics of sound.
Preferred embodiment of the present utility model is the foregoing is only, it is all in this practicality not to limit this utility model
Within new spirit and principle, any modification, equivalent substitution and improvements made etc. should be included in guarantor of the present utility model
Within the scope of shield.
Claims (9)
1. a kind of passive frequency mixer, it is characterised in that：Including mutual conductance amplification grade circuit (1), switch mixing stage circuits (2) and across resistance
Amplification grade circuit (3)；
The mutual conductance amplification grade circuit (1) increases transconductance value, accesses radio frequency voltage signal, is believed radio-frequency voltage by current multiplexing
Number it is converted into current radio frequency signal；
Switch mixing stage circuits (2) is connected with the mutual conductance amplification grade circuit (1), local oscillation signal is accessed, by radio-frequency current
Signal is modulated mixing with local oscillation signal, and the signal after mixing is filtered, and exports current intermediate frequency signal；
It is described to be connected with switch mixing stage circuits (2) across resistance amplification grade circuit (3), by auxiliary OP AMP unit B P and auxiliary
Amplifier unit B N reduces input impedance, increase equivalent transconductance value and gain, and current intermediate frequency signal is converted into into voltage intermediate frequency signal
Output.
2. a kind of passive frequency mixer according to claim 1, it is characterised in that：The mutual conductance amplification grade circuit (1) is including defeated
Enter transconductance modulator (4), common-mode feedback module (5) and biasing module (6), the common-mode feedback module (5) and biasing module (6) are
It is connected with input transconductance modulator (4)；The common-mode feedback module (5) is for steady to input transconductance modulator (4) output
Determine quiescent voltage；The biasing module (6) is input into transconductance modulator (4) output bias current for accessing external voltage to described；
Input transconductance modulator (4) accesses radio frequency voltage signal for running with static voltage stability is stablized according to bias current, will
Radio frequency voltage signal is converted into current radio frequency signal.
3. a kind of passive frequency mixer according to claim 2, it is characterised in that：Input transconductance modulator (4) is including NMOS
Pipe M1, NMOS tube M2, PMOS M3, PMOS M4, electric capacity C1～C4 and resistance R1～R4, the grid Jing of NMOS tube M1 is electric
Hold C1 to be connected with signal input positive terminal Vin1, also Jing resistance R1 accesses bias voltage vb03；The drain electrode of NMOS tube M1 with
The drain electrode connection of PMOS M3；The source electrode of NMOS tube M1 is connected with the biasing module (6)；The grid of NMOS tube M2
Jing electric capacity C2 is connected with signal input negative pole end Vin2, and also Jing resistance R2 accesses bias voltage vb03；The leakage of NMOS tube M2
Pole is connected with the drain electrode of PMOS M4, is also connected with switch mixing stage circuits (2)；The source electrode of NMOS tube M2 with it is described
Biasing module (6) connects；The grid Jing electric capacity C3 of PMOS M3 is connected with signal input positive terminal Vin1, also Jing resistance R3
Access bias voltage vb02；The drain electrode of PMOS M3 is connected with switch mixing stage circuits (2)；PMOS M4
Source electrode is connected with the biasing module (6)；The grid Jing electric capacity C4 of PMOS M4 is connected with signal input negative pole end Vin2,
Also Jing resistance R4 accesses bias voltage vb02；The source electrode of PMOS M3 is connected with the biasing module (6)；The PMOS
The grid of M7 accesses bias voltage vb01, and the source electrode of PMOS M7 accesses voltage VDD.
4. a kind of passive frequency mixer according to claim 3, it is characterised in that：The common-mode feedback module (5) is including NMOS
Pipe M8, NMOS tube M9, NMOS tube M10, PMOS M11, PMOS M12, resistance R5 and resistance R6, the grid of NMOS tube M8
Jing resistance R5 is connected respectively with the drain electrode of NMOS tube M1 and PMOS M3, grid also Jing resistance R6 point of NMOS tube M8
Be not connected with the drain electrode of NMOS tube M2 and PMOS M4, its drain electrode is connected with the drain electrode of PMOS M11, its source electrode with
The drain electrode connection of NMOS tube M10；The grid of NMOS tube M9 accesses bias voltage vcm, its source electrode and the NMOS tube
The drain electrode connection of M10, its drain electrode is connected respectively with the drain electrode of PMOS M12 and biasing module (6)；The grid of NMOS tube M10
Access bias voltage vb05, its source ground in pole；The grid of PMOS M11 is connected with the grid of PMOS M12, institute
The grid for stating PMOS M11 also drains with it and is connected, and the grid of PMOS M12 also drains with it and is connected, the PMOS
The source electrode of M11 and PMOS M12 accesses voltage VDD.
5. a kind of passive frequency mixer according to claim 4, it is characterised in that：The biasing module (6) including NMOS tube M5,
NMOS tube M6 and PMOS M7, NMOS tube M5 drain electrode respectively with the source electrode and the source electrode of NMOS tube M2 of NMOS tube M1
Connection, the grid of NMOS tube M5 is connected with the drain electrode of NMOS tube M9, the source electrode of NMOS tube M5 and NMOS tube M6
Be grounded, the grid of NMOS tube M6 accesses bias voltage vb04, the drain electrode of NMOS tube M6 respectively with the NMOS tube
The source electrode of M1 and the source electrode connection of NMOS tube M2.
6. a kind of passive frequency mixer according to claim 5, it is characterised in that：Switch mixing stage circuits (2) includes
NMOS tube M13, NMOS tube M14, NMOS tube M15, NMOS tube M16, electric capacity C5, electric capacity C6 and electric capacity C7, NMOS tube M13
Source electrode Jing electric capacity C5 is connected with the drain electrode of PMOS M3, is also connected with the source electrode of NMOS tube M14；The NMOS tube
The grid of M13 is connected with local oscillation signal input positive terminal LO+, and the drain electrode of NMOS tube M13 is with described across resistance amplification grade circuit (3)
Connection；The grid of NMOS tube M14 and the grid of NMOS tube M15 are connected with local oscillation signal input negative terminal LO-；The NMOS
The drain electrode of pipe M14 is connected with the drain electrode of NMOS tube M16；Source electrode Jing electric capacity C6 and the NMOS tube of NMOS tube M15
The drain electrode connection of M2, is also connected with the source electrode of NMOS tube M16；The drain electrode of NMOS tube M15 and NMOS tube M15
Drain electrode connection；The grid of NMOS tube M16 is connected with local oscillation signal input positive terminal LO+, the drain electrode of NMOS tube M16
It is connected across resistance amplification grade circuit (3) with described；One end of the electric capacity C7 is connected with the drain electrode of NMOS tube M13, the other end
It is connected with the drain electrode of NMOS tube M16.
7. a kind of passive frequency mixer according to claim 6, it is characterised in that：It is described to include across resistance amplification grade circuit (3)
NMOS tube M17, NMOS tube M18, NMOS tube M19, NMOS tube M20, PMOS M21, PMOS M22, PMOS M23, PMOS
M24, resistance R7, resistance R8, auxiliary OP AMP unit B P, auxiliary OP AMP unit B N and common-mode feedback amplifier unit A1；The NMOS
The drain electrode of pipe M17 is connected respectively with the source electrode of NMOS tube M19 and the input of auxiliary OP AMP unit B P, the NMOS tube
The grid of the grid of M17 and NMOS tube M18 accesses bias voltage vb00, the source electrode and NMOS tube of NMOS tube M17
The source grounding of M18；NMOS tube M18 drain electrode respectively with the source electrode and auxiliary OP AMP unit B P of NMOS tube M20
Input connection；The source electrode of NMOS tube M19 is connected with the drain electrode of NMOS tube M13, the grid of NMOS tube M19
It is connected with the outfan of auxiliary OP AMP unit B P, the drain electrode of NMOS tube M19 connects with the drain electrode of PMOS M21
Connect, the source electrode of NMOS tube M20 is connected with the drain electrode of NMOS tube M16, the grid of NMOS tube M20 and the auxiliary
The outfan connection of amplifier unit B P, the drain electrode of NMOS tube M20 is connected with the drain electrode of PMOS M22；The PMOS
The drain electrode of pipe M21 is connected with signal output part Vout1, and its source electrode is connected with the drain electrode of PMOS M23；Its grid and the auxiliary
The outfan connection of amplifier unit B N；The drain electrode of PMOS M22 is connected with signal output part Vout2, its source electrode and PMOS
The drain electrode connection of pipe M24, its grid is connected with the outfan of auxiliary OP AMP unit B N；Auxiliary OP AMP unit B N it is defeated
Enter end to be connected with the drain electrode of PMOS M23 and PMOS M24 respectively；The grid of PMOS M23 and PMOS M24
Grid is connected, and the source electrode of PMOS M23 and the source electrode of PMOS M24 access voltage VDD；The common-mode feedback amplifier list
First A1 input positive terminals are connected by resistance R7 with the drain electrode of NMOS tube M19, also by resistance R8 and NMOS tube M20
Drain electrode connection；The input negative terminal of the common-mode feedback amplifier unit A1 accesses voltage VCM；The common-mode feedback amplifier unit A1's
Outfan is connected respectively with the grid of PMOS M23 and the grid of PMOS M24.
8. a kind of passive frequency mixer according to claim 7, it is characterised in that：Auxiliary OP AMP unit B P includes PMOS
BPM0, PMOS BPM1, PMOS BPM2, NMOS tube BPM3, NMOS tube BPM4, NMOS tube BPM5, NMOS tube BPM6, PMOS
BPM7PMOS BPM8, PMOS BPM9, PMOS BPM10, PMOS BPM11With PMOS BPM12；
NMOS tube BPM3Drain electrode be connected with the grid of NMOS tube M19, PMOS BPM4Drain electrode with it is described
The grid connection of NMOS tube M20, NMOS tube BPM3Grid and NMOS tube BPM4Grid access bias voltage vb1, institute
State NMOS tube BPM3Source electrode respectively with PMOS BPM1Drain electrode and NMOS tube BPM5Drain electrode connection；NMOS tube BPM4
Source electrode respectively with PMOS BPM2Drain electrode and NMOS tube BPM6Drain electrode connection；NMOS tube BPM5Grid and NMOS
Pipe BPM6Grid access bias voltage vb0, NMOS tube BPM5Source electrode and NMOS tube BPM6Source grounding；
PMOS BPM1Grid be connected with the drain electrode of NMOS tube M17, PMOS BPM2Grid with it is described
The drain electrode connection of NMOS tube M18, PMOS BPM1Source electrode and PMOS BPM1Source electrode with PMOS BPM0's
Drain electrode connection, PMOS BPM0Grid access bias voltage vb2, PMOS BPM0Source electrode respectively with it is described
PMOS BPM11Drain electrode and PMOS BPM12Drain electrode connection, PMOS BPM11Grid and PMOS BPM8
Drain electrode connection, PMOS BPM12Grid and PMOS BPM7Drain electrode connection, PMOS BPM11With
PMOS BPM12Source electrode access voltage VDD；
PMOS BPM7Drain electrode be connected with the grid of NMOS tube M19, PMOS BPM8Drain electrode with it is described
The grid connection of NMOS tube M20, PMOS BPM8Grid and PMOS BPM7Grid access bias voltage vb2, institute
State PMOS BPM7Source electrode and PMOS BPM9Drain electrode connection, PMOS BPM8Source electrode and the PMOS
BPM10Drain electrode connection, PMOS BPM9Grid and PMOS BPM10Grid access bias voltage vb2, it is described
PMOS BPM9Source electrode and PMOS BPM10Source electrode access voltage VDD.
9. a kind of passive frequency mixer according to claim 7 or 8, it is characterised in that：Auxiliary OP AMP unit B N includes
NMOS tube BNM0, NMOS tube BNM1, NMOS tube BNM2, PMOS BNM3, PMOS BNM4, PMOS BNM5, PMOS BNM6,
NMOS tube BNM7, NMOS tube BNM8, NMOS tube BNM9, NMOS tube BNM10, NMOS tube BNM11With NMOS tube BNM12；
NMOS tube BNM1Source electrode and NMOS tube BNM2Source electrode with NMOS tube BNM0Drain electrode connection, it is described
NMOS tube BNM1Grid be connected with the source electrode of NMOS tube M21, NMOS tube BNM2Grid and NMOS tube M22
Source electrode connection, NMOS tube BNM1Grid drain electrode and PMOS BNM3Source electrode connection, NMOS tube BNM2
Grid drain electrode and PMOS BNM4Source electrode connection；
NMOS tube BNM0Grid access bias voltage vb2, NMOS tube BNM0Source electrode respectively with the NMOS tube
BNM11Drain electrode and NMOS tube BNM12Drain electrode connection, NMOS tube BNM11Grid and PMOS BNM4Drain electrode
Connection, NMOS tube BNM12Grid and PMOS BNM3Drain electrode connection, NMOS tube BNM11Source electrode and
NMOS tube BNM12Source grounding；
PMOS BNM3Source electrode and PMOS BNM5Drain electrode connection, PMOS BNM4Source electrode with it is described
PMOS BNM6Drain electrode connection, PMOS BNM5Grid and PMOS BNM6Grid access bias voltage vb3,
PMOS BNM5Source electrode and PMOS BNM6Source electrode access voltage VDD, PMOS BNM3Grid and PMOS
Pipe BNM4Grid access bias voltage vb2, PMOS BNM3Drain electrode be connected with the grid of NMOS tube M21, institute
State PMOS BNM4Drain electrode be connected with the grid of NMOS tube M22；
NMOS tube BNM7Grid and NMOS tube BNM8Grid access bias voltage vb1, NMOS tube BNM7Leakage
Pole and PMOS BNM3Drain electrode connection, NMOS tube BNM8Drain electrode and PMOS BNM4Drain electrode connection, institute
State NMOS tube BNM7Source electrode and PMOS BNM9Drain electrode connection, NMOS tube BNM8Source electrode and the PMOS
BNM10Drain electrode connection, NMOS tube BNM9Grid and NMOS tube BNM10Grid access bias voltage vb0, it is described
NMOS tube BNM9Source electrode and NMOS tube BNM10Source grounding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621267884.8U CN206149215U (en) | 2016-11-23 | 2016-11-23 | Passive first detector |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621267884.8U CN206149215U (en) | 2016-11-23 | 2016-11-23 | Passive first detector |
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|---|---|
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107834980A (en) * | 2017-11-30 | 2018-03-23 | 广西师范大学 | Frequency mixer based on current multiplexing technology |
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2016
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107834980A (en) * | 2017-11-30 | 2018-03-23 | 广西师范大学 | Frequency mixer based on current multiplexing technology |
| CN107834980B (en) * | 2017-11-30 | 2024-02-13 | 广西师范大学 | Mixer based on current multiplexing technology |
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