CN206135874U - Input data validity detection circuitry with threshold value numerical control - Google Patents
Input data validity detection circuitry with threshold value numerical control Download PDFInfo
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- CN206135874U CN206135874U CN201621047569.4U CN201621047569U CN206135874U CN 206135874 U CN206135874 U CN 206135874U CN 201621047569 U CN201621047569 U CN 201621047569U CN 206135874 U CN206135874 U CN 206135874U
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Abstract
The utility model discloses an input data validity detection circuitry with threshold value numerical control, detection circuitry include bias circuit, first threshold value comparing element, the second threshold comparing element, bias circuit includes the resistance of two series connection, and the node between two resistance links to each other with data input interface, connects data input interface's node and is connected with first threshold value comparing element, the second threshold comparing element's first input end, first threshold value comparing element, the second threshold comparing element's second input is connected with a threshold voltage generation unit respectively, and first threshold value comparing element, the second threshold comparing element's output is connected with a data output interface respectively, the utility model discloses an apply signal voltage to data input interface carries out the comparison, and the next stage circuit judges whether equal to the output data of two data output interfaces to whether the input data who detects out data input interface is effective.
Description
Technical field
The utility model is related to integrated circuit fields, more particularly to a kind of inspection of the input data validity with threshold value numerical control
Slowdown monitoring circuit.
Background technology
Since mankind's nineteen forty-seven utility model transistor, semiconductor technology experienced silicon transistor, collection between more than 50 years
Into several generations such as circuit, super large-scale integration, very large scale integrations, development speed is soon that other industries are not had
's；Central processing unit refers to the part that computer-internal is processed data and is controlled to processing procedure, along with big
Scale integrated circuit technology is developed rapidly, and integrated chip density more and more higher, CPU can be integrated in a semiconductor chip
On, this LSI devices with central processing unit function are collectively referred to as " microprocessor "；Either record a video
The household appliances such as machine, intelligent washing machine, mobile phone, or car engine control, and Digit Control Machine Tool, guided missile precise guidance etc.
All kinds of different microprocessors will be embedded in；Microprocessor is not only the core component of microcomputer, is also various digitlizations
The critical component of smart machine.
And interface chip, it is that, for connecting a kind of electronic devices and components between microprocessor and memory, it includes number
According to the data buffer or bus buffer of temporary buffering, the bus driver for providing larger driving force for address signal etc.
Deng in brief, interface chip is for ensuring that the safety and stability of data transmission procedure.
However, during data transfer, the input interface of interface chip can cannot determine interface because of loose contact
Effectively whether, now, the output interface of interface chip but still can export the determination signal of " 0 " or " 1 " to the input data of chip,
And by the middle of its signal transmission to microprocessor；However, due to the loose contact of input interface, making the input data of interface chip
Real data can not be reflected, so as to the output data for causing interface chip is nonsensical.How interface chip is obtained
The validity of upper input data, so as to decide whether to accept and believe the output data on interface chip, becomes for people's research
Individual problem.
In digital circuit, digital circuit typically has three kinds of output states, is high level, low level and high-impedance state, wherein
High level is logical one, and low level is logical zero, and high-impedance state is equivalent to cut-off state；Wherein by logical one and logical zero group
Into binary signal, be the major way of current electronic chip data transfer inside, and if the input interface of interface chip
In the case of hanging or loose contact, high-impedance state will be formed, this is based on, if can carry out by the input of docking port chip
The test of high-impedance state obtaining the validity of input data on interface chip, so as to avoid cannot judging whether output data has
The technical problem of effect.
Therefore, it is necessary to provide the circuit that a kind of input energy detects input data validity.
Utility model content
The utility model is a kind of input data validation checking circuit with threshold value numerical control of offer that solves the above problems,
It is compared by the input voltage signal to Data Input Interface, output number of the next stage circuit to two data output interfaces
It is equal according to carrying out judging whether, so as to whether the input data for detecting Data Input Interface is effective.
For achieving the above object, the effect above is reached, the utility model is achieved through the following technical solutions：
A kind of input data validation checking circuit with threshold value numerical control, the detection circuit include biasing circuit, first
Threshold value comparing unit, Second Threshold comparing unit；Wherein biasing circuit includes the resistance of two series connection, between the resistances
Node is connected with Data Input Interface, the node and first threshold comparing unit, the first input end of Second Threshold comparing unit
Connection；First threshold comparing unit, Second Threshold comparing unit the second input respectively with a threshold voltage signal generating unit
Connection, first threshold comparing unit, the output end of Second Threshold comparing unit are connected to a data output interface, with this
The next stage circuit of detection circuit connection carry out judging whether by the output data to two data output interfaces it is equal, so as to
Detect whether the input data of Data Input Interface is effective.
As preferred, in order to detect circuit output state for high level, low level or high-impedance state, threshold voltage generation
Unit includes high threshold voltage signal generating unit, low threshold voltage signal generating unit, high threshold voltage signal generating unit, low threshold voltage
Signal generating unit is connected with digital interface control unit, transmits from high threshold voltage signal generating unit, low threshold voltage signal generating unit
The high and low level voltage threshold value come in is used as benchmark.
As preferred, the second input of first threshold comparing unit is connected into high threshold voltage signal generating unit, second
The second input connection low threshold voltage signal generating unit of threshold value comparing unit.
Used as preferred, data output interface includes the first data output interface, the second data output interface, the first number
It is connected with the output end of first threshold comparing unit according to output interface, the second data output interface and Second Threshold comparing unit
Output end connects.
As preferred, because the span of high and low level is two extreme, so the biasing circuit for producing takes centre
Scheme preferably, so making the resistance of two resistance equal, and makes one of resistance be connected with power supply during value, another resistance and
Ground connection, so that the bias voltage that intermediate node is produced is the median of circuit voltage.
Used as preferred, first threshold comparing unit, the first input end of Second Threshold comparing unit are in-phase end, first
Threshold value comparing unit, the second input of Second Threshold comparing unit are end of oppisite phase, i.e. first threshold comparing unit, Second Threshold
Comparing unit uses positive logic.
As preferred, control signal is received by digital interface control unit, generate high threshold voltage signal generating unit high
Level voltage threshold value, low threshold voltage signal generating unit generates low level voltage threshold value, and the node voltage between two resistance is less than
High level voltage threshold value, and more than low level voltage threshold value, i.e., high and low level voltage threshold value forms three voltage ranges, respectively
Three kinds of states of corresponding circuits output.
As preferred, in order to adapt to different working environment and demand, two resistance can equivalence replacement be two electric currents
Source, one of current source is connected with power supply, and another current source is connected to ground, the current direction of current source be power supply direction extremely
Ground, its objective is to produce bias voltage.
The beneficial effects of the utility model are：
A kind of input data validation checking circuit with threshold value numerical control, by the input voltage signal of docking port chip
It is compared, the next stage circuit being connected with the detection circuit is judged by the output data to two data output interfaces
It is whether equal, so as to whether the input data for detecting Data Input Interface is effective, so as to ensure the effective of data transmission procedure
Property, and can in time find when input interface occurs hanging or loose contact, it is to avoid because the insignificant signal conduct of collection
Failure caused by data institute.
Described above is only the general introduction of technical solutions of the utility model, in order to better understand skill of the present utility model
Art means, and being practiced according to the content of specification, with preferred embodiment of the present utility model and coordinate accompanying drawing detailed below
Describe in detail it is bright as after, specific embodiment of the present utility model is shown in detail in by following examples and its accompanying drawing.
Description of the drawings
Accompanying drawing described herein is used for providing further understanding to of the present utility model, constitutes the part of the application,
Schematic description and description of the present utility model is used to explain the utility model, does not constitute to of the present utility model improper
Limit.In the accompanying drawings：
Fig. 1 is the input data validation checking circuit with threshold value numerical control that the utility model first embodiment is related to
Physical circuit schematic diagram；
Fig. 2 is that the chip interface containing input data validation checking circuit of the utility model with threshold value numerical control is illustrated
Figure；
Fig. 3 is in the input data validation checking circuit with threshold value numerical control that the utility model first embodiment is related to
The schematic diagram of each position voltage；
Fig. 4 is the tool that the utility model second applies the input data validation checking circuit with threshold value numerical control that example is related to
Body circuit diagram；
Fig. 5 is the input data validation checking circuit with threshold value numerical control that the utility model 3rd embodiment is related to
Physical circuit schematic diagram；
Fig. 6 is the input data validation checking circuit with threshold value numerical control that the utility model fourth embodiment is related to
Physical circuit schematic diagram.
Wherein, 1 is high threshold voltage signal generating unit, and 2 is low threshold voltage signal generating unit, and 3 is digital interface control unit,
IN is Data Input Interface, and it is the second data output interface that A is the first data output interface, B, VSFor threshold value control interface, VCC
For the power supply of circuit, GND is earth terminal, R1-R2For resistance, IS1、IS2For current source, A1For first threshold comparing unit,
A2For Second Threshold comparing unit.
Wherein, the voltage of each position is described as follows in Fig. 3：VINFor input voltage, VbiasFor bias voltage, VA1+For first
Threshold value comparing unit A1The input voltage of in-phase end, VA1-For first threshold comparing unit A1The input voltage of end of oppisite phase, VA2+For
Two threshold value comparing unit A2The input voltage of in-phase end, VA2-For Second Threshold comparing unit A2The input voltage of end of oppisite phase, Vouta
For first threshold comparing unit A1Output voltage, VoutbFor Second Threshold comparing unit A2Output voltage, VrefhFor high threshold
Input voltage, VreflFor Low threshold input voltage.
Specific embodiment
Below with reference to the accompanying drawings and in conjunction with the embodiments describing the utility model in detail：
As shown in Figure 1 to Figure 3 for first embodiment of the present utility model, wherein Fig. 1 for first embodiment concrete electricity
Road schematic diagram；The detection circuit includes biasing circuit, first threshold comparing unit A1, Second Threshold comparing unit A2；Wherein bias
Circuit includes the resistance R of two series connection1、R2, resistance R1With the power supply V of circuitCCConnection, resistance R2Connect with earth terminal GND
Connect, in resistance R1、R2Between node be connected with Data Input Interface IN.
As shown in figure 1, first threshold comparing unit A1, Second Threshold comparing unit A2Use positive logic so that with data
The node of input interface IN and first threshold comparing unit A1, Second Threshold comparing unit A2First input end connection, and two
The first input end of comparing unit is in-phase end；Second input of two comparing units is end of oppisite phase, wherein first threshold
Comparing unit A1The second input connection high threshold voltage signal generating unit 1, Second Threshold comparing unit A2The second input connect
Low threshold voltage signal generating unit 2 is connect, meanwhile, high threshold voltage signal generating unit 1, low threshold voltage signal generating unit 2 and digital interface
Control unit 3 connects, and digital interface control unit 3 is to being externally connected with threshold value control interface VS；First threshold comparing unit A1,
Two threshold value comparing unit A2Output end be connected to the first data output interface A, the second data output interface B.
Wherein, by threshold value control interface VSThreshold control signal is transferred in digital interface control unit 3, so as to control
High threshold voltage signal generating unit 1 processed, low threshold voltage signal generating unit 2 generate respectively high level voltage threshold value Vrefh, low level electricity
Pressure threshold value Vrefl, wherein high level voltage threshold value VrefhIt is disposed proximate to but less than the lower limit of high level voltage, low level voltage
Threshold value VreflIt is disposed proximate to but more than the lower limit of low level voltage, resistance R1、R2Between node voltage less than high level electricity
Pressure threshold value Vrefh, and more than low level voltage threshold value Vrefl, that is, three voltage ranges are formed, respectively more than high level voltage threshold
Value VrefhInterval, in high level voltage threshold value VrefhWith low level voltage threshold value VreflBetween it is interval and less than low electricity
Flat voltage threshold VreflInterval, and respectively three kinds of states of corresponding circuits output.
Meanwhile, in order to ensure more preferably Detection results, make resistance R1、R2Resistance it is equal, and resistance R1、R2Resistance is very
Greatly, so as in the ideal case, the bias voltage V of generationbiasFor the power supply V of circuitCC1/2nd, and the biased electrical
Electric current very little on road so as to which the impact caused by the high and low level of input data is ignored.
In order to better illustrate the course of work of whole circuit, coordinate each position voltage schematic diagram such as in Fig. 3, data are defeated
Circuit analysis under the upper three kinds of forms of incoming interface IN is as follows：
（1）, when Data Input Interface IN state in which be high level when, VA1+ =VA2+=VIN=VIH（Input high level）,
VA1- =Vrefh, VA2-=Vrefl, due to VIH> VrefhAnd VIH> Vrefl, so that first threshold comparing unit A1Output voltage
Vouta, Second Threshold comparing unit A2Output voltage VoutbHigh level is, that is, the logical value for exporting is 1.
（2）, when Data Input Interface IN state in which be low level when, VA1+ =VA2+=VIN=VIL（Input low level）,
VA1- =Vrefh, VA2-=Vrefl, due to VIL<VrefhAnd VIL <Vrefl, so that first threshold comparing unit A1Output voltage
Vouta, Second Threshold comparing unit A2Output voltage VoutbLow level is, that is, the logical value for exporting is 0.
（3）, when Data Input Interface IN state in which is high-impedance state, be equal on Data Input Interface IN without outer
Connect, now, VA1+ =VA2+=Vbias, due to Vrefl < Vbias < Vrefh, so that first threshold comparing unit A1Output voltage
VoutaFor low level, Second Threshold comparing unit A2Output voltage VoutbFor high level, i.e. first threshold comparing unit A1Output
Logical value be 0, Second Threshold comparing unit A2The logical value of output is 1, and the logical value of two comparing unit outputs is unequal.
In sum, as first threshold comparing unit A1, Second Threshold comparing unit A2When the logical value of output is equal, number
According to the input data logical validity that input interface IN state in which is high level or low level, i.e. Data Input Interface IN, and
And logically export it is equal with input, therefore the next stage circuit being connected with the detection circuit take it is any in two output datas
One input data as the next stage circuit；As first threshold comparing unit A1, Second Threshold comparing unit A2Output
Logical value it is unequal when, Data Input Interface IN state in which be high-impedance state, the i.e. input data of Data Input Interface IN
Logic is invalid, therefore the next stage circuit being connected with the detection circuit stops accepting and believing the output data.
Fig. 4 is the physical circuit schematic diagram that the utility model second applies example, and the difference compared with first embodiment is：The
One threshold value comparing unit A1, Second Threshold comparing unit A2First input end be end of oppisite phase；First threshold comparing unit A1、
Second Threshold comparing unit A2The second input be in-phase end, when Data Input Interface IN state in which be high level when,
First threshold comparing unit A1, Second Threshold comparing unit A2The logical value of output is 0, when residing for Data Input Interface IN
When state is low level, first threshold comparing unit A1, Second Threshold comparing unit A2The logical value of output is 1, i.e. output is patrolled
Volume value with input logic value conversely, the next stage circuit being now connected with the detection circuit take it is any one in two output datas
, used as the input data of the next stage circuit, remaining is with reference to above-mentioned with regard to first embodiment for result after individual NAND gate computing
Description.
Fig. 5 for the utility model 3rd embodiment physical circuit schematic diagram, the detection circuit include biasing circuit, first
Threshold value comparing unit A1, Second Threshold comparing unit A2；Wherein biasing circuit includes the current source IS of two series connection1、IS2, electric current
Source IS1With the power supply V of circuitCCConnection, current source IS2It is connected with earth terminal GND, in current source IS1、IS2Between node
It is connected with Data Input Interface IN, i.e., the utility model 3rd embodiment is on the basis of first embodiment, by biasing circuit
On resistance R1、R2Replace with current source IS1、IS2, remaining is with reference to the above-mentioned description with regard to first embodiment.
Fig. 6 is the physical circuit schematic diagram of the utility model fourth embodiment, is on the basis of second embodiment, by partially
Resistance R on circuits1、R2Replace with current source IS1、IS2, remaining with reference to it is above-mentioned with regard to first embodiment, second embodiment,
The description of 3rd embodiment.
The above, preferred embodiment only of the present utility model not makees any formal to the utility model
Restriction；The those of ordinary skill of all industry can shown in by specification accompanying drawing and the above and swimmingly implement this practicality
It is new；But, all those skilled in the art are taken off in the range of without departing from technical solutions of the utility model using more than
The technology contents that show and a little change, modification and the equivalent variations for developing made, are Equivalent embodiments of the present utility model；
Meanwhile, the change of all above example is made any equivalent variations according to substantial technological of the present utility model, modify and drill
Become etc., still fall within the protection domain of the technical solution of the utility model.
Claims (8)
1. a kind of input data validation checking circuit with threshold value numerical control, it is characterised in that：The detection circuit includes biasing
Circuit, first threshold comparing unit, Second Threshold comparing unit；The biasing circuit includes the resistance of two series connection, two institutes
The node stated between resistance is connected with Data Input Interface, connects the node and the first threshold ratio of the Data Input Interface
Connect compared with the first input end of unit, Second Threshold comparing unit；The first threshold comparing unit, Second Threshold comparing unit
The second input be connected with a threshold voltage signal generating unit respectively, the first threshold comparing unit, Second Threshold compare
The output end of unit is connected to a data output interface, and the next stage circuit being connected with the detection circuit is to described in two
The output data of data output interface carry out judging whether it is equal, so as to whether the input data for detecting Data Input Interface has
Effect.
2. the input data validation checking circuit with threshold value numerical control according to claim 1, it is characterised in that：It is described
Threshold voltage signal generating unit includes high threshold voltage signal generating unit（1）, low threshold voltage signal generating unit（2）, the high threshold
Voltage generating unit（1）, low threshold voltage signal generating unit（2）With digital interface control unit（3）Connection.
3. the input data validation checking circuit with threshold value numerical control according to claim 2, it is characterised in that：It is described
The second input connection high threshold voltage signal generating unit of first threshold comparing unit（1）, the Second Threshold comparing unit
Second input connects low threshold voltage signal generating unit（2）.
4. the input data validation checking circuit with threshold value numerical control according to claim 1, it is characterised in that：It is described
Data output interface includes the first data output interface, the second data output interface, first data output interface and
The output end connection of one threshold value comparing unit, second data output interface connects with the output end of Second Threshold comparing unit
Connect.
5. the input data validation checking circuit with threshold value numerical control according to claim 1, it is characterised in that：Two
The resistance of the resistance is equal, and one of them described resistance is connected with power supply, and another described resistance is connected to ground.
6. the input data validation checking circuit with threshold value numerical control according to claim 1, it is characterised in that：It is described
First threshold comparing unit, the first input end of Second Threshold comparing unit are in-phase end, the first threshold comparing unit, the
Second input of two threshold value comparing units is end of oppisite phase.
7. the input data validation checking circuit with threshold value numerical control according to claim 2, it is characterised in that：By institute
State digital interface control unit and receive control signal, make the high threshold voltage signal generating unit（1）High level voltage threshold value is generated,
The low threshold voltage signal generating unit（2）Low level voltage threshold value is generated, the node voltage between two resistance is less than height
Level voltage threshold value, and more than low level voltage threshold value.
8., according to one of them described input data validation checking circuit with threshold value numerical control of claim 1 to 7, it is special
Levy and be：Two resistance can equivalence replacement be two current sources, one of them described current source is connected with power supply, another
The current source is connected to ground, and the current direction of the current source is power supply direction to ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621047569.4U CN206135874U (en) | 2016-09-10 | 2016-09-10 | Input data validity detection circuitry with threshold value numerical control |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621047569.4U CN206135874U (en) | 2016-09-10 | 2016-09-10 | Input data validity detection circuitry with threshold value numerical control |
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| Publication Number | Publication Date |
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| CN206135874U true CN206135874U (en) | 2017-04-26 |
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ID=58569029
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621047569.4U Expired - Fee Related CN206135874U (en) | 2016-09-10 | 2016-09-10 | Input data validity detection circuitry with threshold value numerical control |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110865261A (en) * | 2019-11-29 | 2020-03-06 | 国网四川省电力公司眉山供电公司 | Protection device outlet matrix calibrator and calibration method |
-
2016
- 2016-09-10 CN CN201621047569.4U patent/CN206135874U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110865261A (en) * | 2019-11-29 | 2020-03-06 | 国网四川省电力公司眉山供电公司 | Protection device outlet matrix calibrator and calibration method |
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Granted publication date: 20170426 Termination date: 20180910 |