CN205959974U - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
- Publication number
- CN205959974U CN205959974U CN201620971498.0U CN201620971498U CN205959974U CN 205959974 U CN205959974 U CN 205959974U CN 201620971498 U CN201620971498 U CN 201620971498U CN 205959974 U CN205959974 U CN 205959974U
- Authority
- CN
- China
- Prior art keywords
- resin layer
- insulating resin
- semiconductor device
- lead frame
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model provides a semiconductor device, this semiconductor device are the semiconductor device who has improved the high reliability of the resin associativity between insulating resin layer and the moulding resin. The utility model discloses a semiconductor device has: the lead frame, it comprises install the chip dish and outside terminal, insulating resin layer, it is disposed the lower surface at the lead frame, the heating panel, it is disposed the lower surface at insulating resin layer, the moulding resin, it is sealed that it carries out the resin to some of partly, the insulating resin layer of lead frame and heating panel, is formed with porous matter surface on insulating resin layer's surface, and the moulding resin of joint enters into insulating resin layer's porous matter. In addition, the particle diameter of the mixed stopping in the epoxy of moulding resin of size ratio of mixed stopping in insulating resin layer's epoxy is little.
Description
Technical field
This utility model is related to semiconductor device, pacifies particularly to the chip being configured with lead frame on insulating resin layer
Sabot and carried out the semiconductor device of resin seal using moulding resin.
Background technology
It is known that, conventionally, have being sealed to the lead frame and heat sink that are equipped with semiconductor chip using moulding resin
Semiconductor device.
For example, in patent documentation 1, disclose resin molded semiconductor device as follows：In this quasiconductor dress
In putting, the lead frame with chip mounting disc is formed by Cu material, is equipped with semiconductor chip in chip mounting disc, in order to
Guarantee thermal diffusivity and the insulating properties of semiconductor chip, be configured with across insulation board (insulating resin layer) at the back side of chip mounting disc
Al plate (heat sink), and using moulding resin, these parts are sealed.
【Patent documentation 1】：Japanese Unexamined Patent Publication 2009-283478 publication
In general, the thermal conductivity constituting the moulding resin of semiconductor device is not high compared with lead frame.Therefore, come
It is discharged into outside from the heating of semiconductor chip via lead frame (chip mounting disc), insulating resin layer and heat sink.
However, in the prior art, no doubt good from the viewpoint of cooling plate structure, but due to being by two kinds of resin structures
Become, the zygosity of therefore insulating resin layer and moulding resin is worrying.In addition, in the switch motion making to carry out high current and
In the case of the power semiconductor chip work of rectification, because the caloric value of chip is big, therefore there is insulating resin layer and molding
The peeling-off problem under the influence of thermal stress of resin.
Utility model content
Therefore, this utility model completes to solve above-mentioned problem, its object is to provide a kind of passing through to two
Plant the size setting difference of the inserts containing in resin and improve the resin-bonded between insulating resin layer and moulding resin
The semiconductor device of the high reliability of property.
In order to solve above-mentioned problem, this utility model becomes structure shown below.Semiconductor device of the present utility model
It is characterised by, it has：Lead frame, it is made up of chip mounting disc and outside terminal；Insulating resin layer, it is configured in
The lower surface of lead frame；Heat sink, it is configured in the lower surface of insulating resin layer；Moulding resin, it is to lead frame
A part for a part, insulating resin layer and heat sink carries out resin seal, is formed with porous on the surface of insulating resin layer
Matter surface, the moulding resin being engaged enters in the Porous of insulating resin layer.In addition, being blended in the epoxy of insulating resin layer
The particle diameter of the inserts in resin is less than the particle diameter of the inserts in the epoxy resin being blended in moulding resin.
This utility model due to being above such composition, therefore, it is possible to provide one kind to improve insulating resin layer and molding
The semiconductor device of the high reliability of the resin-bound between resin.
Brief description
Fig. 1 is the sectional view of the interior sight structure of the semiconductor device representing embodiment 1 of the present utility model.
Fig. 2 is that the partial enlargement between the chip mounting disc of the semiconductor device representing embodiment 1 of the present utility model cuts open
View.
Fig. 3 is that the partial enlargement of the chip mounting disc end of the semiconductor device representing embodiment 1 of the present utility model cuts open
View.
Label declaration
1：Semiconductor device；2：Lead frame；21、22：Chip mounting disc；23、24：Outside terminal；3：Insulating resin layer；
31：Inserts (insulating resin layer)；4：Radiator；5：Moulding resin；51：Inserts (moulding resin)；6：Semiconductor chip；7：
Wire rod.
Specific embodiment
Hereinafter, it is described in detail to for implementing mode of the present utility model referring to the drawings.But, this utility model
It is not subject to any restriction of following contents.
The semiconductor device 1 of embodiment 1 of the present utility model is illustrated.Fig. 1 is the interior sight representing semiconductor device 1
The sectional view of structure.Fig. 2 and Fig. 3 be semiconductor device 1 chip mounting disc between and chip mounting disc end partial enlargement
Figure.
As shown in figure 1, semiconductor device 1 is by lead frame 2, insulating resin layer 3, heat sink 4 and plastic film resin 5
The resin molded semiconductor device constituting.
Lead frame 2 by upper surface be equipped with semiconductor chip 6 chip mounting disc 21,22 and with chip mounting disc
21st, the outside terminal 23,24 that 22 configured separate and a part project from moulding resin 5 is constituted.The chip mounting disc of lead frame 2
21 and chip mounting disc 22 be configured to be separated from each other.For example, lead frame 2 is formed by high copper coin of thermal conductivity etc..
By wire bonding, will be electric to the upper surface (electrode) of semiconductor chip 6 and outside terminal 23,24 using wire rod 7 grade
Connect.
One surface of insulating resin layer 3 is engaged with the lower surface of lead frame 2.Another surface of insulating resin layer 3
Engage with the upper surface of heat sink 4.Here, insulating resin layer 3 has the function of insulating properties and caking property.For example, employ ring
The less insulating resin layer of particle diameter of oxygen tree lipid and inserts.Inserts are normally contained in resin, also referred to as fill material
Material.
Moulding resin 7 cover lead frame 2 chip mounting disc 21,22, semiconductor chip 6, wire rod 7, lead frame 2
Outside terminal 23,24 and heat sink 4.For example, the particle diameter employing epoxy resin and inserts is than insulating resin layer 3
Big moulding resin.
Here, due to outside terminal 23,24 and external electrical connections, therefore protruding to the outside from the side of moulding resin 7.Separately
Outward, heat sink 4 is the metallic plates such as aluminum, and a surface is used for radiating, and therefore the lower surface from moulding resin 7 exposes.
As manufacture method, the insulating resin layer 3 (epoxy resin) of semi-molten state is coated on heat sink 4.Will
The chip mounting disc 21,22 of lead frame 2 is pressed on insulating resin layer 3 so as to be trapped in insulating resin layer 3.
Become the assembly after lead frame 2 and heat sink 4 being combined via insulating resin layer 3.This assembly is pacified
Dress semiconductor chip 6, and engage wire rod 7.Connect it is also possible to first implementing chip and installing with lead in the state of only framework
Close.
Then, using molding die, assembly is molded with resin.Now, the insulating resin layer 3 of semi-molten state with
The resin mould 5 of molten condition contacts.Afterwards, take out from molding die.Assembly becomes using moulding resin 5 tree
The form of the semiconductor device of fat sealing.
As effect, with mixing in moulding resin 5 (containing) inserts 51 particle diameter compared with, mixed in insulating resin layer 3
Close (containing) inserts 31 particle diameter less.So that both resins is contacted with semi-molten state to molten condition, and make them
Hardening.Now, difference is provided with to the size of the inserts containing in two kinds of resins.Inserts grain due to insulating resin layer 3
Footpath is less, and therefore in the near surface of insulating resin, apparent condition becomes Porous and formed concavo-convex.
In transfer molding (transfer mold) operation, the moulding resin using epoxy resin is sealed.This
When, due to defining Porous surface on the surface of insulating resin layer, the therefore insulating resin layer of Porous can enter mould
Mould resin.Enter moulding resin by making the Porous surface of insulating resin layer, be obtained in that the grappling and moulding resin between
Effect.
As effect, under the interaction of resin, insulating resin layer 3 enters moulding resin 5 on the contact surface, creates
Anchoring Effect.Due to making the surface area of engagement between insulating resin layer 3 and moulding resin 5 increase, make resin-bound firmly, because
This bond strength improves.
Even if in addition, it is also possible to prevent because of insulation in the case that the caloric value of the transient state from semiconductor chip 6 is larger
Thermal expansion difference between resin bed and moulding resin layer and the interlaminar resin that produces is peeled off.Make insulating resin layer thereby, it is possible to provide
The semiconductor device of the high reliability that the resin-bound and moulding resin between improves.
Although describing for implementing mode of the present utility model as described above, those skilled in the art obviously can
Multiple alternative embodiments and embodiment are realized according to content disclosed above.
In the structure of fig. 1, the structure of lead frame is set to symmetrical, but can be according to the work(of semiconductor device
Can, become the unsymmetric structure of the chip mounting disc being provided with the different lead frame in left and right.In addition, chip mounting disc can also
It is one.
In addition, when the chip mounting disc by lead frame is pressed on insulating resin layer it is also possible to make its deeper earth subsidence
Enter in insulating resin layer 3.As shown in Fig. 2 becoming such form：Insulating resin layer is heaved and is become convex, and adjacent
The contacts side surfaces of chip mounting disc end, spread to the position in portion more top than the semiconductor-chip-mounting face of chip mounting disc.
Thereby, it is possible to improve the associativity of lead frame and insulating resin layer further.
Claims (3)
1. a kind of semiconductor device it is characterised in that
This semiconductor device has：
Lead frame, it is made up of chip mounting disc and outside terminal；
Insulating resin layer, it is configured in the lower surface of described lead frame；
Heat sink, it is configured in the lower surface of described insulating resin layer；
Moulding resin, a part for its part, described insulating resin layer and described heat sink to described lead frame is entered
Row resin seal,
It is formed with Porous surface on the surface of described insulating resin layer, the described moulding resin being engaged enters into described insulation
In the Porous of resin bed.
2. semiconductor device according to claim 1 it is characterised in that
The particle diameter being blended in inserts in the epoxy resin of described insulating resin layer is than the epoxy being blended in described moulding resin
The particle diameter of the inserts in resin is little.
3. semiconductor device according to claim 1 and 2 it is characterised in that
Described lead frame has the described chip mounting disc of multiple configured separate, between adjacent described chip mounting disc
Described insulating resin layer heave and be formed as convex.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016015365A JP2017135310A (en) | 2016-01-29 | 2016-01-29 | Semiconductor device |
| JP2016-015365 | 2016-01-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205959974U true CN205959974U (en) | 2017-02-15 |
Family
ID=57980497
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620971498.0U Active CN205959974U (en) | 2016-01-29 | 2016-08-29 | Semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2017135310A (en) |
| CN (1) | CN205959974U (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6815207B2 (en) * | 2017-01-19 | 2021-01-20 | 日立オートモティブシステムズ株式会社 | Power semiconductor devices and their manufacturing methods |
-
2016
- 2016-01-29 JP JP2016015365A patent/JP2017135310A/en active Pending
- 2016-08-29 CN CN201620971498.0U patent/CN205959974U/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2017135310A (en) | 2017-08-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |