CN205941915U - Radio frequency subsystem - Google Patents

Abstract

The utility model discloses a radio frequency subsystem relates to satellite navigation testing arrangement technical field. Radio frequency subsystem includes frequency conversion module on a plurality of, power module, crystal oscillator and combiner, it is connected with the intermediate frequency signal output of intermediate frequency signal modulation subsystem to go up frequency conversion module's input, power module with need the power input end of the module of power supply to connect among the radio frequency subsystem for provide working power supply for it, the output of going up frequency conversion module with the input of combiner is connected, the output of combiner does radio frequency subsystem's signal output part. Radio frequency subsystem is used for receiving the intermediate frequency signal of intermediate frequency signal modulation subsystem output to be radiofrequency signal with the intermediate frequency signal up -conversion, and with intermediate frequency signal modulation subsystem and host computer cooperation, test satellite navigation receiver, and the test is simple, convenient nimble, portable easy -to -use.

Description

Radio Frequency Subsystem

Technical field

The utility model is related to satellite navigation test device technical field, more particularly, to a kind of Radio Frequency Subsystem.

Background technology

Beidou satellite navigation system is the regionality active three-dimensional satellite positioning and communication system that China voluntarily develops (CNSS) it is, except the 3rd ripe satellite navigation system after the global positioning system (GPS) of the U.S., Muscovite GLONASS System.This system round-the-clock in the world, round-the-clock can provide high accuracy, highly reliable positioning, navigate, award for all types of user When service, and have short message communication capacity concurrently.The foundation of this system, for promoting China's satellite navigation industrial chain to be formed, forms Perfect national satellite navigation application industry supports, popularization and security system tool are of great significance.

Continue China in 2011, three big-dipper satellites were sent into after the predetermined transfer orbit of space by " No. three first of the Long March " carrier rocket, On 2 25th, 2012, the 11st Beidou navigation satellite of China was in Xichang Launching Site by " Long March No. three third " delivery fire Arrow is successfully introduced into the predetermined transfer orbit of space.According to the development strategy of Beidou satellite navigation system " three-step-march ", China in 2012 Launch 5 Beidou navigation networking satellites successively, with continuous increase coverage domain, lift system service performance.

Beidou satellite navigation system on December 27th, 2011 starts to provide continuous navigator fix to China and surrounding area With time service service, since operation, system working stability, some technical indicators exceed expection, and such as positioning precision is contemplated to be 25 meters, but Actual test finds substantially to reach 20 meters in the whole service area providing trial operation, and some areas can reach 10 meters of left sides Right；To the end of the year 2012, Beidou satellite navigation system will complete Asia-Pacific networking, form the service ability covering the Asian-Pacific area, when the time comes Commencement of commercial operation service will be provided, its service precision will reach 10 meters about；To about the year two thousand twenty, will build up by more than 30 satellites The Beidou satellite navigation system of composition, provides high accuracy covering the whole world, highly reliable positioning, navigation and time service service.

Beidou satellite navigation system with China's independent development progressively goes up to the sky, and a large amount of Beidou satellite receivers are attached to portion In team's equipment.By global positioning receiver and the integrated navigation and location such as gyro, inertial navigation, fight, train ensureing The aspects such as the positioning assembly of group, precision strike, attitude measurement, control commander have played the effect that can not be substituted.As：Unmanned Global positioning receiver is installed on machine, global positioning receiver is used cooperatively with unmanned plane automatic pilot, realizes Guiding to unmanned plane difference air route section, also can achieve Deep space tracking of unmanned plane etc.；Global positioning satellite is loaded on radar Receiver, achievable radar is accurately positioned, orients；When artilleryman fights, it is possible to use global positioning receiver, realize To the accurate navigation of cannon, the fine sight of impact point is hit, and assist headquarter's unified command, scheduling networking cannon Deng；Guided missile loads global positioning receiver, can accurately guide guided missile that impact point is attacked, greatly improve and lead The hit rate of bullet；In C4ISR system, using the precision time service function of global positioning receiver, all arms, each can be made System, operating synchronization of each weapon etc..

But, the signal that global positioning receiver need to receive many aeronautical satellites in open field simultaneously just enables Positioning, this this kind equipment regular maintenance especially prewar is prepared required Function detection, performance verification and assessment, fault detect with Positioning, quick guarantee maintenance etc. are caused very big adverse effect and are filled using the weapon of global navigation satellite positioning it is difficult to ensure Standby hidden deposit, quickly launch an attack, quickly the fight such as navigation require.

Utility model content

Technical problem to be solved in the utility model is to provide a kind of Radio Frequency Subsystem, for receiving intermediate frequency signal modulation The intermediate-freuqncy signal of subsystem output, and intermediate-freuqncy signal is up-converted to radiofrequency signal, and with intermediate-freuqncy signal mod subsystem and Host computer coordinates, and satellite navigation receiver is tested, and tests simple, convenient, flexible, portable easy-to-use.

For solving above-mentioned technical problem, technical solution adopted in the utility model is：A kind of Radio Frequency Subsystem, its feature It is：Including several up-converter modules, power module, crystal oscillator and combiner, the input of described up-converter module and intermediate frequency The intermediate-freuqncy signal output end of signal modulation subsystem connects, and needs the mould powered in described power module and described Radio Frequency Subsystem The power input of block connects, for providing working power, the output end of described up-converter module and described combiner for it Input connects, and the output end of described combiner is the signal output part of described Radio Frequency Subsystem, and described crystal oscillator is described radio frequency Subsystem provides work clock, described up-converter module and combiner to be controlled by intermediate-freuqncy signal mod subsystem.

Further technical scheme is：Described up-converter module includes microcontroller, LO module, I/Q modulator, filtering The intermediate frequency letter of device, AGC module and attenuation network module, the signal input part of described I/Q modulator and intermediate-freuqncy signal mod subsystem Number output end connects, input termination crystal oscillator input, the output end of described LO module and the described I/Q modulator of described LO module Control end connects, the input of the output end of described I/Q modulator filtered device, AGC module and described attenuation network module successively Connect, the output end of described attenuation network module is RF signal output, the control output end of described microcontroller respectively with The control end of described LO module and attenuation network module connects, and described microcontroller is connected with intermediate-freuqncy signal mod subsystem, The control command of receiving intermediate frequency signal mod subsystem output.

Further technical scheme is：Described AGC module includes level detector, LPF module, comparator, controls electricity Pressure generation module and VGA module, the output end of described level detector is produced through described LPF module, comparator, control voltage successively Raw circuit is connected with the control end of described VGA module, and the input of described VGA module terminates input voltage, described VGA module defeated Go out end and be divided into two-way, the first via is voltage output end, the second tunnel is connected with the input of described level detector, described comparator One input termination reference voltage.

Have the beneficial effects that using produced by technique scheme：Described Radio Frequency Subsystem is used for receiving intermediate frequency signal and adjusts The intermediate-freuqncy signal of subsystem output, and intermediate-freuqncy signal is up-converted to radiofrequency signal, and with intermediate-freuqncy signal mod subsystem with And host computer cooperation, satellite navigation receiver is tested, is capable of the many of the satellite navigation system such as the analog simulation Big Dipper, GPS Individual frequency RF output, signal output precision is better than actual satellite navigation signals；Random time, anywhere can be simulated visual The Big Dipper, the satellite navigation emulation signal of GPS system；Can simulate and generate different load according to typical weaponry kinetic characteristic Navigation satellite signal under body varying environment.Also real movement locus, simulation output satellite-signal can be loaded into, realize to navigation The closed loop checking of alignment system performance；According to different application scenarios, position error factor and its big I are arranged；Can be online The test dynamic response capability of satellite positioning receiver, signal receiving sensitivity, positioning precision, timing accuracy, velocity accuracy, fixed Multiple receiver technical indicators such as position turnover rate, starting time, and output test result；Fault diagnosis navigates to satellite navigation and connects The replaceable units of receipts machine.

Brief description

With reference to the accompanying drawings and detailed description the utility model is described in further detail.

Fig. 1 is the theory diagram of test platform described in embodiment；

Fig. 2 is the theory diagram of embodiment intermediate-freuqncy signal generation module；

Fig. 3 is the theory diagram of power module in embodiment intermediate-freuqncy signal generation module；

Fig. 4-Fig. 8 is the circuit theory diagrams of the first to the 5th independent power source module in embodiment power module；

Fig. 9 is the theory diagram of DSP+FPGA in embodiment；

Figure 10 is the theory diagram of Radio Frequency Subsystem in the utility model embodiment；

Figure 11 is the theory diagram of signal up-converter module in embodiment；

Figure 12 is the theory diagram of AGC module in embodiment.

Specific embodiment

With reference to the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out clearly Chu, it is fully described by it is clear that described embodiment is only a part of embodiment of the present utility model, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of making creative work The every other embodiment being obtained, broadly falls into the scope of the utility model protection.

Elaborate a lot of details in the following description in order to fully understand the utility model, but this practicality is new Type can also be different from alternate manner described here to implement using other, and those skilled in the art can be without prejudice to this reality With doing similar popularization in the case of new intension, therefore the utility model is not limited by following public specific embodiment.

Overall, be illustrated in figure 1 a kind of satellite navigation receiver test platform, including intermediate-freuqncy signal mod subsystem, Radio Frequency Subsystem and host computer, are provided with test software and control software in described host computer.Described host computer and IF Modulation Connected by pci interface between subsystem, the intermediate-freuqncy signal output end of described IF Modulation subsystem and described Radio Frequency Subsystem Signal input part connect, the radio frequency letter of the RF signal output of described Radio Frequency Subsystem and tested satellite navigation receiver Number input connects, and is attached by serial ports between described tested satellite navigation receiver and described host computer.

By the analysis and research to user type, user movement track and attitude, position error, battlefield navigational environment etc., Set up typical user model, error model and use scene.Signal scene generating module in simulation test application software Generate different scene environment, according to specified position (longitude, latitude and height), the time specified and cycle and corresponding The specific satellite information of ephemeris file generated, including each satellites in view satellite navigation data within a specified time, power electricity Gentle Doppler frequency shift etc..It is separately added into the satellite constellation of the Big Dipper, GPS system, realize multi-satellite navigation system real-time simulation Ability.Using modular structure, possess expandability, can add as needed to other receiver of satellite navigation system Test.

Described host computer is used for being responsible for man-machine interaction, according to set constellation orbital, signal structure, carrier movement state, The simulation calculation such as propagated error various signal condition parameter and navigation message, produce base band level data output, and are sent in real time Intermediate-freuqncy signal mod subsystem；Intermediate-freuqncy signal mod subsystem is responsible for completing band spectrum modulation, subcarrier modulation and the load of each signal Ripple is modulated, and realizes the precise control of Doppler, code phase, carrier phase and relative level, and the modulation of multipath signal and control System, and after combining, generate the analog if signal output specified；Radio Frequency Subsystem is responsible for up-converting the signals to the frequency specified, Carry out Power Control, and exported to tested satellite navigation receiver by coaxial cable or antenna after RF switch combining.

Described test platform is capable of multiple frequency RF outputs of the satellite navigation system such as the analog simulation Big Dipper, GPS, and signal is defeated Go out precision and be better than actual satellite navigation signals；Random time, the visual Big Dipper of anywhere, the satellite of GPS system can be simulated Navigation simulation signal；The navigation generating under different carriers varying environment can be simulated according to typical weaponry kinetic characteristic Satellite-signal.Also real movement locus, simulation output satellite-signal can be loaded into, realize the closed loop to navigation positioning system performance Checking；According to different application scenarios, position error factor and its big I are arranged；Being capable of on-line testing satellite positioning receiver Dynamic response capability, signal receiving sensitivity, positioning precision, timing accuracy, velocity accuracy, positioned update rate, starting time Etc. multiple receiver technical indicators, and output test result；Fault diagnosis navigates to the replaceable units of satellite navigation receiver.

Intermediate-freuqncy signal mod subsystem includes several intermediate-freuqncy signal generation modules, the side of intermediate-freuqncy signal generation module design Case adopts PCI+DSP+FPGA+DAC framework.Host computer generates during Satellite Observations and navigation message be transferred to through pci interface Frequency signal generator module, intermediate-freuqncy signal generation module synthesizes digital medium-frequency signal according to Satellite Observations and navigation message, enters Analog if signal is exported after row digital-to-analogue conversion.Further, as shown in Fig. 2 described intermediate-freuqncy signal generation module includes PCI and connects Mouth module, FPGA module, DSP module, DAC module, SRAM module and power transfer module, described pci interface module and institute State FPGA module to be bi-directionally connected, for realizing the data interaction of described intermediate-freuqncy signal generation module and described host computer.

In described intermediate-freuqncy signal generation module, the annexation of modules is as follows：Described DSP module and described FPGA mould Block is bi-directionally connected；DAC module is connected with the signal output part of described FPGA module；DSP module is two-way with described Radio Frequency Subsystem Connect；Described FPGA module is used for completing the generation of signal, realizes the interaction of workflow data；It is right that described DSP module is used for The data that host computer transmission comes is processed, and calculates the control word generating needed for intermediate-freuqncy signal；Described DAC module is controlled by described FPGA module, is used for realizing digital-to-analogue conversion and up-conversion；Need to supply in described power transfer module and described signal generator module The power input of the module of electricity connects, for providing working power for it；Described SRAM module is two-way with described FPGA module Connect, for data cached.

Signal transacting：Using FPGA+DSP+DAC structure, DSP major function is to calculate the control generating needed for intermediate-freuqncy signal Word；The function of FPGA is to complete signal to produce, including pseudo noise code generation, carrier wave generation, band spectrum modulation, carrier modulation, combining With SECO etc., that is, ensure the workflow data interaction in whole intermediate frequency source；The control of DA to be completed by FPGA, realizes number Mould conversion and two functions of up-conversion.

Data processing：To be completed by DSP, process to as if the packet that transmits from host computer (includes each satellite channel Observation data and navigation message information), the function of realization is that satellitosis observation data is changed into some control words, these controls Word processed passes to the generation for control signal for the FPGA.

Signal produces：To be completed by FPGA, by reading the control word that DSP is transferred in SRAM, to realize intermediate-freuqncy signal Synthesis, at the data signals such as carrier wave NCO, code NCO, spectrum-spreading code generator, band spectrum modulation, carrier modulation, signal combiner Reason function.

SECO：It is also to be completed by FPGA.The realization of intermediate-freuqncy signal be required to meet host computer real-time transmission data, DSP real-time processing data, FPGA produce signal in real time, need a public control between host computer, DSP and FPGA three Molding block does not collide with each other in real time ensureing between various pieces that workflow meets, and SECO is exactly such control mould Block.

The function that DAC module is realized is that digital medium-frequency signal is changed into analog if signal, and also will realize to mould Intend the up-conversion of intermediate-freuqncy signal.

FPGA：From the XC6VLX240T-1FFG1156 in the V6 series of XILINX company, its dominant frequency is about 600M, The Block RAM of 37680 Slice, about 15Mb, 768 DSP48E, various resources are very abundant.In this problem, each intermediate frequency Plate needs at most to provide two frequency bins totally 36 passages generation Pseudolite signals, and resource requirement ratio is larger, and such chip can meet The demand of problem.

DSP：From the TMS320C6713B-225 chip of TI company, highest arithmetic speed reaches 1200MIPS.This problem In, the function of dsp chip is to calculate the data that host computer transmits, and result of calculation is stored specified location.Due to general Dsp chip can complete this functionality, so we have selected the very familiar a dsp chip in laboratory TMS320C6713B-225, saves development time and cost.

SRAM：From the IS61WV102416BLL chip of ISSI company, such chip can be managed with the 2.5V IO of FPGA Pin is joined directly together without voltage conversion chip, and Read-write Catrol (DDR) relatively is simple.The memory space of 16Mb is entirely capable of meeting The needs (needing the total amount of data of storage to be less than 5Mb) of caching.

DAC：AD9779A is a 16 high speed wide dynamic ranges DAC that Analog Device company produces, sample rate 1Gsps is it is allowed to the multicarrier of up to nyquist frequency generates.It is novel that 2X, 4X, 8X interpolation device/coarse adjustment complex modulator can Carrier wave to be placed on any position in DAC bandwidth, operating voltage 1.8～3.3V, power consumption 1W during sample rate 1Gsps.

PXIE cabinet：From the PXIe-1075 cabinet of NI company, including 8 PXIE slots, 8 PXIE or PXI mixing are inserted Groove, 1 system clock slot, 1 PXIE control module, support PXI, PXIE, Compact PCI and Compact PCIE interface Module.Containing 4 PCIE Switch, each Switch passes through the LINK of 1 X4 PCIE with 4 or 5 peripheral slot phases Even, each slot is supported to be up to the transmission bandwidth of 1GB/S.If multiple equipment is connected in a PCIE Switch, they are shared The transmission bandwidth of 1GB/S.

Power conversion chip：Because the I/O pin signal of DSP and DAC is 3.3V level, and it is 2.5V that FPGA obtains IO voltage, It is thus desirable to power conversion chip carries out level conversion.From the SN74CB3T16211 of TI company, 2.5V single-ended power, power supply Consumption electric current is 70uA.The 3.3V high level output signal of DSP can be converted into 2.3V about voltage to FPGA, the 2.5V of FPGA Export can be converted into 2.2V about export to DSP, meet DSP high level minimum input voltage (>=2V) require.

Intermediate-freuqncy signal generation module is to be embedded in the form of board in NI PXIE-1075 cabinet, is carried for it by cabinet slot Power supply source inputs, from 3.3V/6A and 12V/4A as power input it should be noted that the power that is provided that of each slot Greatly 38.25W.According to the power consumption analysis result of chip, the powering solution of proposition is as shown in Figure 3.Wherein 12V to 3.3V/ During 2.5V/1V conversion, pressure reduction is larger, and all ratios of the supply current needed for chip are larger, therefore selects Switching Power Supply DC-DC.And 3.3V Turn 1.2V/1.8V pressure reduction less, and needed for chip, supply current is all less, therefore select linear stable.In power module each The circuit theory diagrams of independent power source module are as shown in Fig. 4-Fig. 8.

As shown in figure 3, described power module includes the first to the 5th independent power source module, described first independent power source module and The input termination 12V input power of two independent power source modules, the output voltage of described first independent power source module is 2.5V, first point of electricity The output end of source module is divided into two-way, and the first via is connected with the power input of the second independent power source module, and the second tunnel is with FPGA's One power input connects, and the output voltage of described second independent power source module is 1V, the power supply of described second independent power source module Output end is connected with a power input of FPGA；The input termination 12V input power of the 3rd independent power source module, the 3rd point of electricity The output voltage of source module is 3.3V, and the power output end of the 3rd independent power source module is connected with a power input of DSP；The The input termination 3.3V power supply of the four and the 5th independent power source module, the output voltage of the 4th independent power source module is 1.2V, the 4th point of electricity The output end of source module is divided into two-way, and the first via is connected with a power input of DSP, a power supply of the second tunnel and FPGA Input connects；The output voltage of the 5th independent power source module is 1.8V, and the output end of the 5th independent power source module is produced with intermediate-freuqncy signal In raw module, the power input of the module in addition to FPGA and DSP connects.

As shown in figure 4, described first independent power source module includes PTR08100W type power supply chip U35,1 pin of described U35 hangs Sky, 2 pin of described U35 connect 12V input power, and electric capacity C258 is connected in parallel between the input of power supply and ground, 3 pin of described U35 Ground connection, 5 pin of described U35 are grounded through resistance R180；4 pin of described U35 are divided into three tunnels, and the first via is grounded through electric capacity C256, the Two tunnels are grounded through electric capacity C257, and the 3rd tunnel is divided into three tunnels after connector J8 again, and the first via is successively through resistance R178 and luminous two It is grounded after pole pipe D21, the second tunnel is a power output end of described first independent power source module, the 3rd tunnel is described first part of electricity Another power output end of source module, two output voltages of described first independent power source module are 2.5V；

As shown in figure 5, described second independent power source module includes PTH04T240W type power supply chip U36, described U36 1,3, 4th, 7 pin ground connection, 2 pin of described U36 are connected with a power output end of described first independent power source module, 5 pin of described U36 with 6 pin are divided into two-way, and the first via is grounded through electric capacity C261, and the second tunnel connects 9 pin of described U36,8 pin of described U36 through resistance R175 Through resistance R181 ground connection；10 pin of described U36 are connected with 2 pin of described U36, and the power input of described U36 is parallel with electric capacity 11 pin of C259 and electric capacity C260, described U36 are hanging, and the node of resistance R175 and electric capacity C261 is divided into two-way, and the first via is through electricity Hold C262 ground connection, the second tunnel is divided into two-way after connector J9 again, and the first via is a power supply of described second independent power source module Output end, the second tunnel is another power output end of the second independent power source module；

As shown in fig. 6, described 3rd independent power source module includes TPS73801 type power supply chip U39,1 pin of described U39 connects 12V input power, filter capacitor C269 is connected in parallel on the power input of described U39, and 3 pin of described U39 and 6 pin are grounded, institute 5 pin stating U39 meet VCC, and 2 pin of described U39 are divided into three tunnels, and the first via is grounded successively after resistance R184, resistance R187, and second Road is grounded after electric capacity C268, and the 3rd tunnel is divided into two-way after plug J12, and the first via is the electricity of described second independent power source module Source output terminal, the second tunnel is grounded successively after resistance R185, light emitting diode D23；

As shown in fig. 7, described 4th independent power source module includes ADP1740 type power supply chip U37, the 1-4 pin of described U37 with And 15-16 pin is divided into two-way, the first via connects 3.3V input power, and the second tunnel connects 1.2V input power, 3.3V electricity through resistance R182 Source input is provided with filter capacitor C263, and 5 pin of described U37 connect 1.2V input power, and 6 pin of described U37 are grounded, described It is grounded after the 7 foot meridian capacitor C265 of U37,8 pin of described U37 are hanging, and the 9-11 pin of described U37 is connected with 12 pin of described U37, 12 pin of described U37 are divided into two-way, and the first via is connected with 13 pin of described U37 and 14 pin respectively, and the second tunnel is after plug J10 It is divided into two-way, the first via is a power output end of described 4th independent power source module, the second tunnel is described 4th independent power source mould Another power output end of block；

As shown in figure 8, described 5th independent power source module includes LT1963A type power supply chip U34,5 pin of described U34 and 8 Pin is connected in power input, and described electric capacity input is provided with filter capacitor C254, and 4 pin of described U34 are hanging, described U34's 3rd, 6,7 pin ground connection, 2 pin of described U34 are connected with 1 pin, and 1 pin of described U34 is divided into three tunnels, and the first via is grounded through electric capacity C255, Second tunnel is grounded successively after resistance R176 and light emitting diode D20, and the 3rd tunnel is that the power supply of described 5th independent power source module is defeated Go out end.

Intermediate-freuqncy signal generation module is completed based on DSP+FPGA, as shown in figure 9, DSP deposits including control word Device module, code NCO control word generation module, satellite number and chip select control word generation module, navigation message generation module, width Degree control word generation module and carrier wave NCO control word generation module；FPGA includes yard NCO generation module, frequency divider, a spreading code Generation module, subcarrier generation module, counter, FIFO generation module, band spectrum modulation module, carrier wave NCO generation module and just Hand over modulation module, the output end of described control word register module respectively with described code NCO control word generation module, satellite number and Chip selects the input of control word generation module, navigation message generation module, amplitude control words generation module to connect, described code The output end of NCO control word generation module is connected with the input of described frequency divider through described code NCO generation module, described defends Asterisk and chip select the output end of control word generation module to be connected with the input of described spreading code generation module, described frequency dividing One output end of device is connected with an input of described spreading code generation module, another output end warp of described frequency divider Described subcarrier generation module is connected with an input of described band spectrum modulation module, an output of spreading code generation module End is connected with an input of described band spectrum modulation module, and another output end of described spreading code generation module is through described meter Number devices are connected with an input of described fifo module, the output end of described navigation message generation module and described fifo module Input connect, the output end of described fifo module is connected with an input of described band spectrum modulation module, described The output end of amplitude control words generation module is connected with an input of described band spectrum modulation module, and described carrier wave NCO controls Word generation module is connected with two inputs of described orthogonal modulation module after described carrier wave NCO generation module, described spread spectrum The output end of modulation module is connected with an input of described orthogonal modulation module, an output of described orthogonal modulation module Hold as I branch road, another output end is Q branch road, I branch road and Q branch road are connected with the input of described DAC module.

In the utility model, sample clock frequency f_S=90MHz, phase accumulator digit and FREQUENCY CONTROL word bit number all take For N=32, phase controlling word bit number only takes 16, but it is be added in phase accumulator high 16.By two look-up tables Form realizes the phase/amplitude conversion output of sine wave and cosine wave, deposit in look-up table be all cos (x) x ∈ [0 π/ 2] data, quantization digit is 16bit, and data amount check is 1024.The addressing bit number of look-up table is set to 10, intercepts phase-accumulated The addresses input as look-up table for low 10 of high 12 of device 32 output, the 11st and the 12nd as character control bit, Control local digital sine and the cosine carrier signal of output 0～2 π whole cycle.The local digital of carrier wave NCO module output carries The frequency of ripple signal is f_C=M/2³²× 90MHz, frequency resolution is Δ f=90MHz/2³²≈ 0.02Hz, meets design needs. The real-time frequency control word of carrier wave NCO and real-time phase control word are calculated by DSP.

In the utility model, code NCO module is the same with carrier wave NCO module, sample clock frequency f_S=90MHz, phase place is tired out Plus device digit and FREQUENCY CONTROL word bit number are all taken as N=32, phase controlling word bit number only takes 16, but it is to be added in phase place to tire out Plus device is high 16.The output of code NCO module does not need look-up table, and the highest order directly intercepting phase accumulator is the 31st, It is the clock signal being used for driving pseudo-code generator, the same with carrier wave NCO module, its frequency size is also f_C=Mf_s/2^N, Frequency resolution is also Δ f=f_s/2³².

Real-time frequency control word M of code NCO module and real-time phase control word P are calculated by DSP.Digital combining module By 12 direct signal passages and 6 multipath signal passage compositions, can simulate simultaneously produce the straight of most 12 aeronautical satellites Penetrate signal and the multipath signal of most 6 aeronautical satellites.Because the intermediate-freuqncy signal of GNSS signal simulator generation is by I road and Q road Two paths of signals forms, therefore the I road to each passage and Q road signal are combined respectively to there are two combining modules.

Amplitude for making signal combining export does not change with the change of visible satellite, all introduces in each single channel signal The amplitude control words AMP_CTL of 16bit, and the value all same of each channel amplitude control word；When the number of visible satellite is N, The signal output that each visible satellite passage is not multiplied by after the band spectrum modulation of amplitude control words and subcarrier modulation is the A of 19bit_i(i =1,2,3 ... N), the amplitude control words AMP_CTL of each passage is set to 0x1FFF/N, and result S_add after such combining is：

$S\_add=\frac{0x1FFF}{N}\underset{i=1}{\overset{N}{\Σ}}{A}_i\≤0x1FFF\×A_{max}\≤0x1FFF\×0x3FFFF=0x7ffbe001$

I.e. after combining, result maximum is not more than 35bit, this ensures that theres digital combining and only need to share a 35bit Carrier adder, do not result in data overflow, saved the hardware resource of FPGA.Quantization digit due to AD9779A It it is 16, the result of therefore passage combining needs to block, and takes high 16.

Main two of data interaction between Radio Frequency Subsystem and intermediate-freuqncy signal mod subsystem：One is the simulation in intermediate frequency source Intermediate-freuqncy signal needs to be transferred to radio-frequency head；Two is that intermediate frequency source controls correctly carrying out of radio-frequency head upconversion function, and detects radio frequency The data interaction of the working condition at end, the former is directly connected to.

Intermediate-freuqncy signal mod subsystem passes through I2C (Inter-Integrated Circuit) to the control of Radio Frequency Subsystem Interface is realized, and to be completed by DSP.I2C bus is the twin wire universal serial bus developed by PHILIPS company, for connecting micro-control Device processed and its ancillary equipment.It is a kind of special shape of synchronous communication, and it is few to have an interface line, and control mode is simple, cabling side Just, the advantages of traffic rate is higher.

The data that IF board sends, its content is mainly performance number, for arranging or returning the power output of radiofrequency signal Value, in the operation not needing setting or return performance number, data content filling 0.Data has two bytes, is divided into high by eight Position and low eight, the scope of controllable power is：- 140dB～-80dB, precision is 0.5dB.

Radio Frequency Subsystem is mainly made up of 3 up-converter modules and 1 vector signal generator with upconversion function. Wherein 3 up-converter circuit plates are mainly used in produce, by intermediate-freuqncy signal, 3 frequency satellite navigation intermediate frequencies that processing unit obtains Signal is converted to corresponding radiofrequency signal.Host computer produces processing unit by intermediate-freuqncy signal and realizes the frequency to radiofrequency signal simultaneously Rate and the control of power.The each frequency point intermediate frequency signal of each system being obtained by intermediate-freuqncy signal generation module becomes via upper accordingly respectively Frequency module upconverts to corresponding radiofrequency signal.

As shown in Figure 10, the utility model embodiment discloses a kind of Radio Frequency Subsystem, including several up-converter modules, Power module, crystal oscillator and combiner, the input of described up-converter module is defeated with the intermediate-freuqncy signal of intermediate-freuqncy signal mod subsystem Go out end to connect, described power module is connected with the power input of module needing power supply in described Radio Frequency Subsystem, for for It provides working power, and the output end of described up-converter module is connected with the input of described combiner, described combiner defeated Go out end for described Radio Frequency Subsystem signal output part, described crystal oscillator be described Radio Frequency Subsystem provide work clock, described on Frequency-variable module and combiner are controlled by intermediate-freuqncy signal mod subsystem.

As shown in figure 11, described up-converter module includes microcontroller, LO module, IQ modulation to individual signals up-converter module Device, wave filter, AGC module and attenuation network module.The signal input part of described I/Q modulator and intermediate-freuqncy signal mod subsystem Intermediate-freuqncy signal output end connect, the input of described LO module termination crystal oscillator input, the output end of described LO module and described IQ The control end of modulator connects, output end filtered device, AGC module and the described attenuation network module successively of described I/Q modulator Input connect, the output end of described attenuation network module is RF signal output, the control output of described microcontroller End is connected with the control end of described LO module and attenuation network module respectively, and described microcontroller modulates subsystem with intermediate-freuqncy signal System connects, the control command of receiving intermediate frequency signal mod subsystem output.

Wherein：I/Q modulator is in order to realize the mixing of IF input signals and local oscillation signal.Wave filter be used for local oscillator with Filtering after the mixing of frequency signal.AGC (automatic growth control) module be a kind of input signal amplitude change very greatly in the case of Make the automatic control circuit that amplitude output signal changes in smaller range.In order that the Power Control of radio frequency output is accurately, suppression Device temperature drift processed etc., using AGC module by modulator output control on certain power (0dBm).

AGC module principle is illustrated in fig. 12 shown below：Described AGC module includes level detector, LPF module, comparator, control Voltage generating module and VGA module, the output end of described level detector is successively through described LPF module, comparator, control voltage Produce circuit to be connected with the control end of described VGA module, the input termination input voltage of described VGA module, described VGA module Output end is divided into two-way, and the first via is voltage output end, and the second tunnel is connected with the input of described level detector, described comparison One input termination reference voltage of device.

Attenuator circuit, radiofrequency signal produces processing unit to ensure the accuracy of final output signal power, by AGC Circuit makes it export and is fixed in a certain signal power (being typically selected in 0dbm).Last power output be -180dBW～- 120dBW, power step value is 0.5dB to decline it is therefore necessary to introduce attenuator circuit to the signal power after agc circuit Subtract, to meet output power signal requirement.

LO (local oscillator) module, LO module is used for producing the high-frequency local oscillation signal required for up-conversion.

Signal power control parameter and interface：Control signal transmission means：Control signal is produced by intermediate-freuqncy signal and processes list Unit produces, and can be selected for I2C bus and realizes itself data transfer and radiofrequency signal generation processing unit microcontroller between.I2C passes Three lines of defeated need, are clock line, data wire and ground wire respectively, and structure is simple, save space, interface module and each mould Communicate between the microcontroller of block also fairly simple, the transmission quantity very little of data.

Combiner：Combiner is used for realizing multiple signals any combination output, because the analogue system that user selectes is different (the multiple combination mode such as single system, multisystem, single-frequency point, multifrequency point) is it is therefore desirable to pass through switch control rule by on-off circuit Whether the signal output of a certain frequency, and this control signal produces processing unit by intermediate-freuqncy signal and passes through corresponding data wire via penetrating The untreated device that frequency signal produces in processing unit is controlled to the break-make of signal.

Claims (3)

1. a kind of Radio Frequency Subsystem it is characterised in that：Including several up-converter modules, power module, crystal oscillator and combiner, institute The intermediate-freuqncy signal output end of the input and intermediate-freuqncy signal mod subsystem of stating up-converter module is connected, described power module and institute The power input stating the module needing to power in Radio Frequency Subsystem connects, for providing working power, described up-conversion for it The output end of module is connected with the input of described combiner, and the output end of described combiner is the signal of described Radio Frequency Subsystem Output end, during described crystal oscillator provides work clock, described up-converter module and combiner to be controlled by for described Radio Frequency Subsystem Frequency signal modulation subsystem.

2. Radio Frequency Subsystem as claimed in claim 1 it is characterised in that：Described up-converter module includes microcontroller, LO mould Block, I/Q modulator, wave filter, AGC module and attenuation network module, the signal input part of described I/Q modulator is adjusted with intermediate-freuqncy signal The intermediate-freuqncy signal output end of subsystem connects, the input termination crystal oscillator input of described LO module, the output end of described LO module It is connected with the control end of described I/Q modulator, output end filtered device, AGC module and the described decay successively of described I/Q modulator The input of mixed-media network modules mixed-media connects, and the output end of described attenuation network module is RF signal output, described microcontroller Control output end is connected with the control end of described LO module and attenuation network module respectively, described microcontroller and intermediate-freuqncy signal Mod subsystem connects, the control command of receiving intermediate frequency signal mod subsystem output.

3. Radio Frequency Subsystem as claimed in claim 2 it is characterised in that：Described AGC module includes level detector, LPF mould Block, comparator, control voltage generation module and VGA module, the output end of described level detector successively through described LPF module, Comparator, control voltage are produced circuit and are connected with the control end of described VGA module, the input termination input electricity of described VGA module Pressure, the output end of described VGA module is divided into two-way, and the first via is voltage output end, and the second tunnel is defeated with described level detector Enter end to connect, an input termination reference voltage of described comparator.