CN205844829U - A kind of circuit realizing numeral I/O output extension based on iic bus - Google Patents
A kind of circuit realizing numeral I/O output extension based on iic bus Download PDFInfo
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- CN205844829U CN205844829U CN201620792447.1U CN201620792447U CN205844829U CN 205844829 U CN205844829 U CN 205844829U CN 201620792447 U CN201620792447 U CN 201620792447U CN 205844829 U CN205844829 U CN 205844829U
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Abstract
The utility model discloses a kind of circuit realizing numeral I/O output extension based on iic bus, including: numeral I/O extended chip U1, VCC constant pressure source, Darlington power transistor U2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth resistance R10, the first filter capacitor C1.This utility model utilizes numeral I/O extended chip, utilizes iic bus control, and Darlington power transistor drives different voltage loads, realizes situation not enough for numeral I/O in MCU, and then realizes the extension of I/O, saves MCU numeral I/O resource.This utility model design is convenient, uses flexibly, stable performance, and design is simple, with low cost, is suitable for use of large-scale production.
Description
Technical field:
This utility model belongs to control circuit technical field, is specifically related to a kind of defeated based on iic bus realization numeral I/O
Go out the circuit of extension.
Background technology:
At present, during commercial production controls, major part uses microcontroller can use example as core control, microcontroller
Such as single-chip microcomputer or arm processor etc., but the I/O port of existing micro controller system is limited, it is impossible to meet extension
Become the application of multiple signaling interface, for large-scale Industry Control, if using single micro controller system, its limited I/O
Port is difficult to meet large-scale Industry Control, if using multiple micro controller system to be controlled, communication issue easily occurs
And it is relatively costly.
The existing circuit exporting extension for realizing I/O in micro controller system is generally designed complexity, performance shakiness
Fixed, cost height, is not suitable for producing on a large scale.
Utility model content:
To this end, technical problem to be solved in the utility model is in prior art for realizing in micro controller system
The circuit of I/O output extension is generally designed complexity, unstable properties, cost height, is not suitable for producing on a large scale, thus proposes
A kind of circuit realizing numeral I/O output extension based on iic bus.
For reaching above-mentioned purpose, the technical solution of the utility model is as follows:
A kind of circuit realizing numeral I/O output extension based on iic bus, including:
Numeral I/O extended chip U1, VCC constant pressure source, Darlington power transistor U2, the first resistance R1, the second resistance R2, the 3rd
Resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth
Resistance R10.
The A0 end of described numeral I/O extended chip U1 connects VCC constant pressure source, A1 end ground connection, A2 end ground connection, and I/O0 end connects
First end of described first resistance R1, I/O1 end connects first end of described second resistance R2, and I/O2 end connects described 3rd electricity
First end of resistance R3, I/O3 end connects first end of described 4th resistance R4, and I/O4 end connects the first of described 5th resistance R5
End, I/O5 end connects first end of described 6th resistance R6, and I/O6 end connects first end of the 7th resistance R7, and I/O7 end connects institute
Stating first end of the 8th resistance R8, SDA end connects first end of described 9th resistance R9, and SCL end connects described tenth resistance R10
The first end, VSS end ground connection, vdd terminal connect VCC constant pressure source.
Second end of described first resistance R1, second end of described second resistance R2, second end of described 3rd resistance R3,
Second end of described 4th resistance R4, second end of described 5th resistance R5, second end of described 6th resistance R6, the described 7th
Second end of resistance R7, the second end ground connection respectively of described 8th resistance R8.
Second end of described 9th resistance R9 and second end of described tenth resistance R10 connect VCC constant pressure source.
The 1B end of described Darlington power transistor U2 connects the I/O0 end of described numeral I/O extended chip U1, and 2B end connects institute
Stating the I/O1 end of numeral I/O extended chip U1,3B end connects the I/O2 end of described numeral I/O extended chip U1, and 4B end connects institute
Stating the I/O3 end of numeral I/O extended chip U1,5B end connects the I/O4 end of described numeral I/O extended chip U1, and 6B end connects institute
Stating the I/O5 end of numeral I/O extended chip U1,7B end connects the I/O6 end of described numeral I/O extended chip U1, and 8B end connects institute
Stating the I/O7 end of numeral I/O extended chip U1, GND end ground connection, COM end connects load voltage.
Preferred as technique scheme, also includes the first filter capacitor C1, the first of described first filter capacitor C1
End connects described VCC constant pressure source, the second end ground connection of described first filter capacitor C1.
Preferred as technique scheme, described first filter capacitor C1 chooses the electricity that model is 104/0805/50V
Hold.
Preferred as technique scheme, described numeral I/O extended chip U1 chooses the chip that model is PCA9554A.
Preferred as technique scheme, described Darlington power transistor U2 chooses the Darlington transistor that model is ULN2803.
Preferred as technique scheme, described first resistance R1, described second resistance R2, described 3rd resistance R3,
Described 4th resistance R4, described 5th resistance R5, described 6th resistance R6, described 7th resistance R7, described 8th resistance R8 are equal
Choose the resistance that model is 5.1K/4R03.
Preferred as technique scheme, described 9th resistance R9 chooses the resistance that model is 1K/0805/1%, described
Tenth resistance R10 chooses the resistance that model is 1K/0805/1%.
The beneficial effects of the utility model are: this utility model utilizes numeral I/O extended chip, utilizes iic bus control
System, Darlington power transistor drives different voltage loads, realizes situation not enough for numeral I/O in MCU, and then realizes I/O's
Extension, saves MCU numeral I/O resource.This utility model design is convenient, uses flexibly, stable performance, and design is simple, low cost
Honest and clean, it is suitable for use of large-scale production.
Accompanying drawing illustrates:
The following drawings is only intended to, in schematically illustrating this utility model and explaining, not limit model of the present utility model
Enclose.Wherein:
Fig. 1 is a kind of circuit realizing numeral I/O output extension based on iic bus of one embodiment of this utility model;
Fig. 2 is the first address choice figure of the digital I/O extended chip of one embodiment of this utility model;
Fig. 3 is the second address choice figure of the digital I/O extended chip of one embodiment of this utility model;
Fig. 4 is the first sequential chart of the digital I/O extended chip of one embodiment of this utility model;
Fig. 5 is the second sequential chart of the digital I/O extended chip of one embodiment of this utility model.
Detailed description of the invention:
As it is shown in figure 1, the circuit realizing numeral I/O output extension based on iic bus of the present utility model, including: numeral
I/O extended chip U1, VCC constant pressure source, Darlington power transistor U2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th
Resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth resistance R10.This
In embodiment, described numeral I/O extended chip U1 chooses the chip that model is PCA9554A.Described Darlington power transistor U2 chooses
Model is the Darlington transistor of ULN2803.Described first resistance R1, described second resistance R2, described 3rd resistance R3, the described 4th
Resistance R4, described 5th resistance R5, described 6th resistance R6, described 7th resistance R7, described 8th resistance R8 all choose model
Resistance for 5.1K/4R03.Described 9th resistance R9 chooses the resistance that model is 1K/0805/1%, described tenth resistance R10 choosing
Take the resistance that model is 1K/0805/1%.
The A0 end of described numeral I/O extended chip U1 connects VCC constant pressure source, A1 end ground connection, A2 end ground connection, and I/O0 end connects
First end of described first resistance R1, I/O1 end connects first end of described second resistance R2, and I/O2 end connects described 3rd electricity
First end of resistance R3, I/O3 end connects first end of described 4th resistance R4, and I/O4 end connects the first of described 5th resistance R5
End, I/O5 end connects first end of described 6th resistance R6, and I/O6 end connects first end of the 7th resistance R7, and I/O7 end connects institute
Stating first end of the 8th resistance R8, SDA end connects first end of described 9th resistance R9, and SCL end connects described tenth resistance R10
The first end, VSS end ground connection, vdd terminal connect VCC constant pressure source.
Second end of described first resistance R1, second end of described second resistance R2, second end of described 3rd resistance R3,
Second end of described 4th resistance R4, second end of described 5th resistance R5, second end of described 6th resistance R6, the described 7th
Second end of resistance R7, the second end ground connection respectively of described 8th resistance R8.
Second end of described 9th resistance R9 and second end of described tenth resistance R10 connect VCC constant pressure source.
The 1B end of described Darlington power transistor U2 connects the I/O0 end of described numeral I/O extended chip U1, and 2B end connects institute
Stating the I/O1 end of numeral I/O extended chip U1,3B end connects the I/O2 end of described numeral I/O extended chip U1, and 4B end connects institute
Stating the I/O3 end of numeral I/O extended chip U1,5B end connects the I/O4 end of described numeral I/O extended chip U1, and 6B end connects institute
Stating the I/O5 end of numeral I/O extended chip U1,7B end connects the I/O6 end of described numeral I/O extended chip U1, and 8B end connects institute
Stating the I/O7 end of numeral I/O extended chip U1, GND end ground connection, COM end connects load voltage.
Also include that first end of the first filter capacitor C1, described first filter capacitor C1 connects described VCC constant pressure source, described
The second end ground connection of the first filter capacitor C1.In the present embodiment, it is 104/0805/ that described first filter capacitor C1 chooses model
The electric capacity of 50V.
Operation principle:
In Fig. 1, network identity SDA and SCL receives the digital I/O of MCU, and according to the IIC write timing of Fig. 4 and Fig. 5,
MCU finishes writing control program, initializes PCA9554A.
The first resistance R1 in Fig. 1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the 6th electricity
Resistance R6, the 7th resistance R7, the 8th resistance R8 by GND drop-down, in the case of PCA9554A does not export, keep initial low electricity
Level state, is driven by the reversion of ULN2803, and making outfan 01-08 is high level COM.
In Fig. 1 when I/O0-I/O7 exports high level, being driven by the reversion of ULN2803, it is low for making outfan 01-08
Level 0V, by load voltage suitable in COM termination, and then can drive corresponding load.
In Fig. 1, IIC address choice end in pin1-pin3 position in PCA9554A, connects different level shapes by A2, A1, A0
State, can select different work IC PCA9554A by iic bus, and then by 2 SDA, SCL numerals I/O in MCU, can
With by collocation three address choice short A2, A1, A0, as shown in Figures 2 and 3, select 8 extensions IC PCA9554A, Jin Erda
To the purpose of I/O extension, save MCU numeral I/O resource.
A kind of circuit realizing numeral I/O output extension based on iic bus described in the present embodiment, including: numeral I/O expands
Exhibition chip U1, VCC constant pressure source, Darlington power transistor U2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance
R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth resistance R10, the first filter
Ripple electric capacity C1.This utility model utilizes numeral I/O extended chip, utilizes iic bus control, and Darlington power transistor drives different electricity
Pressure load, realizes in MCU the not enough situation of numeral I/O, and then realizes the extension of I/O, saves MCU numeral I/O resource.This
Utility model design is convenient, uses flexibly, stable performance, and design is simple, with low cost, is suitable for use of large-scale production.
Obviously, above-described embodiment is only for clearly demonstrating example, and not restriction to embodiment.Right
For those of ordinary skill in the field, can also make on the basis of the above description other multi-form change or
Variation.Here without also cannot all of embodiment be given exhaustive.And the obvious change thus extended out or
Change among the protection domain still in this utility model creation.
Claims (7)
1. the circuit realizing numeral I/O output extension based on iic bus, it is characterised in that including:
Numeral I/O extended chip U1, VCC constant pressure source, Darlington power transistor U2, the first resistance R1, the second resistance R2, the 3rd resistance
R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth resistance
R10;
The A0 end of described numeral I/O extended chip U1 connects VCC constant pressure source, A1 end ground connection, A2 end ground connection, and I/O0 end connects described
First end of the first resistance R1, I/O1 end connects first end of described second resistance R2, and I/O2 end connects described 3rd resistance R3
The first end, I/O3 end connect described 4th resistance R4 the first end, I/O4 end connect described 5th resistance R5 the first end, I/
O5 end connects first end of described 6th resistance R6, and I/O6 end connects first end of the 7th resistance R7, and I/O7 end connects described the
First end of eight resistance R8, SDA end connects first end of described 9th resistance R9, and SCL end connects the of described tenth resistance R10
One end, VSS end ground connection, vdd terminal connects VCC constant pressure source;
Second end of described first resistance R1, second end of described second resistance R2, second end of described 3rd resistance R3, described
Second end of the 4th resistance R4, second end of described 5th resistance R5, second end of described 6th resistance R6, described 7th resistance
Second end of R7, the second end ground connection respectively of described 8th resistance R8;
Second end of described 9th resistance R9 and second end of described tenth resistance R10 connect VCC constant pressure source;
The 1B end of described Darlington power transistor U2 connects the I/O0 end of described numeral I/O extended chip U1, and 2B end connects described number
The I/O1 end of word I/O extended chip U1,3B end connects the I/O2 end of described numeral I/O extended chip U1, and 4B end connects described number
The I/O3 end of word I/O extended chip U1,5B end connects the I/O4 end of described numeral I/O extended chip U1, and 6B end connects described number
The I/O5 end of word I/O extended chip U1,7B end connects the I/O6 end of described numeral I/O extended chip U1, and 8B end connects described number
The I/O7 end of word I/O extended chip U1, GND end ground connection, COM end connects load voltage.
The circuit realizing numeral I/O output extension based on iic bus the most according to claim 1, it is characterised in that: also wrap
The first end including the first filter capacitor C1, described first filter capacitor C1 connects described VCC constant pressure source, described first filter capacitor
The second end ground connection of C1.
The circuit realizing numeral I/O output extension based on iic bus the most according to claim 2, it is characterised in that: described
First filter capacitor C1 chooses the electric capacity that model is 104/0805/50V.
The circuit realizing numeral I/O output extension based on iic bus the most according to claim 1, it is characterised in that: described
Numeral I/O extended chip U1 chooses the chip that model is PCA9554A.
The circuit realizing numeral I/O output extension based on iic bus the most according to claim 1, it is characterised in that: described
Darlington power transistor U2 chooses the Darlington transistor that model is ULN2803.
The circuit realizing numeral I/O output extension based on iic bus the most according to claim 1, it is characterised in that: described
First resistance R1, described second resistance R2, described 3rd resistance R3, described 4th resistance R4, described 5th resistance R5, described
Six resistance R6, described 7th resistance R7, described 8th resistance R8 all choose the resistance that model is 5.1K/4R03.
The circuit realizing numeral I/O output extension based on iic bus the most according to claim 1, it is characterised in that: described
9th resistance R9 chooses the resistance that model is 1K/0805/1%, and it is 1K/0805/1%'s that described tenth resistance R10 chooses model
Resistance.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN106054745A (en) * | 2016-07-26 | 2016-10-26 | 苏州博众精工科技有限公司 | IIC bus based expansion circuit for realizing digital I/O output |
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CN106054745A (en) * | 2016-07-26 | 2016-10-26 | 苏州博众精工科技有限公司 | IIC bus based expansion circuit for realizing digital I/O output |
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Address after: The Wujiang economic and Technological Development Zone West Road Wujiang District of Suzhou City, Jiangsu Province, No. 666 215200 Patentee after: Bo Seiko Polytron Technologies Inc Address before: The Wujiang economic and Technological Development Zone West Road Wujiang District of Suzhou City, Jiangsu Province, No. 666 215200 Patentee before: Suzhou Bozhong Precision Industry Technology Co., Ltd. |