CN205754539U - The embedded video capture card of gathered multiclass video signal based on FPGA - Google Patents
The embedded video capture card of gathered multiclass video signal based on FPGA Download PDFInfo
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- CN205754539U CN205754539U CN201620523358.7U CN201620523358U CN205754539U CN 205754539 U CN205754539 U CN 205754539U CN 201620523358 U CN201620523358 U CN 201620523358U CN 205754539 U CN205754539 U CN 205754539U
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Abstract
This utility model relates to video signal collective technical field, the embedded video capture card of a kind of gathered multiclass video signal based on FPGA is provided, it includes DSP unit, FPGA unit, single-chip microcomputer, video interface, video acquisition module, DSP unit is connected with FPGA unit, single-chip microcomputer respectively, FPGA unit is connected with single-chip microcomputer, video interface includes USB interface, DVI interface and PAL interface, and video acquisition module includes VGA signal acquisition module, DVI signal acquisition module and PAL signal acquisition module.The technical scheme that the utility model proposes achieves the multichannel video acquisition of multiplex roles on veneer and processes, can conveniently switch when gathering the signal of different video interface, without installing the video frequency collection card of distinct interface in PC, while saving hardware cost, reduce use power consumption.
Description
Technical field
This utility model belongs to video signal collective technical field, regards particularly to a kind of gathered multiclass based on FPGA
Frequently the embedded video capture card of signal.
Background technology
At present, along with the development of modern industry production and safety monitoring technology, computer technology introduces video acquisition, video
Process field, is widely used in a lot of fields by computer disposal video information with Digital Transmission video data,
Also by substantial amounts of application in our Aircraft Flight Test.
The method of video image acquisition is more, is basically divided into 2 big classes: digital signal acquiring and collection of simulant signal.?
In actual application, the high definition application trend of video frequency collection card is more and more obvious, and sector application scope is the most extensive.General video
The interface of capture card includes and is adopted the data of the interface of video equipment and video frequency collection card and PC and order control interface.Existing
PC video frequency collection card commercially generally uses the pci bus interface of 32, by being inserted into the expansion slot of PC mainboard
In, to realize communication and the data transmission of capture card and PC, pci bus is parallel data bus line, and the EBI of 32 passes
Defeated speed is about at 264MB/S, and this bandwidth cannot meet the transmission requirement of 1080p@60, and the mode of parallel bus can strengthen
The design difficulty of pcb board.On the other hand, existing capture card typically video source just for a kind of form is designed, it is impossible to
Take into account the most several popular video interface on one capture card be acquired and process, very inconvenient when using switching.
Utility model content
[solving the technical problem that]
The purpose of this utility model is to provide the embedded video of a kind of gathered multiclass video signal based on FPGA and adopts
Truck, to realize collection and the process of different video interface signal.
[technical scheme]
This utility model is achieved through the following technical solutions.
This utility model relates to the embedded video capture card of a kind of gathered multiclass video signal based on FPGA, including
DSP unit, FPGA unit, single-chip microcomputer, video interface and video acquisition module, described DSP unit respectively with FPGA unit, monolithic
Machine connects, and described FPGA unit is connected with single-chip microcomputer, and described video interface includes USB interface, DVI interface and PAL interface, described
Video acquisition module includes VGA signal acquisition module, DVI signal acquisition module and PAL signal acquisition module, described VGA signal
Acquisition module is connected with USB interface and FPGA unit respectively, and described DVI signal acquisition module is mono-with DVI interface and FPGA respectively
Unit connects, and described PAL signal acquisition module is connected with PAL interface and FPGA unit respectively.
As one preferred embodiment, described DSP unit includes video compress subelement.
As another preferred embodiment, described FPGA unit includes video format transformant unit, video mirror picture
Subelement, video cutting subelement, video upset subelement, luminance video regulon unit, video contrast's regulon unit,
Video timestamp superposition subelement, PCI-E communicator unit.
As another preferred embodiment, described single-chip microcomputer include powering on management subelement, the management subelement that resets,
BIT self-inspection subelement, dynamic load subelement.
As another preferred embodiment, described FPGA unit comprises 2 PCI-E interface, and one of them PCI-E connects
Mouth is connected with DSP unit, and another PCI-E interface is connected with PC.
As another preferred embodiment, it is logical that described VGA signal acquisition module uses 2 TVP7002 chips to realize 2
Track data gathers.
As another preferred embodiment, it is logical that described DVI signal acquisition module uses 2 TFP401A chips to realize 2
Track data gathers.
As another preferred embodiment, described PAL signal acquisition module uses 2 TVP5154A chips to realize 4
Channel data gathers.
As another preferred embodiment, described DSP unit uses the TMS320DM8168 of TI company.
[beneficial effect]
The technical scheme that the utility model proposes has the advantages that
The video frequency collection card that this utility model provides achieves adopting of three kinds different video interface signal (PAL, DVI, VGA)
Collection and process, the signal after collection is transmitted to PC by PCI-E interface, and therefore this utility model achieves on veneer and connects more
The multichannel video acquisition of mouth processes, and can conveniently switch when gathering the signal of different video interface, it is not necessary at PC
Machine is installed the video frequency collection card of distinct interface, while saving hardware cost, reduces use power consumption.
Accompanying drawing explanation
Embedded the regarding of the gathered multiclass video signal based on FPGA that Fig. 1 provides for embodiment one of the present utility model
Frequently the structural principle block diagram of capture card.
Detailed description of the invention
For making the purpose of this utility model, technical scheme and advantage clearer, below will to of the present utility model specifically
Embodiment carries out clear, complete description.
The embedded video of the gathered multiclass video signal based on FPGA that Fig. 1 provides for this utility model embodiment one
The structural principle block diagram of capture card.As it is shown in figure 1, this embedded video capture card include DSP unit, FPGA unit, single-chip microcomputer,
Video interface and video acquisition module, DSP unit is connected with FPGA unit, single-chip microcomputer respectively, and FPGA unit is connected with single-chip microcomputer,
Video interface includes USB interface, DVI interface and PAL interface, and video acquisition module includes VGA signal acquisition module, DVI signal
Acquisition module and PAL signal acquisition module, VGA signal acquisition module is connected with USB interface and FPGA unit respectively, DVI signal
Acquisition module is connected with DVI interface and FPGA unit respectively, and PAL signal acquisition module connects with PAL interface and FPGA unit respectively
Connect.
DSP unit is connected with FPGA unit, single-chip microcomputer respectively, and wherein DSP unit is led to by PCI-E bus with FPGA unit
Letter.FPGA unit is connected with single-chip microcomputer.VGA signal acquisition module is connected with USB interface and FPGA unit respectively, and DVI signal is adopted
Collection module is connected with DVI interface and FPGA unit respectively, and PAL signal acquisition module is connected with PAL interface and FPGA unit respectively.
In the present embodiment, DSP unit is used for realizing video compress, and it includes video compress subelement.Specifically, DSP is mono-
Unit uses the TMS320DM8168 of TI company.TMS320DM8168 is high-performance DMsoc of TI, wherein comprises 1 C674x dominant frequency
For 1GHz, 1 Cotex-A8 dominant frequency is 1.2GHz, and 3 HDVICP frequencies are 600MHz.CPU has powerful data and processes energy
Power also comprises substantial amounts of peripheral hardware resource.
In the present embodiment, FPGA unit includes that video format transformant unit, video mirror are as subelement, video cutting sub-list
Unit, video upset subelement, luminance video regulon unit, video contrast's regulon unit, video timestamp superposition subelement
With PCI-E communicator unit, it is used for realizing video format conversion, video mirror picture, video cutting, video upset, luminance video tune
Joint, video contrast's regulation, video timestamp superposition, PCI-E communication.
In the present embodiment, single-chip microcomputer includes powering on management subelement, the management subelement that resets, BIT self-inspection subelement, dynamically
Add subelements, for realization power on administrative unit, reset management, BIT self-inspection, dynamic load.
In the present embodiment, VGA signal acquisition module uses TVP7002 chip to realize, and TVP7002 is that a high definition of TI regards
Frequently decoding chip, includes 3 road 10bit A/D, and processing speed is up to 165MHz, supports various component input video standard, as
480i/p, 576i/p, 720p, 1080i/p；The PC picture signal supporting the highest UXGA (1 600 × 1 200) resolution inputs.
Output signal supports RGB or YCbCr color space, supports the output mode of RGB/YCbCr 4: 4: 4 and YCbCr 4: 2: 2.
The mode of operation of chip passes through I2C bus to its internal register programming realization.This chip supports RGB888 or gray scale
(GRAY888) type collection；Input interface comprises R, G, B, HS, VS signal, supports 3 line systems and 5 line systems.The present embodiment passes through 1
Sheet TVP7002 chip realizes 2 tunnel signals collecting, and the signal after collection passes through FPGA unit and the process of DSP unit.Believe with VGA
3 line systems and 5 line systems are supported in the USB interface input that number acquisition module connects, and DVI signal acquisition module supports RGB888 or gray scale
(GRAY888) type collection, can gather 2 road signals simultaneously and show.
In the present embodiment, DVI signal acquisition module uses TFP401A chip to realize, and TFP401A chip is TI company
A kind of TDMS signal receiving chip in PanelBus flat panel display product series, it uses 0.18 advanced μm EPIC-
5TMCMOS processes technique, uses 1.8V core voltage and 3.3V I/O voltage, has low noise and low power consumption characteristic, its
PowerPADTM encapsulation technology can ensure the heat stability of chip operation, can apply to other high speed digital video applied field
Close.This chip supports monochromatic drainage pattern (B/W camera).The present embodiment can realize 2 roads by 2 TFP401A chips to be believed
Number gather, the signal after collection pass through FPGA unit and the process of DSP unit.The DVI interface being connected with DVI signal acquisition module
Supporting 2 road signal inputs, DVI signal acquisition module is supported monochromatic drainage pattern, can be gathered 2 road signals simultaneously and show.
In the present embodiment, PAL signal acquisition module uses TVP5154A chip to realize, and TVP5154A is that 4 passages of TI are low
Power consumption Video Decoder, is integrated with 4 independent H/V route markers, it is possible to the forms such as NTSC, PAL and SECAM are converted to numeral
Video output streams 8bit ITU-R BT.656 form, uses 4 special I2C addresses, so that single I2C bus can connect
Up to 4 TVP5154 devices (16 video channels).TVP5154 supports express lock mode, allows a decoder to change and does not surpass
Crossing 2.5 video inputs, in input transformation process, the gain being currently entered and imbalance arrange stored, thus improve
Lock speed, extends the convergence time of automatic growth control.Stable synchronism output characteristic is in the case of active video
The number of, lines fixed can be supported, ensure that stable output signal.This chip supports PAL video acquisition.It addition, this
PAL interface in embodiment comprises 4 tunnel single ended interfaces and 2 road differential interfaces, realizes 6 road signals by 2 TVP5154A chips
Gathering, the signal collected is processed by FPGA unit and DSP unit, it is to be appreciated that 2 tunnel analogue difference of differential interface input
Sub-signal needs to use LT6552IS8 to be converted to single-ended signal, is then connected with the analog input end mouth of TVP5154A chip.
In the present embodiment, a road PCI-E interface of FPGA unit is connected with PC.By PCI-E bus, FPGA unit will
The non-compressed video data signal collected sends to PC.
In the present embodiment, another road PCI-E interface of FPGA unit is connected with DSP unit.By PCI-E bus, DSP is mono-
Video signal after compression is sent to FPGA by unit, FPGA be forwarded to PC.
As can be seen from the above embodiments, the video frequency collection card that this utility model embodiment provides achieves three kinds of differences and regards
Frequently the collection of interface signal (PAL, DVI, VGA) and process, the signal after collection is transmitted to PC by PCI-E interface, therefore
This utility model achieves the multichannel video acquisition of multiplex roles on veneer and processes, when gathering the signal of different video interface
Can conveniently switch, it is not necessary to the video frequency collection card of distinct interface is installed in PC, drop while saving hardware cost
Low use power consumption.
It is to be appreciated that embodiments described above is a part of embodiment of the present utility model rather than whole embodiment,
It is not to restriction of the present utility model.Based on embodiment of the present utility model, those of ordinary skill in the art are not paying wound
The every other embodiment obtained under the property made work premise, broadly falls into protection domain of the present utility model.
Claims (9)
1. the embedded video capture card of gathered a multiclass video signal based on FPGA, it is characterised in that include that DSP is mono-
Unit, FPGA unit, single-chip microcomputer, video interface and video acquisition module, described DSP unit is respectively with FPGA unit, single-chip microcomputer even
Connecing, described FPGA unit is connected with single-chip microcomputer, and described video interface includes USB interface, DVI interface and PAL interface, described video
Acquisition module includes VGA signal acquisition module, DVI signal acquisition module and PAL signal acquisition module, described VGA signals collecting
Module is connected with USB interface and FPGA unit respectively, and described DVI signal acquisition module connects with DVI interface and FPGA unit respectively
Connecing, described PAL signal acquisition module is connected with PAL interface and FPGA unit respectively.
The embedded video capture card of gathered multiclass video signal based on FPGA the most according to claim 1, it is special
Levy and be that described DSP unit includes video compress subelement.
The embedded video capture card of gathered multiclass video signal based on FPGA the most according to claim 1, it is special
Levy and be that described FPGA unit includes that video format transformant unit, video mirror are turned over as subelement, video cutting subelement, video
Rotor unit, luminance video regulon unit, video contrast's regulon unit, video timestamp superposition subelement, PCI-E communicate
Subelement.
The embedded video capture card of gathered multiclass video signal based on FPGA the most according to claim 1, it is special
Levy and be that described single-chip microcomputer includes power on management subelement, reset management subelement, BIT self-inspection subelement, dynamic load sub-list
Unit.
The embedded video capture card of gathered multiclass video signal based on FPGA the most according to claim 1, it is special
Levying and be that described FPGA unit comprises 2 PCI-E interface, one of them PCI-E interface is connected with DSP unit, another PCI-E
Interface is connected with PC.
6. adopt according to the embedded video of described gathered multiclass video signal based on FPGA arbitrary in claim 1 to 5
Truck, it is characterised in that described VGA signal acquisition module uses 2 TVP7002 chips to realize 2 channel data collections.
7. adopt according to the embedded video of described gathered multiclass video signal based on FPGA arbitrary in claim 1 to 5
Truck, it is characterised in that described DVI signal acquisition module uses 2 TFP401A chips to realize 2 channel data collections.
8. adopt according to the embedded video of described gathered multiclass video signal based on FPGA arbitrary in claim 1 to 5
Truck, it is characterised in that described PAL signal acquisition module uses 2 TVP5154A chips to realize 4 channel data collections.
9. adopt according to the embedded video of described gathered multiclass video signal based on FPGA arbitrary in claim 1 to 5
Truck, it is characterised in that described DSP unit uses the TMS320DM8168 of TI company.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107529024A (en) * | 2017-08-16 | 2017-12-29 | 西安应用光学研究所 | Multifunctional image video switch boards |
| CN107707829A (en) * | 2017-09-28 | 2018-02-16 | 成都傅立叶电子科技有限公司 | A kind of method that multiplex roles intelligence SDI video switching boxs are realized based on FPGA |
| CN108200345A (en) * | 2018-01-24 | 2018-06-22 | 华东师范大学 | High speed real-time multichannel video acquisition processing unit |
| CN108307128A (en) * | 2018-03-21 | 2018-07-20 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of video display processing device |
| CN108881829A (en) * | 2018-06-25 | 2018-11-23 | 深圳市招华智能股份有限公司 | A kind of method and system of transmission of video |
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2016
- 2016-05-31 CN CN201620523358.7U patent/CN205754539U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107529024A (en) * | 2017-08-16 | 2017-12-29 | 西安应用光学研究所 | Multifunctional image video switch boards |
| CN107707829A (en) * | 2017-09-28 | 2018-02-16 | 成都傅立叶电子科技有限公司 | A kind of method that multiplex roles intelligence SDI video switching boxs are realized based on FPGA |
| CN107707829B (en) * | 2017-09-28 | 2020-04-21 | 成都傅立叶电子科技有限公司 | Multi-interface intelligent SDI video conversion box realized based on FPGA |
| CN108200345A (en) * | 2018-01-24 | 2018-06-22 | 华东师范大学 | High speed real-time multichannel video acquisition processing unit |
| CN108307128A (en) * | 2018-03-21 | 2018-07-20 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of video display processing device |
| CN108307128B (en) * | 2018-03-21 | 2024-01-30 | 中国航空工业集团公司洛阳电光设备研究所 | Video display processing device |
| CN108881829A (en) * | 2018-06-25 | 2018-11-23 | 深圳市招华智能股份有限公司 | A kind of method and system of transmission of video |
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