CN205546008U - Two DSP+FPGA architecture of digital parallelly connected induction heating power - Google Patents

Two DSP+FPGA architecture of digital parallelly connected induction heating power Download PDF

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Publication number
CN205546008U
CN205546008U CN201521024569.8U CN201521024569U CN205546008U CN 205546008 U CN205546008 U CN 205546008U CN 201521024569 U CN201521024569 U CN 201521024569U CN 205546008 U CN205546008 U CN 205546008U
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circuit
control circuit
fpga
microprocessor
chip
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CN201521024569.8U
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Chinese (zh)
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布挺
焦文潭
张刚
武超
姚惠林
葛运旺
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Luoyang Institute of Science and Technology
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Luoyang Institute of Science and Technology
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  • General Induction Heating (AREA)

Abstract

The utility model relates to an induction heating power technology field discloses a two DSP+FPGA architecture of digital parallelly connected induction heating power, include: main circuit, control circuit, core control circuit, the obs core control circuit passes through control circuit and links to each other with the main circuit, the main circuit contains: thyristor SCR drive / rectifier bridge, smoothing reactor, insulated gate bipolar transistor (IGBT) drive / contravariant bridge, LC shunt load / inductor, control circuit contains: contravariant feedback circuit, protection detection circuitry, DC voltage current power set for detection circuitry, energy control and handheld operation ware. The utility model discloses can use in audio frequency / superaudio induction heating power, the start -up success rate is high, job stabilization nature is good, control accuracy is high, extensions is nimble, and its intelligent degree is high to use energy monitored control system to carry out the record to the work piece quality of processing at every turn, gained better economic benefits.

Description

Digitized parallel connection induction heating power is double DSP+FPGA Architecture
Technical field
This utility model relates to induction heating power technical field, particularly relates to a kind of digitized parallel connection induction heating power two CSTR+FPGA architecture.
Background technology
At present, along with the development of induction heating power, the power supply of analog control technique is used to seem backward.The development of DSP technology brings opportunity to the development of digitized power supply, and digitized induction heating power is owing to its intelligence degree is high, control accuracy is high, Function Extension advantage flexibly has manifested.The control program using two CSTR+FPGA is applied in audio frequency/superaudio induction heating power, starts success rate height, good operating stability, and uses energy management system that the workpiece quality of processing every time is carried out record, achieves preferable economic benefit.
Summary of the invention
In order to overcome the deficiency in background technology, this utility model provides a kind of digitized parallel connection induction heating power two CSTR+FPGA architecture.Digitized audio/superaudio sensing heating power supply in parallel can be applied to.
In order to realize foregoing invention purpose, the present invention uses technical scheme as follows:
A kind of digitized parallel connection induction heating power two CSTR+FPGA architecture, including: main circuit, control circuit, core control circuit, described core control circuit is connected with main circuit by control circuit;
Described main circuit comprises: IGCT SCR driving/rectifier bridge, smoothing reactor, igbt (IGBT) driving/inverter bridge, LC shunt load/induction apparatus;
Described control circuit comprises: inversion feedback circuit, protection testing circuit, DC voltage and current power setting testing circuit, energy monitoring and handheld manipulator;
Described core control circuit is two CSTR+FPGA architecture; it is made up of microprocessor/DSP chip I, microprocessor/DSP chip II, fpga chip; microprocessor/DSP chip I input of electrical connection microprocessor/DSP chip II electrically connects with protection testing circuit; the power setting end of microprocessor/DSP chip I, phase shortage warning end are connected with fpga chip corresponding end, and the IGBT inversion pulses generation end of described microprocessor/DSP chip II is connected with the IGBT inversion pulse corresponding end of fpga chip;
Wherein the setting test side of dsp chip I is connected with DC voltage and current power setting testing circuit by analog to digital conversion circuit A/D;The communication terminal of dsp chip I is connected with energy monitoring and handheld manipulator by 232 communication modules;
Wherein the input of microprocessor/DSP chip II is connected with LC shunt load/induction apparatus by inversion feedback circuit;
Wherein the SCR triggering pulse ends of fpga chip is connected with IGCT SCR driving/rectifier bridge, described IGCT SCR driving/rectifier bridge input connects the three-phase alternating current synchronizing signal of three-phase alternating-current supply AC, three-phase alternating-current supply AC and is connected with the three-phase alternating current synchronizing signal end of fpga chip;
Wherein the IGBT triggering pulse ends of fpga chip is connected with insulated gate bipolar transistor IGBT driving/inverter bridge.
A kind of digitized parallel connection induction heating power two CSTR+FPGA architecture; described protection testing circuit is made up of Hall element, diverter, hydraulic pressure sensor, temperature sensor, and Hall element, diverter, hydraulic pressure sensor, temperature sensor are connected with microprocessor/DSP chip I by holding wire.
Owing to using technical scheme as above, this utility model has a following superiority:
A kind of digitized parallel connection induction heating power two CSTR+FPGA architecture, the control program using two CSTR+FPGA is applied in audio frequency/superaudio induction heating power, start success rate height, good operating stability, control accuracy is high, Function Extension is flexible, its intelligence degree is high, and use energy management system that the workpiece quality of processing every time is carried out record, achieve preferable economic benefit.
[accompanying drawing explanation]
Fig. 1 is the circuit block diagram of induction heating power architecture in parallel;
[detailed description of the invention]
As it is shown in figure 1, a kind of digitized parallel connection induction heating power two CSTR+FPGA architecture, including: main circuit, control circuit, core control circuit, described core control circuit is connected with main circuit by control circuit;
Described main circuit comprises: IGCT SCR driving/rectifier bridge, smoothing reactor, igbt (IGBT) driving/inverter bridge, LC shunt load/induction apparatus;
Described control circuit comprises: inversion feedback circuit, protection testing circuit, DC voltage and current power setting testing circuit, energy monitoring and handheld manipulator.
Described core control circuit is two CSTR+FPGA architecture; including: dsp chip I, dsp chip II, fpga chip; the dsp chip I of described electrical connection protection testing circuit is connected with the dsp chip II of electrical connection inversion feedback; the power setting end of described dsp chip I, phase shortage warning end are connected with fpga chip corresponding end, and the IGBT inversion pulses generation end of described dsp chip II is connected with the IGBT inversion pulse corresponding end of fpga chip;
Wherein the setting test side of dsp chip I is connected with DC voltage and current power setting testing circuit by analog to digital conversion circuit A/D;The communication terminal of dsp chip I is connected with energy monitoring and handheld manipulator by 232 communication modules;
Wherein the SCR triggering pulse ends of fpga chip is connected with IGCT SCR driving/rectifier bridge, and described IGCT SCR driving/rectifier bridge input connects the three-phase alternating current synchronizing signal of three-phase alternating-current supply AC and is connected with the three-phase alternating current synchronizing signal end of fpga chip;
Wherein the IGBT triggering pulse ends of fpga chip is connected with insulated gate bipolar transistor IGBT driving/inverter bridge.
Described protection testing circuit is made up of Hall element, diverter, hydraulic pressure sensor, temperature sensor.
Induction heating power architecture in parallel of the present utility model is applied to digitized audio/superaudio sensing heating power supply in parallel.
In the architecture of this power supply, main circuit comprises IGCT (SCR) driving/rectifier bridge, smoothing reactor, igbt (IGBT) driving/inverter bridge, LC shunt load/induction apparatus;Control circuit comprises inversion feedback circuit, protection testing circuit, DC voltage and current power setting testing circuit, energy monitoring and handheld manipulator.The core circuit of this patent protection is the core control circuit that two CSTR+FPGA circuitry (in dotted line frame) forms.This core control circuit is for the generation of three-phase fully-controlled rectified pulses signal, the generation of IGBT inversion pulse signal, the monitoring of system mode and energy monitoring and the communication of hands behaviour.Two panels dsp chip uses the TMS320F2812 that Texas Instrument (TI) company produces.Fpga chip uses the LFXP3C-3TN144C that Lai Disi (LATTICE) company produces.
Main circuit uses the three phase controlled rectifier circuit being made up of SCR, and rectification exports the DC voltage of adjustable about 0 ~ 500V.The bridge inverter main circuit being made up of IGBT is delivered to after smoothing reactor.Inverter output voltage is determined by the DC voltage after rectification, and the frequency that reverse frequency is triggered pulse by IGBT determines.Load uses LC shunt-resonant circuit, inversion output finally to deliver to induction apparatus through load transformer, heat workpiece.
Protection testing circuit is mainly made up of Hall element, diverter, hydraulic pressure sensor, temperature sensor etc..It is responsible for the alarm signal that detection is abnormal, passes to DSP-I.
DSP-I effect mainly has three aspects.
First, it is sent to graphic control panel (i.e. energy monitors and hands behaviour) by the DC voltage after A/D sample detecting, DC current, shows the states such as power supply DC voltage, DC current in real time.Calculating power in touch screen and show, log history curve is the most qualified in order to judge processed workpiece.Owing to the working environment of induction heating power is relatively severe, electromagnetic interference is relatively big, DSP-I and the communications applications shielding line of graphic control panel, have employed the communication mode of 232 level+ModBus simultaneously, improves capacity of resisting disturbance.Additionally DSP-I is by the setting value of A/D detection power potentiometer, divides 100 grades to pass to FPGA the value detected, in order to realize different running voltages (i.e. power).And when FPGA detects three-phase alternating current phase shortage, receive phase shortage alarm signal, stop power work.
Second, if alarm detection circuit detects DC over-voltage, crosses stream, cooling water pressure too high too low, cooling water overtemperature, the exchange fault such as overvoltage, DSP-I receives these fault-signals, stops power work, and these information pass to energy monitoring and hands behaviour.
3rd, by the value of power potentiometer being detected or being monitored by energy and the performance number of hands behaviour's setting, DSP-I software carries out Wave-Smoothing Digital Filtration.And when power supply high power work, make power gradually lifting, be then passed to FPGA, in order to produce three-phase fully-controlled phase-shift pulse, in order to avoid the high voltage of moment, big electric current form impact to power supply, it is achieved soft start.Soft-start time about completed within the time of 200ms.
Owing to power-supply system has strict requirements to the frequency of inversion, in order to ensure that processor, to the real-time of inversion control and stability, has been separately provided DSP-II in the design, trigger pulse producing IGBT inversion.
Power supply is parallel connection power supply, and the operating frequency surface of IGBT inverter bridge is determined by DSP-II, is actually determined by LC antiresonant circuit.Owing to changing induction apparatus, change output transformer turns ratio, the quantity of increase and decrease matching capacitor, putting into the change that different workpiece all can cause the resonant frequency of LC antiresonant circuit, and workpiece is during heating, especially after close to or up curie point, resonant frequency can change.These all can cause circuit off resonance, may burn IGBT inverter bridge.DSP-II utilizes digital phase-locked loop to solve this problem.When resonant frequency changes, the change of frequency is by inversion feedback circuit, sending into DSP-II, the frequency utilizing the IGBT inversion pulse that digital phase-locked loop makes DSP-II produce is consistent with resonant frequency, it is achieved reverse frequency from motion tracking frequency locking (i.e. frequency self adaptation).PGA acts on of both mainly having.
The first, in FPGA, the phase-shift trigger circuit for three phase rectifier is devised.The power setting parameter that FPGA gives according to the three-phase synchronous signal after blood pressure lowering shaping and DSP-I, produces 6 road IGCT phase-shifting trigger pulses, controls the angle of flow of IGCT, in order to adjust rectifier output voltage (i.e. output).The pulse of each road all uses the pwm signal of dual trigger, to ensure that IGCT will not leak triggering.
The second, devising IGBT inversion pulse distributor in FPGA, the two-way IGBT produced by DSP-II triggers pulse distribution and becomes 4 tunnels, 8 roads or 12 tunnels.4 tunnels are the triggering pulse of the mono-inverter bridge of IGBT, and wherein 2 tunnels are the triggering pulse of diagonal angle brachium pontis, and another 2 tunnels are the triggering pulse of another diagonal angle brachium pontis, half inversion cycle of phase mutual deviation.8 tunnels be double inverter bridge trigger pulse, 12 tunnels are the triggering pulse of three inverter bridge, the quantity of inverter bridge can increase and decrease according to output.If additionally, use IGBT timesharing conducting technology, utilizing 2 inverter bridge, also can realizing the multiplication of IGBT reverse frequency, the highest reverse frequency is up to about 80KHz.

Claims (2)

1. a digitized parallel connection induction heating power two CSTR+FPGA architecture, is characterized in that: including: main circuit, control circuit, core control circuit, and described core control circuit is connected with main circuit by control circuit;
Described main circuit comprises: IGCT SCR driving/rectifier bridge, smoothing reactor, insulated gate bipolar transistor IGBT driving/inverter bridge, LC shunt load/induction apparatus;
Described control circuit comprises: inversion feedback circuit, protection testing circuit, DC voltage and current power setting testing circuit, energy monitoring and handheld manipulator;
Described core control circuit is two CSTR+FPGA architecture; it is made up of microprocessor/DSP chip I, microprocessor/DSP chip II, fpga chip; microprocessor/DSP chip I input of electrical connection microprocessor/DSP chip II electrically connects with protection testing circuit; the power setting end of microprocessor/DSP chip I, phase shortage warning end are connected with fpga chip corresponding end, and the IGBT inversion pulses generation end of described microprocessor/DSP chip II is connected with the IGBT inversion pulse corresponding end of fpga chip;
Wherein the setting test side of dsp chip I is connected with DC voltage and current power setting testing circuit by analog to digital conversion circuit A/D;The communication terminal of dsp chip I is connected with energy monitoring and handheld manipulator by 232 communication modules;
Wherein the input of microprocessor/DSP chip II is connected with LC shunt load/induction apparatus by inversion feedback circuit;
Wherein the SCR triggering pulse ends of fpga chip is connected with IGCT SCR driving/rectifier bridge, described IGCT SCR driving/rectifier bridge input connects the three-phase alternating current synchronizing signal of three-phase alternating-current supply AC, three-phase alternating-current supply AC and is connected with the three-phase alternating current synchronizing signal end of fpga chip;
Wherein the IGBT triggering pulse ends of fpga chip is connected with insulated gate bipolar transistor IGBT driving/inverter bridge.
A kind of digitized parallel connection induction heating power two CSTR+FPGA architecture the most according to claim 1; it is characterized in that: described protection testing circuit is made up of Hall element, diverter, hydraulic pressure sensor, temperature sensor, Hall element, diverter, hydraulic pressure sensor, temperature sensor are connected with microprocessor/DSP chip I by holding wire.
CN201521024569.8U 2015-12-11 2015-12-11 Two DSP+FPGA architecture of digital parallelly connected induction heating power Withdrawn - After Issue CN205546008U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105472803A (en) * 2015-12-11 2016-04-06 洛阳理工学院 Digital parallel induction heating power supply dual-DSP + FPGA system structure and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105472803A (en) * 2015-12-11 2016-04-06 洛阳理工学院 Digital parallel induction heating power supply dual-DSP + FPGA system structure and method
CN105472803B (en) * 2015-12-11 2018-10-16 洛阳理工学院 Digital parallel induction heating power supply dual-DSP + FPGA system structure and method

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