CN205453495U - Steady voltage charge pump device - Google Patents

Steady voltage charge pump device Download PDF

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Publication number
CN205453495U
CN205453495U CN201521114895.8U CN201521114895U CN205453495U CN 205453495 U CN205453495 U CN 205453495U CN 201521114895 U CN201521114895 U CN 201521114895U CN 205453495 U CN205453495 U CN 205453495U
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Prior art keywords
input
charge pump
pump circuit
circuit
clock
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CN201521114895.8U
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Inventor
丁启源
王富中
张科
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Geke Microelectronics Shanghai Co Ltd
Galaxycore Shanghai Ltd Corp
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Geke Microelectronics Shanghai Co Ltd
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Abstract

The utility model provides a steady voltage charge pump device, include: the charge pump circuit, it includes power input end, power output end, the first clock input and control end, bleeder circuit, it includes the first input end, and the power output end of charge pump circuit is connected to second input and output, first input end, and a reference voltage is connected to the second input, the comparator, it includes the third input, and the 2nd reference voltage is connected to fourth input and output, third input, and bleeder circuit's output is connected to the fourth input, count latch circuit, it includes the data input end, data output end, the 2nd clock input end and control end, the output of comparator is connected to the data input end, and data output end connects the control end of charge pump circuit. The utility model discloses eliminate the influence of output voltage burr phenomenon, guaranteed the normal operating of charge pump circuit, improved display driving chip's wholeness ability, adjusted output voltage's ripple wave form in a flexible way.

Description

Voltage stabilizing charge pump apparatus
Technical field
This utility model relates to integrated circuit fields, particularly relates to a kind of voltage stabilizing charge pump apparatus.
Background technology
Display driver chip generally configures charge pump circuit and uses for internal circuit to the supply voltage producing varying level.Charge pump circuit is inputted voltage according to default multiplying power and increases or downgrade, therefore the just positive correlation direct with its input voltage of its output voltage.A kind of implementation method of voltage stabilizing electric charge pump is proportion divider and the reference voltage of output voltage to be compared, and utilizes the output of comparator to control the start and stop of charge pump clock.
Fig. 1 show a preferred embodiment of known charge pump installation, including charge pump circuit 10, bleeder circuit 50 and comparator 30.Wherein, the output voltage of charge pump circuit 10 is converted to proportion divider by bleeder circuit 50, compared with reference voltage Vref by comparator 30, output control signal, when the output voltage of charge pump circuit 10 reaches preset value, the output switching activity of comparator 30, charge pump circuit 10 starts or stops work.But, due to circuit design and actually used in some reason, the output voltage potentially unstable of charge pump circuit 10, the output signal upset of the frequent trigger comparator of burr 30 of output voltage, cause charge pump circuit 10 frequent start-stop, affect the properly functioning of charge pump circuit 10, and then affect the overall performance of display driver chip.It addition, the ripple waveform of the output voltage of charge pump circuit 10 is the most uncontrollable.
Utility model content
The purpose of this utility model is to provide a kind of voltage stabilizing charge pump apparatus, eliminates the impact of output voltage burr phenomena, it is ensured that charge pump circuit properly functioning, improves the overall performance of display driver chip, the ripple waveform of regulation output voltage.
Based on considerations above, this utility model provides a kind of voltage stabilizing charge pump apparatus, including: charge pump circuit, described charge pump circuit includes power input, power output end, the first input end of clock and control end;Bleeder circuit, described bleeder circuit includes first input end, the second input and outfan, and described first input end connects the power output end of charge pump circuit, and described second input connects the first reference voltage;Comparator, described comparator includes the 3rd input, four-input terminal and outfan, and described 3rd input connects the second reference voltage, and described four-input terminal connects the outfan of described bleeder circuit;Counting latch cicuit, described counting latch cicuit includes data input pin, data output end, second clock input and control end, and described data input pin connects the outfan of described comparator, and described data output end connects the control end of described charge pump circuit.
Wherein, described first input end of clock and described second clock input share same input clock signal.
Wherein, described first input end of clock uses different input clock signals with described second clock input.
Wherein, described bleeder circuit includes the first resistance being connected between described first input end and described outfan, and is connected to the second resistance between described second input and described outfan.
Wherein, described first resistance and variable resistance that the second resistance is program-controlled adjustment.
Wherein, described charge pump circuit includes at least two single stage charge pump circuit, and the power output end of prime charge pump circuit connects the power input of rear class charge pump circuit.
Voltage stabilizing charge pump apparatus of the present utility model, by counting latch cicuit, the output signal of comparator is latched, control comparator output signal and be turned to the time interval between charge pump circuit start and stop, eliminate the impact of output voltage burr phenomena, ensure the properly functioning of charge pump circuit, improve the overall performance of display driver chip, the ripple waveform of flexible output voltage.
Accompanying drawing explanation
Reading the following detailed description to non-limiting example by referring to accompanying drawing, other features, objects and advantages of the present utility model will become more apparent upon.
Fig. 1 is the circuit diagram of existing voltage stabilizing charge pump apparatus;
Fig. 2 is the circuit diagram of voltage stabilizing charge pump apparatus of the present utility model.
In the drawings, running through different diagrams, same or similar reference represents same or analogous device (module) or step.
Detailed description of the invention
For solving above-mentioned the problems of the prior art, this utility model provides a kind of voltage stabilizing charge pump apparatus and control method thereof, by counting latch cicuit, the output signal of comparator is latched, control comparator output signal and be turned to the time interval between charge pump circuit start and stop, eliminate the impact of output voltage burr phenomena, ensure the properly functioning of charge pump circuit, improve the overall performance of display driver chip, the ripple waveform of flexible output voltage.
In the specific descriptions of following preferred embodiment, by with reference to constituting the accompanying drawing appended by this utility model part.Appended accompanying drawing has been illustrated by way of example and has been capable of specific embodiment of the present utility model.The embodiment of example is not intended as limit according to all embodiments of the present utility model.It is appreciated that on the premise of without departing from scope of the present utility model, it is possible to use other embodiments, it is also possible to carry out the structural or amendment of logicality.Therefore, following specific descriptions are the most nonrestrictive, and scope of the present utility model is defined by the claims appended hereto.
Fig. 2 illustrates a preferred embodiment of this utility model voltage stabilizing charge pump apparatus.Described voltage stabilizing charge pump apparatus includes charge pump circuit 110, bleeder circuit 150, comparator 130 and counting latch cicuit 140.
Wherein, described charge pump circuit 110 includes power input 120a, power output end 120b, input end of clock 120c and controls end 120d.Power input 120a receives input voltage, and charge pump circuit is exported by power output end 120b after increasing according to default multiplying power or downgrade.In other embodiments unshowned, described charge pump circuit 110 can also include at least two single stage charge pump circuit, being series relationship between each single stage charge pump circuit, the power output end 110b of prime charge pump circuit connects the power input 110a of rear class charge pump circuit.
Bleeder circuit 150 includes that the power output end 110b, described second input 150b of first input end 150a, the second input 150b and outfan 150c, described first input end 150a connection charge pump circuit 110 connects the first reference voltage Vres.Bleeder circuit 150 also includes the first resistance Ra being connected between described first input end 150a and described outfan 150c, and it is connected to the second resistance Rb between described second input 150b and described outfan 150c, preferably, described first resistance Ra and the variable resistance that the second resistance Rb is program-controlled adjustment, in order to regulated the numerical value of the proportion divider of the outfan 150c output of bleeder circuit 150 by the ratio adjusting the first resistance Ra and the second resistance Rb.
Comparator 130 includes the 3rd input 130a, four-input terminal 130b and outfan 130c, described 3rd input 130a connects the second reference voltage Vref, described four-input terminal 130b connects the outfan 150c of described bleeder circuit, thus the proportion divider exported by bleeder circuit 150 and the second reference voltage Vref compare, when the output voltage of charge pump circuit 110 is less than preset value, the outfan 130c of comparator 130 exports the first level signal, when the output voltage of charge pump circuit 110 is higher than preset value, comparator 130 outfan 130c exports second electrical level signal.
Counting latch cicuit 140 includes data input pin 140a, data output end 140b, second clock input 140c and control end 140d, described data input pin 140a connect the control end 110d of outfan 130c, the described data output end 140b described charge pump circuit 110 of connection of described comparator.When the signal level that the data input pin 140a of described counting latch cicuit 140 receives changes, the clock signal that described counting latch cicuit 140 is inputted by second clock input 140c counts, when reaching the count value being controlled by holding the counting controling signal setting of 140d input, make the output signal input signal equal to data input pin 140a of data output end 140b, i.e. the first level signal of comparator 130 output or second electrical level signal.The control end 110d of described charge pump circuit 110 receives the output signal of the data output end 140b of described counting latch cicuit, controls the duty of described charge pump circuit 110.
Owing to the output signal of comparator 130 is latched by counting latch cicuit 140, control the time interval that comparator output signal is turned between charge pump circuit start and stop, can effectively eliminate the impact of output voltage burr phenomena, avoid the false triggering that burr signal causes, ensure the properly functioning of charge pump circuit, improving the overall performance of display driver chip, the setting additionally coordinating comparator reference voltage can be with the ripple waveform of flexible output voltage.
Preferably, described first input end of clock and described second clock input can share same input clock signal, and the i.e. first input clock signal and the second input clock signal are same external timing signal, to simplify circuit design;Described first input end of clock and described second clock input can also use different input clock signal, and such as, the frequency of the second input clock signal is higher than the frequency of the first input clock signal, in order to output voltage ripple amplitude is carried out finer regulation.
Voltage stabilizing charge pump apparatus of the present utility model, by counting latch cicuit, the output signal of comparator is latched, control comparator output signal and be turned to the time interval between charge pump circuit start and stop, eliminate the impact of output voltage burr phenomena, ensure the properly functioning of charge pump circuit, improve the overall performance of display driver chip, the ripple waveform of flexible output voltage.
It is obvious to a person skilled in the art that this utility model is not limited to the details of above-mentioned one exemplary embodiment, and in the case of without departing substantially from spirit or essential attributes of the present utility model, it is possible to realize this utility model in other specific forms.Therefore, in any case from the point of view of, embodiment all should be regarded as exemplary, and be nonrestrictive.Additionally, it will be evident that " an including " word is not excluded for other elements and step, and wording " one " is not excluded for plural number.In device claim, multiple elements of statement can also be realized by an element.The first, the second word such as grade is used for representing title, and is not offered as any specific order.

Claims (6)

1. a voltage stabilizing charge pump apparatus, it is characterised in that including:
Charge pump circuit (110), described charge pump circuit (110) includes power input (110a), power output end (110b), the first input end of clock (110c) and control end (110d);
Bleeder circuit (150), described bleeder circuit (150) includes first input end (150a), second input (150b) and outfan (150c), described first input end (150a) connects the power output end (110b) of charge pump circuit (110), and described second input (150b) connects the first reference voltage (Vres);
Comparator (130), described comparator (130) includes the 3rd input (130a), four-input terminal (130b) and outfan (130c), described 3rd input (130a) connects the second reference voltage (Vref), and described four-input terminal (130b) connects the outfan (150c) of described bleeder circuit (150);
Counting latch cicuit (140), described counting latch cicuit (140) includes data input pin (140a), data output end (140b), second clock input (140c) and control end (140d), described data input pin (140a) connects the outfan (130c) of described comparator, and described data output end (140b) connects the control end (110d) of described charge pump circuit (110).
2. voltage stabilizing charge pump apparatus as claimed in claim 1, it is characterised in that described first input end of clock (110c) and described second clock input (140c) share same input clock signal.
3. voltage stabilizing charge pump apparatus as claimed in claim 1, it is characterised in that described first input end of clock (110c) uses different input clock signals with described second clock input (140c).
4. voltage stabilizing charge pump apparatus as claimed in claim 1, it is characterized in that, described bleeder circuit (150) includes the first resistance (Ra) being connected between described first input end (150a) and described outfan (150c), and the second resistance (Rb) being connected between described second input (150b) and described outfan (150c).
5. voltage stabilizing charge pump apparatus as claimed in claim 4, it is characterised in that described first resistance (Ra) and the variable resistance that the second resistance (Rb) is program-controlled adjustment.
6. voltage stabilizing charge pump apparatus as claimed in claim 1, it is characterized in that, described charge pump circuit (110) includes at least two single stage charge pump circuit, and the power output end (110b) of prime charge pump circuit connects the power input (110a) of rear class charge pump circuit.
CN201521114895.8U 2015-12-30 2015-12-30 Steady voltage charge pump device Active CN205453495U (en)

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Application Number Priority Date Filing Date Title
CN201521114895.8U CN205453495U (en) 2015-12-30 2015-12-30 Steady voltage charge pump device

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CN205453495U true CN205453495U (en) 2016-08-10

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107994769A (en) * 2017-12-13 2018-05-04 上海华虹宏力半导体制造有限公司 A kind of circuit for producing high voltage for reducing average power consumption
CN110943610A (en) * 2018-09-21 2020-03-31 北京兆易创新科技股份有限公司 Charge pump system and nonvolatile memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107994769A (en) * 2017-12-13 2018-05-04 上海华虹宏力半导体制造有限公司 A kind of circuit for producing high voltage for reducing average power consumption
CN110943610A (en) * 2018-09-21 2020-03-31 北京兆易创新科技股份有限公司 Charge pump system and nonvolatile memory

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